Assembly Diffs
linux arm64
Diffs are based on 2,259,627 contexts (1,008,044 MinOpts, 1,251,583 FullOpts).
MISSED contexts: base: 1 (0.00%), diff: 2 (0.00%)
Overall (-2,772 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.linux.arm64.checked.mch |
79,928,956 |
-1,304 |
| benchmarks.run_tiered.linux.arm64.checked.mch |
22,277,428 |
-632 |
| coreclr_tests.run.linux.arm64.checked.mch |
509,755,544 |
-944 |
| libraries.pmi.linux.arm64.checked.mch |
76,286,724 |
+252 |
| libraries_tests.run.linux.arm64.Release.mch |
400,455,948 |
-156 |
| librariestestsnotieredcompilation.run.linux.arm64.Release.mch |
165,114,004 |
+12 |
FullOpts (-2,772 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.linux.arm64.checked.mch |
54,380,584 |
-1,304 |
| benchmarks.run_tiered.linux.arm64.checked.mch |
4,938,464 |
-632 |
| coreclr_tests.run.linux.arm64.checked.mch |
160,847,688 |
-944 |
| libraries.pmi.linux.arm64.checked.mch |
76,166,740 |
+252 |
| libraries_tests.run.linux.arm64.Release.mch |
183,717,044 |
-156 |
| librariestestsnotieredcompilation.run.linux.arm64.Release.mch |
151,616,728 |
+12 |
Example diffs
benchmarks.run_pgo.linux.arm64.checked.mch
-476 (-33.06%) : 148546.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,134 +10,132 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T15] ( 11, 3.91) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T19] ( 7, 2.13) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T15] ( 7, 3.91) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T19] ( 4, 2.25) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T03] ( 6,102.65) int -> x21
-; V03 loc1 [V03,T13] ( 19, 26.07) int -> x23
-; V04 loc2 [V04,T39] ( 7, 0.00) int -> x24
-; V05 loc3 [V05,T11] ( 30, 28.75) int -> x22
-; V06 loc4 [V06,T24] ( 22, 1.38) int -> x4
-; V07 loc5 [V07,T42] ( 8, 13.02) double -> d8
-; V08 loc6 [V08,T10] ( 22, 50.05) int -> x5
-; V09 loc7 [V09,T41] ( 9, 25.28) double -> d9
-; V10 loc8 [V10,T30] ( 4, 0.25) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T43] ( 5, 12.55) double -> d10
-; V12 loc10 [V12,T09] ( 19, 50.32) int -> x5
-; V13 loc11 [V13,T18] ( 9, 4.45) int -> x3
+; V03 loc1 [V03,T13] ( 13, 26.07) int -> x23
+; V04 loc2 [V04,T34] ( 2, 0.00) int -> x24
+; V05 loc3 [V05,T11] ( 18, 28.87) int -> x22
+; V06 loc4 [V06,T24] ( 12, 1.38) int -> x4
+; V07 loc5 [V07,T37] ( 5, 13.02) double -> d16
+; V08 loc6 [V08,T10] ( 14, 49.93) int -> x14
+; V09 loc7 [V09,T36] ( 6, 25.28) double -> d17
+; V10 loc8 [V10,T29] ( 2, 0.25) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T38] ( 3, 12.55) double -> d16
+; V12 loc10 [V12,T09] ( 12, 50.20) int -> x0
+; V13 loc11 [V13,T18] ( 7, 4.45) int -> x3
; V14 loc12 [V14,T16] ( 8, 5.34) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T17] ( 6, 4.54) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T40] ( 3,100.00) double -> d16
+; V16 loc14 [V16,T35] ( 3,100.00) double -> d16
; V17 loc15 [V17,T01] ( 13,401.08) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T06] ( 9, 74.55) byref -> x7 "dup spill"
-; V20 tmp2 [V20,T27] ( 4, 0.50) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V21 tmp3 [V21,T00] ( 6,594.66) byref -> x2 "dup spill"
+; V19 tmp1 [V19,T06] ( 6, 74.55) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 0.50) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V21 tmp3 [V21,T00] ( 6,594.66) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T38] ( 6, 0.00) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T08] ( 9, 73.57) ref -> x6 "arr expr"
-; V25 tmp7 [V25,T25] ( 6, 0.75) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T26] ( 6, 0.75) ref -> x4 "arr expr"
-; V27 tmp9 [V27,T07] ( 9, 74.55) ref -> x6 "arr expr"
+; V23 tmp5 [V23,T33] ( 3, 0.00) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T08] ( 6, 73.57) ref -> x15 "arr expr"
+; V25 tmp7 [V25,T25] ( 3, 0.75) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T26] ( 3, 0.75) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T07] ( 6, 74.55) ref -> x1 "arr expr"
; V28 cse0 [V28,T28] ( 3, 0.37) ref -> x15 "CSE - conservative"
-; V29 cse1 [V29,T34] ( 3, 0.00) ref -> x15 "CSE - conservative"
-; V30 cse2 [V30,T36] ( 3, 0.00) ref -> x2 "CSE - conservative"
-; V31 cse3 [V31,T32] ( 3, 0.12) ref -> x2 "CSE - conservative"
-; V32 cse4 [V32,T02] ( 3,294.36) long -> x15 "CSE - aggressive"
-; V33 cse5 [V33,T14] ( 11, 24.93) long -> x28 "CSE - aggressive"
-; V34 cse6 [V34,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
-; V35 cse7 [V35,T23] ( 3, 2.67) long -> x14 "CSE - moderate"
-; V36 cse8 [V36,T29] ( 9, 0.25) long -> x28 "CSE - conservative"
-; V37 cse9 [V37,T04] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T05] ( 4,100.00) byref -> x0 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T12] ( 19, 27.73) byref -> x26 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T20] ( 15, 3.41) int -> x25 multi-def "CSE - moderate"
-; V41 cse13 [V41,T22] ( 4, 2.76) int -> xip0 hoist multi-def "CSE - moderate"
-; V42 cse14 [V42,T31] ( 4, 0.12) int -> [fp+0x14] "CSE - conservative"
-; V43 cse15 [V43,T35] ( 4, 0.00) int -> [fp+0x10] "CSE - conservative"
-; V44 cse16 [V44,T33] ( 3, 0.12) long -> x27 "CSE - conservative"
-; V45 cse17 [V45,T37] ( 3, 0.00) long -> x27 "CSE - conservative"
+; V29 cse1 [V29,T31] ( 3, 0.12) ref -> x2 "CSE - conservative"
+; V30 cse2 [V30,T02] ( 3,294.36) long -> x15 "CSE - aggressive"
+; V31 cse3 [V31,T14] ( 11, 25.19) long -> x28 "CSE - aggressive"
+; V32 cse4 [V32,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
+; V33 cse5 [V33,T23] ( 3, 2.67) long -> x14 "CSE - moderate"
+; V34 cse6 [V34,T04] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T05] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V36 cse8 [V36,T12] ( 12, 27.73) byref -> x26 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T20] ( 10, 3.17) int -> x25 multi-def "CSE - moderate"
+; V38 cse10 [V38,T22] ( 4, 2.76) int -> xip0 hoist multi-def "CSE - moderate"
+; V39 cse11 [V39,T30] ( 4, 0.13) int -> [fp+0x1C] "CSE - conservative"
+; V40 cse12 [V40,T32] ( 3, 0.12) long -> x27 "CSE - conservative"
;
-; Lcl frame size = 8
+; Lcl frame size = 16
G_M58112_IG01: ; bbWeight=0.89, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x70]!
+ stp x19, x20, [sp, #0x20]
+ stp x21, x22, [sp, #0x30]
+ stp x23, x24, [sp, #0x40]
+ stp x25, x26, [sp, #0x50]
+ stp x27, x28, [sp, #0x60]
mov fp, sp
ldp x20, x19, [fp, #0xD1FFAB1E]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w23, w21, [fp, #0xF8]
+ ldp w22, w24, [fp, #0xF0]
+ ldr w3, [fp, #0xB8]
+ ldp x12, x15, [fp, #0xA8]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=0.89 PerfScore 25.37
+ ldr d16, [fp, #0xA0]
+ ldr w14, [fp, #0x9C]
+ ;; size=56 bbWeight=0.89 PerfScore 20.03
G_M58112_IG02: ; bbWeight=0.89, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref, isz
cmp w14, w21
- bge G_M58112_IG48
+ bge G_M58112_IG31
;; size=8 bbWeight=0.89 PerfScore 1.34
G_M58112_IG03: ; bbWeight=0.88, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
- b G_M58112_IG38
+ b G_M58112_IG26
;; size=4 bbWeight=0.88 PerfScore 0.88
G_M58112_IG04: ; bbWeight=0.00, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x26]
sxtw w4, w22
+ ldr w25, [x19, #0x08]
+ cmp w4, w25
+ bhs G_M58112_IG32
mov w27, w4
lsl x28, x27, #3
ldr x2, [x26, x28]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG49
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w4, w15
+ bhs G_M58112_IG32
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x28]
- fabs d8, d16
- add w3, w4, #1
- str w3, [fp, #0x14] // [V42 cse14]
- sxtw w5, w3
- ; gcrRegs -[x5]
- cmp w5, w23
- blt G_M58112_IG13
- ;; size=64 bbWeight=0.00 PerfScore 0.00
-G_M58112_IG05: ; bbWeight=0.12, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ fabs d16, d16
+ add w5, w4, #1
+ sxtw w3, w5
+ str w3, [fp, #0x1C] // [V39 cse11]
+ sxtw w14, w3
; byrRegs -[x14]
+ cmp w14, w23
+ blt G_M58112_IG13
+ ;; size=80 bbWeight=0.00 PerfScore 0.00
+G_M58112_IG05: ; bbWeight=0.12, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ldr w14, [x20, #0x08]
+ cmp w22, w14
+ bhs G_M58112_IG32
add x14, x20, #16
; byrRegs +[x14]
lsl x15, x27, #2
str w4, [x14, x15]
cmp w4, w25
- bhs G_M58112_IG49
+ bhs G_M58112_IG32
ldr x15, [x26, w4, UXTW #3]
; gcrRegs +[x15]
- mov x7, x15
- ; gcrRegs +[x7]
- ldr w14, [x7, #0x08]
+ mov x14, x15
+ ; gcrRegs +[x14]
; byrRegs -[x14]
- cmp w22, w14
- bhs G_M58112_IG49
- add x14, x7, #16
+ ldr w12, [x14, #0x08]
+ cmp w22, w12
+ bhs G_M58112_IG32
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x28]
fcmp d16, #0.0
- beq G_M58112_IG53
+ beq G_M58112_IG36
cmp w4, w22
beq G_M58112_IG07
- ;; size=64 bbWeight=0.12 PerfScore 2.47
+ ;; size=76 bbWeight=0.12 PerfScore 3.06
G_M58112_IG06: ; bbWeight=0.12, gcrefRegs=188004 {x2 x15 x19 x20}, byrefRegs=4000000 {x26}, byref
- ; gcrRegs -[x7]
; byrRegs -[x14]
add x14, x26, x28
; byrRegs +[x14]
@@ -150,403 +148,222 @@ G_M58112_IG06: ; bbWeight=0.12, gcrefRegs=188004 {x2 x15 x19 x20}, byrefR
bl CORINFO_HELP_ARRADDR_ST
; gcrRegs -[x0 x2]
; gcr arg pop 0
- ;; size=20 bbWeight=0.12 PerfScore 0.43
+ ;; size=20 bbWeight=0.12 PerfScore 0.44
G_M58112_IG07: ; bbWeight=0.12, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
sub w0, w23, #1
cmp w22, w0
bge G_M58112_IG23
;; size=12 bbWeight=0.12 PerfScore 0.25
G_M58112_IG08: ; bbWeight=0.12, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
- ldr x4, [x26, x28]
- ; gcrRegs +[x4]
- ldr w0, [x4, #0x08]
- cmp w22, w0
- bhs G_M58112_IG49
- add x0, x4, #16
+ ldr x0, [x26, x28]
+ ; gcrRegs +[x0]
+ ldr w1, [x0, #0x08]
+ cmp w22, w1
+ bhs G_M58112_IG32
+ add x0, x0, #16
+ ; gcrRegs -[x0]
; byrRegs +[x0]
ldr d16, [x0, x28]
fmov d17, #1.0000
- fdiv d10, d17, d16
- ldr w3, [fp, #0x14] // [V42 cse14]
- sxtw w5, w3
- cmp w5, w23
- bge G_M58112_IG12
...
-460 (-31.86%) : 148531.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,140 +10,139 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 20, 5.12) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T17] ( 7, 2.01) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T06] ( 13, 5.11) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T17] ( 4, 2.02) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T03] ( 6,103.01) int -> x21
-; V03 loc1 [V03,T18] ( 19, 3.14) int -> x23
-; V04 loc2 [V04,T32] ( 7, 0.02) int -> x24
-; V05 loc3 [V05,T08] ( 30, 6.19) int -> x22
-; V06 loc4 [V06,T22] ( 22, 0.15) int -> x4
-; V07 loc5 [V07,T40] ( 8, 1.09) double -> d8
-; V08 loc6 [V08,T15] ( 22, 4.20) int -> x6
-; V09 loc7 [V09,T39] ( 9, 2.11) double -> d9
-; V10 loc8 [V10,T33] ( 4, 0.02) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T41] ( 5, 1.03) double -> d10
-; V12 loc10 [V12,T16] ( 19, 4.14) int -> x4
-; V13 loc11 [V13,T13] ( 9, 5.08) int -> x3
+; V03 loc1 [V03,T18] ( 13, 3.14) int -> x23
+; V04 loc2 [V04,T32] ( 2, 0.02) int -> x24
+; V05 loc3 [V05,T08] ( 18, 6.20) int -> x22
+; V06 loc4 [V06,T22] ( 12, 0.17) int -> x3
+; V07 loc5 [V07,T35] ( 5, 1.09) double -> d8
+; V08 loc6 [V08,T15] ( 14, 4.19) int -> x4
+; V09 loc7 [V09,T34] ( 6, 2.11) double -> d9
+; V10 loc8 [V10,T31] ( 2, 0.02) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T36] ( 3, 1.03) double -> d16
+; V12 loc10 [V12,T16] ( 12, 4.13) int -> x0
+; V13 loc11 [V13,T13] ( 7, 5.08) int -> x3
; V14 loc12 [V14,T07] ( 9, 7.05) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T14] ( 6, 5.02) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T38] ( 3,100.00) double -> d16
+; V16 loc14 [V16,T33] ( 3,100.00) double -> d16
; V17 loc15 [V17,T01] ( 13,400.96) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T09] ( 9, 6.13) byref -> x6 "dup spill"
-; V20 tmp2 [V20,T26] ( 4, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V19 tmp1 [V19,T09] ( 6, 6.13) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V21 tmp3 [V21,T00] ( 6,593.93) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T23] ( 6, 0.06) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T10] ( 9, 6.13) ref -> registers "arr expr"
-; V25 tmp7 [V25,T24] ( 6, 0.06) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T25] ( 6, 0.06) ref -> x3 "arr expr"
-; V27 tmp9 [V27,T11] ( 9, 6.13) ref -> x5 "arr expr"
+; V23 tmp5 [V23,T23] ( 3, 0.06) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T10] ( 6, 6.13) ref -> x14 "arr expr"
+; V25 tmp7 [V25,T24] ( 3, 0.06) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T25] ( 3, 0.06) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T11] ( 6, 6.13) ref -> x1 "arr expr"
; V28 cse0 [V28,T28] ( 3, 0.03) ref -> x15 "CSE - conservative"
-; V29 cse1 [V29,T35] ( 3, 0.00) ref -> x15 "CSE - conservative"
-; V30 cse2 [V30,T36] ( 3, 0.00) ref -> x2 "CSE - conservative"
-; V31 cse3 [V31,T29] ( 3, 0.03) ref -> x2 "CSE - conservative"
-; V32 cse4 [V32,T02] ( 3,293.99) long -> x15 "CSE - aggressive"
-; V33 cse5 [V33,T21] ( 11, 2.10) long -> x27 "CSE - aggressive"
-; V34 cse6 [V34,T19] ( 3, 3.04) long -> x14 "CSE - aggressive"
-; V35 cse7 [V35,T20] ( 3, 2.97) long -> x0 "CSE - moderate"
-; V36 cse8 [V36,T31] ( 9, 0.02) long -> x26 "CSE - conservative"
-; V37 cse9 [V37,T04] ( 4,100.00) byref -> xip0 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T05] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T12] ( 19, 5.12) byref -> x25 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T27] ( 4, 0.04) int -> x28 "CSE - conservative"
-; V41 cse13 [V41,T34] ( 4, 0.00) int -> x27 "CSE - conservative"
-; V42 cse14 [V42,T30] ( 3, 0.03) long -> x26 "CSE - conservative"
-; V43 cse15 [V43,T37] ( 3, 0.00) long -> x14 "CSE - conservative"
+; V29 cse1 [V29,T29] ( 3, 0.03) ref -> x2 "CSE - conservative"
+; V30 cse2 [V30,T02] ( 3,293.99) long -> x15 "CSE - aggressive"
+; V31 cse3 [V31,T21] ( 11, 2.12) long -> x27 "CSE - aggressive"
+; V32 cse4 [V32,T19] ( 3, 3.04) long -> x14 "CSE - aggressive"
+; V33 cse5 [V33,T20] ( 3, 2.97) long -> x0 "CSE - moderate"
+; V34 cse6 [V34,T04] ( 4,100.00) byref -> xip0 hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T05] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
+; V36 cse8 [V36,T12] ( 12, 5.12) byref -> x25 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T26] ( 4, 0.04) int -> x28 "CSE - conservative"
+; V38 cse10 [V38,T30] ( 3, 0.03) long -> x26 "CSE - conservative"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M58112_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x70]!
+ stp d8, d9, [sp, #0x10]
+ stp x19, x20, [sp, #0x20]
+ stp x21, x22, [sp, #0x30]
+ stp x23, x24, [sp, #0x40]
+ stp x25, x26, [sp, #0x50]
+ stp x27, x28, [sp, #0x60]
mov fp, sp
ldp x20, x19, [fp, #0xD1FFAB1E]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w23, w21, [fp, #0xF8]
+ ldp w22, w24, [fp, #0xF0]
+ ldr w3, [fp, #0xB8]
+ ldp x12, x15, [fp, #0xA8]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=1 PerfScore 28.50
+ ldr d16, [fp, #0xA0]
+ ldr w14, [fp, #0x9C]
+ ;; size=60 bbWeight=1 PerfScore 23.50
G_M58112_IG02: ; bbWeight=1, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
b G_M58112_IG14
;; size=4 bbWeight=1 PerfScore 1.00
G_M58112_IG03: ; bbWeight=0.01, gcrefRegs=180000 {x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x25]
- sxtw w4, w22
- mov w26, w4
+ sxtw w3, w22
+ ldr w14, [x19, #0x08]
+ cmp w3, w14
+ bhs G_M58112_IG35
+ mov w26, w3
lsl x27, x26, #3
ldr x2, [x25, x27]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG53
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w3, w15
+ bhs G_M58112_IG35
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fabs d8, d16
- add w28, w4, #1
- sxtw w6, w28
- cmp w6, w23
+ add w28, w3, #1
+ sxtw w4, w28
+ cmp w4, w23
blt G_M58112_IG05
- ;; size=60 bbWeight=0.01 PerfScore 0.18
+ ;; size=72 bbWeight=0.01 PerfScore 0.23
G_M58112_IG04: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x5]
; byrRegs -[x14]
+ ldr w14, [x20, #0x08]
+ cmp w22, w14
+ bhs G_M58112_IG35
add x14, x20, #16
; byrRegs +[x14]
lsl x15, x26, #2
- str w4, [x14, x15]
+ str w3, [x14, x15]
ldr w14, [x19, #0x08]
; byrRegs -[x14]
- cmp w4, w14
- bhs G_M58112_IG53
- ldr x15, [x25, w4, UXTW #3]
+ cmp w3, w14
+ bhs G_M58112_IG35
+ ldr x15, [x25, w3, UXTW #3]
; gcrRegs +[x15]
- mov x7, x15
- ; gcrRegs +[x7]
- ldr w14, [x7, #0x08]
- cmp w22, w14
- bhs G_M58112_IG53
- add x14, x7, #16
+ mov x14, x15
+ ; gcrRegs +[x14]
+ ldr w12, [x14, #0x08]
+ cmp w22, w12
+ bhs G_M58112_IG35
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fcmp d16, #0.0
- beq G_M58112_IG38
+ beq G_M58112_IG39
b G_M58112_IG22
- ;; size=64 bbWeight=0.01 PerfScore 0.23
+ ;; size=76 bbWeight=0.01 PerfScore 0.28
G_M58112_IG05: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x7 x15]
+ ; gcrRegs -[x15]
; byrRegs -[x14]
- orr w14, w6, w23
+ orr w14, w4, w23
tbz w14, #31, G_M58112_IG08
;; size=8 bbWeight=0.01 PerfScore 0.02
G_M58112_IG06: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
ldr w14, [x19, #0x08]
- cmp w6, w14
- bhs G_M58112_IG53
- ldr x14, [x25, w6, UXTW #3]
+ cmp w4, w14
+ bhs G_M58112_IG35
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG53
+ bhs G_M58112_IG35
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -161,12 +160,12 @@ G_M58112_IG08: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
cmp w14, w23
blt G_M58112_IG06
;; size=12 bbWeight=0.01 PerfScore 0.05
-G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ldr x14, [x25, w6, UXTW #3]
+G_M58112_IG09: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG53
+ bhs G_M58112_IG35
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -174,18 +173,18 @@ G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
fabs d9, d16
fcmp d9, d8
bgt G_M58112_IG12
- ;; size=36 bbWeight=1.00 PerfScore 15.03
-G_M58112_IG10: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ;; size=36 bbWeight=1.01 PerfScore 15.18
+G_M58112_IG10: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; byrRegs -[x14]
...
-156 (-21.67%) : 75394.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,213 +11,167 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.93) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.93) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.93) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.05) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.80) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.80) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.20) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.20) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.13) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.12) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.93) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.90) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.13) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.97) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.93) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.93) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.12) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.93) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.90) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.13) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.97) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.93) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.93) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG06
;; size=8 bbWeight=0.97 PerfScore 1.45
-G_M9806_IG04: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG08
- ldr w6, [x0, #0x08]
- cmp w6, w22
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG08
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG08
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG08
tbnz w2, #31, G_M9806_IG08
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG08
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=64 bbWeight=0.96 PerfScore 22.97
-G_M9806_IG05: ; bbWeight=98.04, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=64 bbWeight=0.96 PerfScore 22.97
+G_M9806_IG05: ; bbWeight=98.04, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG05
;; size=52 bbWeight=98.04 PerfScore 1323.59
-G_M9806_IG06: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG06: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG21
+ bge G_M9806_IG13
;; size=12 bbWeight=0.97 PerfScore 1.93
-G_M9806_IG07: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG07: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.97 PerfScore 1.45
-G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG11
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG11
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x11, #16
- ; byrRegs +[x6]
- str d16, [x6, x8]
+ add x7, x13, #16
+ ; byrRegs +[x7]
...
-156 (-21.67%) : 75363.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,213 +11,167 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.96) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.96) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.96) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.02) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.89) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.89) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.11) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.11) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.07) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.05) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.97) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.95) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.08) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.98) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.96) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.96) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.05) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.97) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.95) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.08) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.98) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.96) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.96) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG06
;; size=8 bbWeight=0.98 PerfScore 1.47
-G_M9806_IG04: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG08
- ldr w6, [x0, #0x08]
- cmp w6, w22
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG08
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG08
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG08
tbnz w2, #31, G_M9806_IG08
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG08
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=64 bbWeight=0.97 PerfScore 23.34
-G_M9806_IG05: ; bbWeight=98.03, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=64 bbWeight=0.97 PerfScore 23.34
+G_M9806_IG05: ; bbWeight=98.03, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG05
;; size=52 bbWeight=98.03 PerfScore 1323.37
-G_M9806_IG06: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG06: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG21
+ bge G_M9806_IG13
;; size=12 bbWeight=0.98 PerfScore 1.96
-G_M9806_IG07: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG07: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.98 PerfScore 1.47
-G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG11
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG11
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x11, #16
- ; byrRegs +[x6]
- str d16, [x6, x8]
+ add x7, x13, #16
+ ; byrRegs +[x7]
...
-56 (-6.64%) : 108871.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -10,16 +10,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 3 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T13] ( 15, 104.18) ref -> x0 class-hnd single-def <float[][]>
+; V00 arg0 [V00,T13] ( 12, 103.91) ref -> x0 class-hnd single-def <float[][]>
; V01 arg1 [V01,T20] ( 7, 4.81) ref -> x1 class-hnd single-def <int[][]>
; V02 arg2 [V02,T21] ( 3, 3 ) ref -> x2 class-hnd single-def <double[]>
; V03 arg3 [V03,T24] ( 4, 2.27) ref -> x3 class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T22] ( 5, 2.74) int -> x4 single-def
+; V04 arg4 [V04,T22] ( 4, 2.74) int -> x4 single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T05] ( 25,1698.63) int -> x5
-; V08 loc3 [V08,T26] ( 6, 0.82) ref -> x8 class-hnd <float[]>
-; V09 loc4 [V09,T12] ( 13, 110.98) int -> x7
+; V07 loc2 [V07,T05] ( 20,1698.62) int -> x5
+; V08 loc3 [V08,T26] ( 5, 0.82) ref -> x8 class-hnd <float[]>
+; V09 loc4 [V09,T12] ( 12, 110.98) int -> x7
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T07] ( 18,1200.28) int -> x6
; V12 loc7 [V12,T31] ( 4, 199.58) float -> d16
@@ -45,7 +45,7 @@
; V32 cse2 [V32,T11] ( 5, 296.45) long -> xip0 "CSE - aggressive"
; V33 cse3 [V33,T25] ( 5, 2.99) long -> x15 "CSE - moderate"
; V34 cse4 [V34,T10] ( 16, 299.80) int -> x12 hoist multi-def "CSE - aggressive"
-; V35 cse5 [V35,T14] ( 9, 102.14) int -> x2 hoist "CSE - aggressive"
+; V35 cse5 [V35,T14] ( 7, 101.87) int -> x2 hoist "CSE - aggressive"
; V36 cse6 [V36,T15] ( 6, 101.10) byref -> x9 hoist "CSE - aggressive"
; V37 cse7 [V37,T18] ( 4, 100.06) int -> x10 hoist multi-def "CSE - aggressive"
; V38 cse8 [V38,T16] ( 4, 100.06) byref -> x11 hoist multi-def "CSE - aggressive"
@@ -75,18 +75,18 @@ G_M56974_IG02: ; bbWeight=1, gcrefRegs=010F {x0 x1 x2 x3 x8}, byrefRegs=0
;; size=8 bbWeight=1 PerfScore 3.50
G_M56974_IG03: ; bbWeight=0.27, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
cmp w2, w6
- ble G_M56974_IG15
+ ble G_M56974_IG12
;; size=8 bbWeight=0.27 PerfScore 0.41
G_M56974_IG04: ; bbWeight=0.27, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
- cbz x1, G_M56974_IG25
- cbz x0, G_M56974_IG25
- tbnz w6, #31, G_M56974_IG25
+ cbz x1, G_M56974_IG22
+ cbz x0, G_M56974_IG22
+ tbnz w6, #31, G_M56974_IG22
ldr w10, [x1, #0x08]
cmp w10, w2
- blt G_M56974_IG25
+ blt G_M56974_IG22
ldr w10, [x0, #0x08]
cmp w10, w2
- blt G_M56974_IG25
+ blt G_M56974_IG22
ldr w10, [x8, #0x08]
add x11, x8, #16
; byrRegs +[x11]
@@ -97,7 +97,7 @@ G_M56974_IG04: ; bbWeight=0.27, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0
;; size=56 bbWeight=0.27 PerfScore 5.40
G_M56974_IG05: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
cmp w7, w10
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
ldr s16, [x11, x13]
ldr w15, [x14, #0x08]
cmp w15, w5
@@ -105,35 +105,18 @@ G_M56974_IG05: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
;; size=24 bbWeight=98.79 PerfScore 889.12
G_M56974_IG06: ; bbWeight=395.16, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
cmp w5, w6
- bne G_M56974_IG18
+ bne G_M56974_IG15
;; size=8 bbWeight=395.16 PerfScore 592.75
G_M56974_IG07: ; bbWeight=395.16, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref
movi v17.16b, #0
- b G_M56974_IG19
+ b G_M56974_IG16
;; size=8 bbWeight=395.16 PerfScore 592.75
G_M56974_IG08: ; bbWeight=0.27, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs -[x8 x14]
; byrRegs -[x11]
- add x8, x0, #16
- ; byrRegs +[x8]
- ldr x8, [x8, w5, UXTW #3]
- ; gcrRegs +[x8]
- ; byrRegs -[x8]
- mov w7, wzr
- cmp w4, #0
- bgt G_M56974_IG11
- ;; size=20 bbWeight=0.27 PerfScore 1.48
-G_M56974_IG09: ; bbWeight=0.27, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
- ; gcrRegs -[x8]
- add w5, w5, #1
- cmp w2, w5
- ble G_M56974_IG37
- b G_M56974_IG08
- ;; size=16 bbWeight=0.27 PerfScore 0.81
-G_M56974_IG10: ; bbWeight=0.00, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
ldr w8, [x0, #0x08]
cmp w5, w8
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
add x7, x0, #16
; byrRegs +[x7]
ldr x8, [x7, w5, UXTW #3]
@@ -141,58 +124,52 @@ G_M56974_IG10: ; bbWeight=0.00, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200
mov w7, wzr
; byrRegs -[x7]
cmp w4, #0
- ble G_M56974_IG14
- ;; size=32 bbWeight=0.00 PerfScore 0.03
-G_M56974_IG11: ; bbWeight=0.27, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
- ldr w6, [x1, #0x08]
- cmp w5, w6
- bhs G_M56974_IG36
- ldr x6, [x9, w5, UXTW #3]
- ; gcrRegs +[x6]
- tbnz w7, #31, G_M56974_IG15
- ;; size=20 bbWeight=0.27 PerfScore 2.31
-G_M56974_IG12: ; bbWeight=8.68, gcrefRegs=014B {x0 x1 x3 x6 x8}, byrefRegs=0200 {x9}, byref, isz
- ldr w6, [x6, #0x08]
- ; gcrRegs -[x6]
- cmp w6, w7
- ble G_M56974_IG15
- ;; size=12 bbWeight=8.68 PerfScore 39.07
-G_M56974_IG13: ; bbWeight=0.27, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
- add w6, w5, #1
- b G_M56974_IG03
- ;; size=8 bbWeight=0.27 PerfScore 0.41
-G_M56974_IG14: ; bbWeight=0.00, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
+ bgt G_M56974_IG10
+ ;; size=32 bbWeight=0.27 PerfScore 2.71
+G_M56974_IG09: ; bbWeight=0.27, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs -[x8]
add w5, w5, #1
cmp w2, w5
- ble G_M56974_IG37
- b G_M56974_IG10
- ;; size=16 bbWeight=0.00 PerfScore 0.01
-G_M56974_IG15: ; bbWeight=0.47, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
+ ble G_M56974_IG34
+ b G_M56974_IG08
+ ;; size=16 bbWeight=0.27 PerfScore 0.81
+G_M56974_IG10: ; bbWeight=0.27, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs +[x8]
+ ldr w6, [x1, #0x08]
+ cmp w5, w6
+ bhs G_M56974_IG33
+ ldr x6, [x9, w5, UXTW #3]
+ ; gcrRegs +[x6]
+ tbnz w7, #31, G_M56974_IG12
+ ;; size=20 bbWeight=0.27 PerfScore 2.31
+G_M56974_IG11: ; bbWeight=8.68, gcrefRegs=014B {x0 x1 x3 x6 x8}, byrefRegs=0200 {x9}, byref, isz
+ ldr w6, [x6, #0x08]
+ ; gcrRegs -[x6]
+ cmp w6, w7
+ bgt G_M56974_IG14
+ ;; size=12 bbWeight=8.68 PerfScore 39.07
+G_M56974_IG12: ; bbWeight=0.47, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
add w7, w7, #1
cmp w7, w4
- blt G_M56974_IG11
+ blt G_M56974_IG10
;; size=12 bbWeight=0.47 PerfScore 0.94
-G_M56974_IG16: ; bbWeight=0.27, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
+G_M56974_IG13: ; bbWeight=0.27, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref
; gcrRegs -[x8]
- cbz x0, G_M56974_IG14
- tbnz w5, #31, G_M56974_IG14
- ldr w8, [x0, #0x08]
- cmp w8, w2
- blt G_M56974_IG14
- ;; size=20 bbWeight=0.27 PerfScore 1.76
-G_M56974_IG17: ; bbWeight=0.64, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref
b G_M56974_IG09
- ;; size=4 bbWeight=0.64 PerfScore 0.64
-G_M56974_IG18: ; bbWeight=395.16, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
- ; gcrRegs +[x8 x14]
+ ;; size=4 bbWeight=0.27 PerfScore 0.27
+G_M56974_IG14: ; bbWeight=0.27, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
+ ; gcrRegs +[x8]
+ add w6, w5, #1
+ b G_M56974_IG03
+ ;; size=8 bbWeight=0.27 PerfScore 0.41
+G_M56974_IG15: ; bbWeight=395.16, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+ ; gcrRegs +[x14]
; byrRegs +[x11]
mov x15, x14
; gcrRegs +[x15]
ldr wip0, [x15, #0x08]
cmp w5, wip0
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
@@ -203,14 +180,14 @@ G_M56974_IG18: ; bbWeight=395.16, gcrefRegs=410B {x0 x1 x3 x8 x14}, byref
sub wip0, wip0, #1
ldr w19, [x15, #0x08]
cmp wip0, w19
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
ldr s17, [x15, wip0, UXTW #2]
fcvt d17, s17
;; size=56 bbWeight=395.16 PerfScore 8100.87
-G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG16: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
; byrRegs -[x15]
fcvt d16, s16
fadd d16, d16, d17
@@ -218,15 +195,15 @@ G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
ldr x15, [x9, xip0]
; gcrRegs +[x15]
sxtw w19, w12
- tbnz w19, #31, G_M56974_IG24
+ tbnz w19, #31, G_M56974_IG21
;; size=24 bbWeight=98.79 PerfScore 1136.10
-G_M56974_IG20: ; bbWeight=3161.32, gcrefRegs=C10B {x0 x1 x3 x8 x14 x15}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG17: ; bbWeight=3161.32, gcrefRegs=C10B {x0 x1 x3 x8 x14 x15}, byrefRegs=0A00 {x9 x11}, byref, isz
ldr w15, [x15, #0x08]
; gcrRegs -[x15]
cmp w15, w19
- ble G_M56974_IG24
+ ble G_M56974_IG21
;; size=12 bbWeight=3161.32 PerfScore 14225.92
-G_M56974_IG21: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG18: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
add x15, x0, #16
; byrRegs +[x15]
ldr x15, [x15, xip0]
@@ -234,27 +211,27 @@ G_M56974_IG21: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
; byrRegs -[x15]
ldr w19, [x15, #0x08]
cmp w12, w19
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
ldr s17, [x15, w12, UXTW #2]
fcvt d17, s17
fcmp d17, d16
- bgt G_M56974_IG24
+ bgt G_M56974_IG21
;; size=40 bbWeight=98.79 PerfScore 1630.05
-G_M56974_IG22: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
; byrRegs -[x15]
...
benchmarks.run_tiered.linux.arm64.checked.mch
-424 (-31.74%) : 60343.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -9,93 +9,90 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T20] ( 11, 11.04) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T25] ( 7, 6.02) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T20] ( 7, 11 ) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T25] ( 4, 6 ) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T12] ( 6, 36 ) int -> x23
-; V03 loc1 [V03,T08] ( 19, 55.92) int -> x22
-; V04 loc2 [V04,T21] ( 7, 13 ) int -> x24
-; V05 loc3 [V05,T04] ( 34, 79.06) int -> x21
-; V06 loc4 [V06,T14] ( 22, 26.02) int -> x4
-; V07 loc5 [V07,T37] ( 8, 26.00) double -> d8
-; V08 loc6 [V08,T06] ( 22, 78.30) int -> registers
-; V09 loc7 [V09,T36] ( 9, 40.00) double -> d9
-; V10 loc8 [V10,T31] ( 4, 4 ) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T38] ( 5, 18 ) double -> d10
-; V12 loc10 [V12,T07] ( 19, 70.30) int -> x4
-; V13 loc11 [V13,T13] ( 9, 32 ) int -> x3
+; V03 loc1 [V03,T08] ( 13, 56 ) int -> x22
+; V04 loc2 [V04,T24] ( 2, 10 ) int -> x24
+; V05 loc3 [V05,T04] ( 19, 80 ) int -> x21
+; V06 loc4 [V06,T14] ( 12, 28 ) int -> x1
+; V07 loc5 [V07,T34] ( 5, 26 ) double -> d16
+; V08 loc6 [V08,T06] ( 14, 78.16) int -> x14
+; V09 loc7 [V09,T33] ( 6, 40 ) double -> d17
+; V10 loc8 [V10,T31] ( 2, 4 ) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T35] ( 3, 18 ) double -> d16
+; V12 loc10 [V12,T07] ( 12, 70.16) int -> x0
+; V13 loc11 [V13,T13] ( 7, 32 ) int -> x3
; V14 loc12 [V14,T17] ( 9, 18.24) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T19] ( 6, 14.20) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T39] ( 3, 18 ) double -> d16
+; V16 loc14 [V16,T36] ( 3, 18 ) double -> d16
; V17 loc15 [V17,T05] ( 13, 78.32) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T00] ( 9, 96.00) byref -> x6 "dup spill"
-; V20 tmp2 [V20,T26] ( 4, 8 ) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V21 tmp3 [V21,T03] ( 6, 96 ) byref -> registers "dup spill"
+; V19 tmp1 [V19,T00] ( 6, 96 ) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 8 ) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V21 tmp3 [V21,T01] ( 6, 96 ) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T22] ( 6, 12 ) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T01] ( 9, 96.00) ref -> x6 "arr expr"
-; V25 tmp7 [V25,T23] ( 6, 12 ) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T24] ( 6, 12 ) ref -> x3 "arr expr"
-; V27 tmp9 [V27,T02] ( 9, 96.00) ref -> x5 "arr expr"
-; V28 cse0 [V28,T29] ( 3, 5.94) ref -> x15 "CSE - moderate"
-; V29 cse1 [V29,T34] ( 3, 0.06) ref -> x2 "CSE - conservative"
-; V30 cse2 [V30,T35] ( 3, 0.06) ref -> x15 "CSE - conservative"
-; V31 cse3 [V31,T30] ( 3, 5.94) ref -> x2 "CSE - moderate"
-; V32 cse4 [V32,T11] ( 11, 45.54) long -> x27 "CSE - aggressive"
-; V33 cse5 [V33,T09] ( 3, 47.52) long -> x15 "CSE - aggressive"
-; V34 cse6 [V34,T28] ( 3, 6 ) long -> x14 "CSE - moderate"
-; V35 cse7 [V35,T33] ( 9, 0.46) long -> x27 "CSE - conservative"
-; V36 cse8 [V36,T32] ( 3, 0.48) long -> x0 "CSE - conservative"
-; V37 cse9 [V37,T10] ( 19, 47.02) byref -> x26 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T15] ( 4, 20.04) byref -> xip0 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T16] ( 4, 20.04) byref -> x1 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T18] ( 15, 14.64) int -> x25 multi-def "CSE - moderate"
-; V41 cse13 [V41,T27] ( 4, 7.92) int -> x28 "CSE - moderate"
+; V23 tmp5 [V23,T21] ( 3, 12 ) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T02] ( 6, 96 ) ref -> x15 "arr expr"
+; V25 tmp7 [V25,T22] ( 3, 12 ) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T23] ( 3, 12 ) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T03] ( 6, 96 ) ref -> x1 "arr expr"
+; V28 cse0 [V28,T28] ( 3, 6 ) ref -> x2 "CSE - moderate"
+; V29 cse1 [V29,T29] ( 3, 6 ) ref -> x15 "CSE - moderate"
+; V30 cse2 [V30,T11] ( 11, 46 ) long -> x27 "CSE - aggressive"
+; V31 cse3 [V31,T09] ( 3, 47.52) long -> x15 "CSE - aggressive"
+; V32 cse4 [V32,T30] ( 3, 6 ) long -> x14 "CSE - moderate"
+; V33 cse5 [V33,T32] ( 3, 0.48) long -> x0 "CSE - conservative"
+; V34 cse6 [V34,T10] ( 12, 47 ) byref -> x26 hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T18] ( 10, 16.32) int -> x25 multi-def "CSE - aggressive"
+; V36 cse8 [V36,T15] ( 4, 20.04) byref -> xip0 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T16] ( 4, 20.04) byref -> x1 hoist multi-def "CSE - aggressive"
+; V38 cse10 [V38,T26] ( 4, 8 ) int -> x28 "CSE - moderate"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M58112_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x60]!
+ stp x19, x20, [sp, #0x10]
+ stp x21, x22, [sp, #0x20]
+ stp x23, x24, [sp, #0x30]
+ stp x25, x26, [sp, #0x40]
+ stp x27, x28, [sp, #0x50]
mov fp, sp
- ldp x20, x19, [fp, #0xD1FFAB1E]
+ ldp x20, x19, [fp, #0xF0]
; gcrRegs +[x19-x20]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w22, w23, [fp, #0xE8]
+ ldp w21, w24, [fp, #0xE0]
+ ldr w3, [fp, #0xA8]
+ ldp x12, x15, [fp, #0x98]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=0.01 PerfScore 0.28
+ ldr d16, [fp, #0x90]
+ ldr w14, [fp, #0x8C]
+ ;; size=56 bbWeight=0.01 PerfScore 0.22
G_M58112_IG02: ; bbWeight=0.01, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
- b G_M58112_IG31
+ b G_M58112_IG21
;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M58112_IG03: ; bbWeight=1.98, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+G_M58112_IG03: ; bbWeight=2, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x26]
- sxtw w4, w21
- ubfiz x27, x4, #3, #32
+ sxtw w1, w21
+ ldr w25, [x19, #0x08]
+ cmp w1, w25
+ bhs G_M58112_IG31
+ ubfiz x27, x1, #3, #32
ldr x2, [x26, x27]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG41
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w1, w15
+ bhs G_M58112_IG31
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
- fabs d8, d16
- add w28, w4, #1
+ fabs d16, d16
+ add w28, w1, #1
sxtw w14, w28
; byrRegs -[x14]
cmp w14, w22
@@ -104,379 +101,233 @@ G_M58112_IG03: ; bbWeight=1.98, gcrefRegs=180000 {x19 x20}, byrefRegs=400
cmp w15, #0
ccmp w25, w22, nc, ge
blt G_M58112_IG08
- ;; size=72 bbWeight=1.98 PerfScore 39.60
-G_M58112_IG04: ; bbWeight=15.68, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
- ; gcrRegs -[x5]
- ldr x6, [x26, w14, UXTW #3]
- ; gcrRegs +[x6]
- ldr w15, [x6, #0x08]
- cmp w21, w15
- bhs G_M58112_IG41
- add x6, x6, #16
- ; gcrRegs -[x6]
- ; byrRegs +[x6]
- ldr d16, [x6, x27]
- fabs d9, d16
- fcmp d9, d8
+ ;; size=84 bbWeight=2 PerfScore 49.00
+G_M58112_IG04: ; bbWeight=15.84, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ldr x15, [x26, w14, UXTW #3]
+ ; gcrRegs +[x15]
+ ldr w12, [x15, #0x08]
+ cmp w21, w12
+ bhs G_M58112_IG31
+ add x15, x15, #16
+ ; gcrRegs -[x15]
+ ; byrRegs +[x15]
+ ldr d17, [x15, x27]
+ fabs d17, d17
+ fcmp d17, d16
ble G_M58112_IG06
- ;; size=36 bbWeight=15.68 PerfScore 235.22
-G_M58112_IG05: ; bbWeight=7.84, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
- ; byrRegs -[x6]
- sxtw w4, w14
- fmov d8, d9
- ;; size=8 bbWeight=7.84 PerfScore 7.84
-G_M58112_IG06: ; bbWeight=15.68, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ;; size=36 bbWeight=15.84 PerfScore 237.60
+G_M58112_IG05: ; bbWeight=7.92, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
+ ; byrRegs -[x15]
+ sxtw w1, w14
+ fmov d16, d17
+ ;; size=8 bbWeight=7.92 PerfScore 7.92
+G_M58112_IG06: ; bbWeight=15.84, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
add w14, w14, #1
cmp w14, w22
blt G_M58112_IG04
- ;; size=12 bbWeight=15.68 PerfScore 31.36
-G_M58112_IG07: ; bbWeight=1.98, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
+ ;; size=12 bbWeight=15.84 PerfScore 31.68
+G_M58112_IG07: ; bbWeight=2, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
b G_M58112_IG11
- ;; size=4 bbWeight=1.98 PerfScore 1.98
+ ;; size=4 bbWeight=2 PerfScore 2.00
G_M58112_IG08: ; bbWeight=0.16, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
cmp w14, w25
- bhs G_M58112_IG41
- ldr x6, [x26, w14, UXTW #3]
- ; gcrRegs +[x6]
- ldr w15, [x6, #0x08]
- cmp w21, w15
- bhs G_M58112_IG41
- add x15, x6, #16
+ bhs G_M58112_IG31
+ ldr x15, [x26, w14, UXTW #3]
+ ; gcrRegs +[x15]
+ ldr w12, [x15, #0x08]
+ cmp w21, w12
+ bhs G_M58112_IG31
+ add x15, x15, #16
+ ; gcrRegs -[x15]
; byrRegs +[x15]
- ldr d16, [x15, x27]
- fabs d9, d16
- fcmp d9, d8
+ ldr d17, [x15, x27]
+ fabs d17, d17
+ fcmp d17, d16
ble G_M58112_IG10
- ;; size=44 bbWeight=0.16 PerfScore 2.61
+ ;; size=44 bbWeight=0.16 PerfScore 2.64
G_M58112_IG09: ; bbWeight=0.08, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
- ; gcrRegs -[x6]
; byrRegs -[x15]
- sxtw w4, w14
- fmov d8, d9
+ sxtw w1, w14
+ fmov d16, d17
;; size=8 bbWeight=0.08 PerfScore 0.08
G_M58112_IG10: ; bbWeight=0.16, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
...
-152 (-14.13%) : 34797.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -10,60 +10,56 @@
; Final local variable assignments
;
; V00 arg0 [V00,T16] ( 7, 10.09) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T13] ( 9, 14.33) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T18] ( 12, 9.10) ref -> x20 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T19] ( 12, 9.10) ref -> x21 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T08] ( 12, 20 ) int -> x19 single-def
-; V05 loc0 [V05,T10] ( 12, 20.08) ref -> x24 class-hnd <double[][]>
-; V06 loc1 [V06,T09] ( 13, 20.32) ref -> x23 class-hnd <double[]>
-; V07 loc2 [V07,T28] ( 2, 2 ) long -> x25
+; V01 arg1 [V01,T13] ( 7, 14.21) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T18] ( 9, 9.08) ref -> x20 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T19] ( 9, 9.08) ref -> x21 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T12] ( 8, 17 ) int -> x19 single-def
+; V05 loc0 [V05,T09] ( 11, 20.08) ref -> x24 class-hnd <double[][]>
+; V06 loc1 [V06,T08] ( 10, 20.20) ref -> x23 class-hnd <double[]>
+; V07 loc2 [V07,T28] ( 2, 2 ) long -> x27
; V08 loc3 [V08,T02] ( 14, 94.16) int -> x2
-; V09 loc4 [V09,T07] ( 11, 27.04) int -> x3
-; V10 loc5 [V10,T00] ( 40,127.84) int -> x22
+; V09 loc4 [V09,T06] ( 6, 30 ) int -> x3
+; V10 loc5 [V10,T00] ( 32,127.52) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T36] ( 6, 64.00) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T01] ( 6, 96 ) ref -> x9 class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V14 tmp3 [V14,T37] ( 4, 64 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V12 tmp1 [V12,T33] ( 4, 64 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T01] ( 6, 96 ) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V14 tmp3 [V14,T34] ( 4, 64 ) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
; V16 tmp5 [V16,T20] ( 6, 10 ) ref -> registers class-hnd exact "Inline stloc first use temp" <<unknown class>>
-; V17 tmp6 [V17 ] ( 4, 8 ) int -> [fp+0x10] do-not-enreg[X] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp"
+; V17 tmp6 [V17 ] ( 4, 8 ) int -> [fp+0x18] do-not-enreg[X] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp"
;* V18 tmp7 [V18 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V19 tmp8 [V19,T03] ( 5, 64.32) ref -> x10 "arr expr"
-; V20 cse0 [V20,T11] ( 4, 20.04) ref -> x8 hoist multi-def "CSE - aggressive"
-; V21 cse1 [V21,T33] ( 2, 0.20) ref -> x5 hoist "CSE - conservative"
-; V22 cse2 [V22,T06] ( 6, 27.92) ref -> x5 multi-def "CSE - aggressive"
-; V23 cse3 [V23,T15] ( 6, 12.12) long -> x4 hoist multi-def "CSE - aggressive"
-; V24 cse4 [V24,T04] ( 3, 47.52) long -> x7 "CSE - aggressive"
-; V25 cse5 [V25,T05] ( 3, 47.04) long -> x4 "CSE - aggressive"
+; V19 tmp8 [V19,T03] ( 5, 64.32) ref -> x13 "arr expr"
+; V20 cse0 [V20,T10] ( 4, 20.04) ref -> x10 hoist multi-def "CSE - aggressive"
+; V21 cse1 [V21,T31] ( 2, 0.20) ref -> x7 hoist "CSE - conservative"
+; V22 cse2 [V22,T07] ( 6, 27.92) ref -> x7 multi-def "CSE - aggressive"
+; V23 cse3 [V23,T15] ( 6, 12.12) long -> x6 hoist multi-def "CSE - aggressive"
+; V24 cse4 [V24,T04] ( 3, 47.52) long -> x6 "CSE - aggressive"
+; V25 cse5 [V25,T05] ( 3, 47.52) long -> x9 "CSE - aggressive"
; V26 cse6 [V26,T17] ( 3, 11.88) long -> x0 "CSE - aggressive"
-; V27 cse7 [V27,T25] ( 3, 5.94) long -> x2 "CSE - aggressive"
-; V28 cse8 [V28,T29] ( 3, 0.48) long -> x4 "CSE - conservative"
-; V29 cse9 [V29,T30] ( 3, 0.48) long -> x6 "CSE - conservative"
-; V30 cse10 [V30,T31] ( 3, 0.48) long -> x4 "CSE - conservative"
-; V31 cse11 [V31,T34] ( 3, 0.12) long -> x0 "CSE - conservative"
-; V32 cse12 [V32,T35] ( 3, 0.06) long -> x2 "CSE - conservative"
-; V33 cse13 [V33,T27] ( 3, 4.05) byref -> x26 hoist "CSE - aggressive"
-; V34 cse14 [V34,T14] ( 4, 16.01) byref -> x25 hoist "CSE - aggressive"
-; V35 cse15 [V35,T24] ( 4, 8.08) int -> x6 hoist multi-def "CSE - aggressive"
-; V36 cse16 [V36,T23] ( 4, 8.08) byref -> x7 hoist multi-def "CSE - aggressive"
-; V37 cse17 [V37,T12] ( 4, 19.84) byref -> x2 hoist multi-def "CSE - aggressive"
-; V38 cse18 [V38,T26] ( 4, 5.04) long -> x26 hoist multi-def "CSE - aggressive"
-; V39 cse19 [V39,T21] ( 8, 9.04) byref -> x27 hoist multi-def "CSE - aggressive"
-; V40 cse20 [V40,T22] ( 8, 9.04) byref -> x28 hoist multi-def "CSE - aggressive"
-; V41 cse21 [V41,T32] ( 2, 0.24) byref -> x2 hoist "CSE - conservative"
+; V27 cse7 [V27,T25] ( 3, 6 ) long -> x2 "CSE - aggressive"
+; V28 cse8 [V28,T29] ( 3, 0.48) long -> x6 "CSE - conservative"
+; V29 cse9 [V29,T30] ( 3, 0.48) long -> x8 "CSE - conservative"
+; V30 cse10 [V30,T32] ( 3, 0.12) long -> x0 "CSE - conservative"
+; V31 cse11 [V31,T27] ( 3, 4.05) byref -> x5 hoist "CSE - aggressive"
+; V32 cse12 [V32,T14] ( 3, 16.01) byref -> x4 hoist "CSE - aggressive"
+; V33 cse13 [V33,T24] ( 4, 8.08) int -> x8 hoist multi-def "CSE - aggressive"
+; V34 cse14 [V34,T23] ( 4, 8.08) byref -> x9 hoist multi-def "CSE - aggressive"
+; V35 cse15 [V35,T11] ( 4, 20.04) byref -> x2 hoist multi-def "CSE - aggressive"
+; V36 cse16 [V36,T26] ( 4, 5.04) long -> x28 hoist multi-def "CSE - aggressive"
+; V37 cse17 [V37,T21] ( 6, 9.04) byref -> x25 hoist multi-def "CSE - aggressive"
+; V38 cse18 [V38,T22] ( 6, 9.04) byref -> x26 hoist multi-def "CSE - aggressive"
;
-; Lcl frame size = 8
+; Lcl frame size = 16
G_M9806_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
stp fp, lr, [sp, #-0x70]!
- str d8, [sp, #0x18]
stp x19, x20, [sp, #0x20]
stp x21, x22, [sp, #0x30]
stp x23, x24, [sp, #0x40]
stp x25, x26, [sp, #0x50]
stp x27, x28, [sp, #0x60]
mov fp, sp
- str xzr, [fp, #0x10] // [V17 tmp6]
+ str xzr, [fp, #0x18] // [V17 tmp6]
ldp x1, x0, [fp, #0xE0]
; gcrRegs +[x0-x1]
ldp x21, x20, [fp, #0xD0]
@@ -73,35 +69,41 @@ G_M9806_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byre
; gcrRegs +[x23-x24]
ldp w3, w2, [fp, #0xA8]
ldr w22, [fp, #0xA4]
- ;; size=60 bbWeight=0.01 PerfScore 0.23
+ ;; size=56 bbWeight=0.01 PerfScore 0.22
G_M9806_IG02: ; bbWeight=0.01, gcrefRegs=1B00003 {x0 x1 x20 x21 x23 x24}, byrefRegs=0000 {}, byref
- add x25, x1, #16
- ; byrRegs +[x25]
- add x26, x0, #16
- ; byrRegs +[x26]
- b G_M9806_IG27
+ add x4, x1, #16
+ ; byrRegs +[x4]
+ add x5, x0, #16
+ ; byrRegs +[x5]
+ b G_M9806_IG22
;; size=12 bbWeight=0.01 PerfScore 0.02
-G_M9806_IG03: ; bbWeight=1.98, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref
+G_M9806_IG03: ; bbWeight=2, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0030 {x4 x5}, byref, isz
; gcrRegs -[x23-x24]
- add x27, x20, #16
- ; byrRegs +[x27]
+ ldr w2, [x20, #0x08]
+ cmp w3, w2
+ bhs G_M9806_IG30
+ add x25, x20, #16
+ ; byrRegs +[x25]
ubfiz x2, x3, #3, #32
- ldr x24, [x27, x2]
+ ldr x24, [x25, x2]
; gcrRegs +[x24]
- add x28, x21, #16
- ; byrRegs +[x28]
- ldr x23, [x28, x2]
+ ldr w6, [x21, #0x08]
+ cmp w3, w6
+ bhs G_M9806_IG30
+ add x26, x21, #16
+ ; byrRegs +[x26]
+ ldr x23, [x26, x2]
; gcrRegs +[x23]
mov w22, wzr
- b G_M9806_IG26
- ;; size=28 bbWeight=1.98 PerfScore 18.81
-G_M9806_IG04: ; bbWeight=7.92, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000000 {x25 x26}, byref, isz
+ b G_M9806_IG21
+ ;; size=52 bbWeight=2 PerfScore 37.00
+G_M9806_IG04: ; bbWeight=8, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0030 {x4 x5}, byref, isz
; gcrRegs -[x24]
- ; byrRegs -[x27-x28]
+ ; byrRegs -[x25-x26]
mov w22, wzr
cbz x1, G_M9806_IG08
- ;; size=8 bbWeight=7.92 PerfScore 11.88
-G_M9806_IG05: ; bbWeight=3.96, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000000 {x25 x26}, byref, isz
+ ;; size=8 bbWeight=8 PerfScore 12.00
+G_M9806_IG05: ; bbWeight=4, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0030 {x4 x5}, byref, isz
cbz x23, G_M9806_IG08
ldr w2, [x1, #0x08]
cmp w2, #101
@@ -111,143 +113,88 @@ G_M9806_IG05: ; bbWeight=3.96, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byre
blt G_M9806_IG08
add x2, x23, #16
; byrRegs +[x2]
- ;; size=32 bbWeight=3.96 PerfScore 41.58
-G_M9806_IG06: ; bbWeight=15.68, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000004 {x2 x25 x26}, byref, isz
+ ;; size=32 bbWeight=4 PerfScore 42.00
+G_M9806_IG06: ; bbWeight=15.84, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0034 {x2 x4 x5}, byref, isz
; gcrRegs -[x23]
- ubfiz x4, x22, #3, #32
- ldr d8, [x25, x4]
- str d8, [x2, x4]
+ ubfiz x6, x22, #3, #32
+ ldr d16, [x4, x6]
+ str d16, [x2, x6]
add w22, w22, #1
cmp w22, #101
blt G_M9806_IG06
- ;; size=24 bbWeight=15.68 PerfScore 109.77
-G_M9806_IG07: ; bbWeight=3.96, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref
+ ;; size=24 bbWeight=15.84 PerfScore 110.88
+G_M9806_IG07: ; bbWeight=4, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0030 {x4 x5}, byref
; byrRegs -[x2]
b G_M9806_IG10
- ;; size=4 bbWeight=3.96 PerfScore 3.96
-G_M9806_IG08: ; bbWeight=0.04, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000000 {x25 x26}, byref
+ ;; size=4 bbWeight=4 PerfScore 4.00
+G_M9806_IG08: ; bbWeight=0.04, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0030 {x4 x5}, byref
; gcrRegs +[x23]
ldr wzr, [x1, #0x08]
add x2, x23, #16
; byrRegs +[x2]
;; size=8 bbWeight=0.04 PerfScore 0.14
-G_M9806_IG09: ; bbWeight=0.16, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000004 {x2 x25 x26}, byref, isz
- ldr w4, [x1, #0x08]
- cmp w22, w4
- bhs G_M9806_IG35
- ubfiz x4, x22, #3, #32
- ldr d8, [x25, x4]
- ldr w5, [x23, #0x08]
- cmp w22, w5
- bhs G_M9806_IG35
- str d8, [x2, x4]
+G_M9806_IG09: ; bbWeight=0.16, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0034 {x2 x4 x5}, byref, isz
+ ldr w6, [x1, #0x08]
+ cmp w22, w6
+ bhs G_M9806_IG30
+ ubfiz x6, x22, #3, #32
+ ldr d16, [x4, x6]
+ ldr w7, [x23, #0x08]
+ cmp w22, w7
+ bhs G_M9806_IG30
+ str d16, [x2, x6]
add w22, w22, #1
cmp w22, #101
blt G_M9806_IG09
- ;; size=48 bbWeight=0.16 PerfScore 2.53
-G_M9806_IG10: ; bbWeight=7.92, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref, isz
+ ;; size=48 bbWeight=0.16 PerfScore 2.56
+G_M9806_IG10: ; bbWeight=8, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0030 {x4 x5}, byref, isz
; gcrRegs -[x23]
; byrRegs -[x2]
add w3, w3, #1
cmp w3, w19
blt G_M9806_IG03
- ;; size=12 bbWeight=7.92 PerfScore 15.84
-G_M9806_IG11: ; bbWeight=1, gcrefRegs=300000 {x20 x21}, byrefRegs=0000 {}, byref
+ ;; size=12 bbWeight=8 PerfScore 16.00
+G_M9806_IG11: ; bbWeight=1, gcrefRegs=300000 {x20 x21}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x0-x1]
- ; byrRegs -[x25-x26]
- b G_M9806_IG16
- ;; size=4 bbWeight=1 PerfScore 1.00
-G_M9806_IG12: ; bbWeight=0.02, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref, isz
- ; gcrRegs +[x0-x1]
- ; byrRegs +[x25-x26]
- ldr w2, [x20, #0x08]
- cmp w3, w2
- bhs G_M9806_IG35
- add x27, x20, #16
- ; byrRegs +[x27]
- ubfiz x2, x3, #3, #32
- ldr x24, [x27, x2]
- ; gcrRegs +[x24]
- ldr w4, [x21, #0x08]
- cmp w3, w4
- bhs G_M9806_IG35
- add x28, x21, #16
- ; byrRegs +[x28]
- ldr x23, [x28, x2]
- ; gcrRegs +[x23]
- mov w22, wzr
- b G_M9806_IG26
- ;; size=52 bbWeight=0.02 PerfScore 0.37
...
-56 (-6.97%) : 49094.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -9,16 +9,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T08] ( 15, 12.06) ref -> x19 class-hnd single-def <float[][]>
+; V00 arg0 [V00,T08] ( 12, 12.04) ref -> x19 class-hnd single-def <float[][]>
; V01 arg1 [V01,T09] ( 9, 12.04) ref -> x20 class-hnd single-def <int[][]>
; V02 arg2 [V02,T21] ( 3, 3 ) ref -> x23 class-hnd single-def <double[]>
; V03 arg3 [V03,T20] ( 4, 6 ) ref -> x22 class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T10] ( 5, 12 ) int -> x21 single-def
+; V04 arg4 [V04,T10] ( 4, 12 ) int -> x21 single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T03] ( 17, 37.52) int -> x25
-; V08 loc3 [V08,T16] ( 6, 10 ) ref -> x27 class-hnd <float[]>
-; V09 loc4 [V09,T00] ( 13, 56 ) int -> x24
+; V07 loc2 [V07,T03] ( 12, 38.50) int -> x25
+; V08 loc3 [V08,T16] ( 5, 10 ) ref -> x27 class-hnd <float[]>
+; V09 loc4 [V09,T00] ( 12, 56 ) int -> x24
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T05] ( 16, 22.58) int -> x26
;* V12 loc7 [V12 ] ( 0, 0 ) float -> zero-ref
@@ -40,7 +40,7 @@
; V28 cse2 [V28,T15] ( 10, 10 ) long -> x8 multi-def "CSE - moderate"
; V29 cse3 [V29,T14] ( 4, 11.88) long -> x1 "CSE - aggressive"
; V30 cse4 [V30,T22] ( 4, 0.12) long -> x1 "CSE - conservative"
-; V31 cse5 [V31,T07] ( 9, 17 ) int -> x28 "CSE - aggressive"
+; V31 cse5 [V31,T07] ( 7, 16 ) int -> x28 "CSE - aggressive"
; V32 cse6 [V32,T06] ( 14, 18 ) int -> x5 multi-def "CSE - aggressive"
; TEMP_01 double -> [fp+0x10]
;
@@ -67,50 +67,29 @@ G_M56974_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
ldr w26, [fp, #0x9C]
;; size=60 bbWeight=0.01 PerfScore 0.23
G_M56974_IG02: ; bbWeight=0.01, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
- b G_M56974_IG14
+ b G_M56974_IG11
;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M56974_IG03: ; bbWeight=1.98, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG03: ; bbWeight=2, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x27]
+ ldr w0, [x19, #0x08]
+ cmp w25, w0
+ bhs G_M56974_IG24
add x0, x19, #16
; byrRegs +[x0]
ldr x27, [x0, w25, UXTW #3]
; gcrRegs +[x27]
mov w24, wzr
cmp w21, #0
- bgt G_M56974_IG09
- ;; size=20 bbWeight=1.98 PerfScore 10.89
-G_M56974_IG04: ; bbWeight=7.92, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
+ bgt G_M56974_IG06
+ ;; size=32 bbWeight=2 PerfScore 20.00
+G_M56974_IG04: ; bbWeight=8, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x27]
; byrRegs -[x0]
add w25, w25, #1
cmp w28, w25
bgt G_M56974_IG03
- ;; size=12 bbWeight=7.92 PerfScore 15.84
-G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
- ; gcrRegs -[x19-x20 x22-x23]
- b G_M56974_IG08
- ;; size=4 bbWeight=1 PerfScore 1.00
-G_M56974_IG06: ; bbWeight=0.02, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[x19-x20 x22-x23]
- ldr w0, [x19, #0x08]
- cmp w25, w0
- bhs G_M56974_IG27
- add x0, x19, #16
- ; byrRegs +[x0]
- ldr x27, [x0, w25, UXTW #3]
- ; gcrRegs +[x27]
- mov w24, wzr
- cmp w21, #0
- bgt G_M56974_IG09
- ;; size=32 bbWeight=0.02 PerfScore 0.20
-G_M56974_IG07: ; bbWeight=0.08, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[x27]
- ; byrRegs -[x0]
- add w25, w25, #1
- cmp w28, w25
- bgt G_M56974_IG06
- ;; size=12 bbWeight=0.08 PerfScore 0.16
-G_M56974_IG08: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
+ ;; size=12 bbWeight=8 PerfScore 16.00
+G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
; gcrRegs -[x19-x20 x22-x23]
ldp x27, x28, [sp, #0x60]
ldp x25, x26, [sp, #0x50]
@@ -122,60 +101,55 @@ G_M56974_IG08: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
add sp, sp, #112
ret lr
;; size=36 bbWeight=1 PerfScore 9.50
-G_M56974_IG09: ; bbWeight=2, gcVars=0000000000000000 {}, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M56974_IG06: ; bbWeight=2, gcVars=0000000000000000 {}, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, gcvars, byref, isz
; gcrRegs +[x19-x20 x22-x23 x27]
ldr w0, [x20, #0x08]
cmp w25, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x20, #16
; byrRegs +[x0]
ldr x0, [x0, w25, UXTW #3]
; gcrRegs +[x0]
; byrRegs -[x0]
- tbnz w24, #31, G_M56974_IG11
+ tbnz w24, #31, G_M56974_IG08
;; size=24 bbWeight=2 PerfScore 18.00
-G_M56974_IG10: ; bbWeight=16, gcrefRegs=8D80001 {x0 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG07: ; bbWeight=16, gcrefRegs=8D80001 {x0 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x0, #0x08]
; gcrRegs -[x0]
cmp w0, w24
- bgt G_M56974_IG13
+ bgt G_M56974_IG10
;; size=12 bbWeight=16 PerfScore 72.00
-G_M56974_IG11: ; bbWeight=8, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG08: ; bbWeight=8, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
add w24, w24, #1
cmp w24, w21
- blt G_M56974_IG09
+ blt G_M56974_IG06
;; size=12 bbWeight=8 PerfScore 16.00
-G_M56974_IG12: ; bbWeight=1, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG09: ; bbWeight=1, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref
; gcrRegs -[x27]
- cbz x19, G_M56974_IG07
- tbnz w25, #31, G_M56974_IG07
- ldr w0, [x19, #0x08]
- cmp w0, w28
- blt G_M56974_IG07
b G_M56974_IG04
- ;; size=24 bbWeight=1 PerfScore 7.50
-G_M56974_IG13: ; bbWeight=0.50, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
+ ;; size=4 bbWeight=1 PerfScore 1.00
+G_M56974_IG10: ; bbWeight=0.50, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
; gcrRegs +[x27]
add w26, w25, #1
;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M56974_IG14: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG11: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w28, [x23, #0x08]
cmp w28, w26
- ble G_M56974_IG11
- cbz x20, G_M56974_IG21
- cbz x19, G_M56974_IG21
- tbnz w26, #31, G_M56974_IG21
+ ble G_M56974_IG08
+ cbz x20, G_M56974_IG18
+ cbz x19, G_M56974_IG18
+ tbnz w26, #31, G_M56974_IG18
ldr w0, [x20, #0x08]
cmp w0, w28
- blt G_M56974_IG21
+ blt G_M56974_IG18
ldr w0, [x19, #0x08]
cmp w0, w28
- blt G_M56974_IG21
+ blt G_M56974_IG18
;; size=48 bbWeight=1 PerfScore 16.50
-G_M56974_IG15: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG12: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x27, #0x08]
cmp w24, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x27, #16
; byrRegs +[x0]
ldr s16, [x0, w24, UXTW #2]
@@ -205,15 +179,15 @@ G_M56974_IG15: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27},
; gcrRegs +[x4]
add w5, w24, #1
sxtw w6, w5
- tbnz w6, #31, G_M56974_IG18
+ tbnz w6, #31, G_M56974_IG15
;; size=100 bbWeight=3.96 PerfScore 134.64
-G_M56974_IG16: ; bbWeight=15.84, gcrefRegs=8D80018 {x3 x4 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG13: ; bbWeight=15.84, gcrefRegs=8D80018 {x3 x4 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; byrRegs -[x0]
ldr w0, [x4, #0x08]
cmp w0, w6
- ble G_M56974_IG18
+ ble G_M56974_IG15
;; size=12 bbWeight=15.84 PerfScore 71.28
-G_M56974_IG17: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG14: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x4]
add x0, x19, #16
; byrRegs +[x0]
@@ -222,16 +196,16 @@ G_M56974_IG17: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27
ldr w0, [x7, #0x08]
; byrRegs -[x0]
cmp w5, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x7, #16
; byrRegs +[x0]
ubfiz x8, x5, #2, #32
ldr s16, [x0, x8]
fcvt d16, s16
fcmp d16, d8
- ble G_M56974_IG19
+ ble G_M56974_IG16
;; size=44 bbWeight=1.98 PerfScore 34.65
-G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG15: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x7]
; byrRegs -[x0]
add x8, x19, #16
@@ -241,7 +215,7 @@ G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27
; byrRegs -[x8]
ldr w0, [x8, #0x08]
cmp w5, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x8, #16
; byrRegs +[x0]
ubfiz x8, x5, #2, #32
@@ -251,25 +225,25 @@ G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27
ldr w0, [x3, #0x08]
; byrRegs -[x0]
cmp w5, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x3, #16
; byrRegs +[x0]
str w25, [x0, x8]
;; size=56 bbWeight=1.98 PerfScore 38.61
-G_M56974_IG19: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG16: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x3]
; byrRegs -[x0]
add w26, w26, #1
cmp w28, w26
- bgt G_M56974_IG15
+ bgt G_M56974_IG12
;; size=12 bbWeight=3.96 PerfScore 7.92
-G_M56974_IG20: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
- b G_M56974_IG11
+G_M56974_IG17: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
+ b G_M56974_IG08
;; size=4 bbWeight=1 PerfScore 1.00
-G_M56974_IG21: ; bbWeight=0.04, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG18: ; bbWeight=0.04, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x27, #0x08]
cmp w24, w0
- bhs G_M56974_IG27
...
coreclr_tests.run.linux.arm64.checked.mch
-172 (-32.58%) : 314183.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
@@ -10,178 +10,112 @@
; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 9, 5.66) ref -> x19 class-hnd single-def <System.Collections.Generic.List`1[NamedSet][]>
-; V01 loc0 [V01,T07] ( 10, 7.32) int -> x23
-; V02 loc1 [V02,T02] ( 14,123.62) ref -> x22 class-hnd <System.Collections.Generic.List`1[NamedSet]>
-; V03 loc2 [V03,T08] ( 4, 1.57) ubyte -> x20
-; V04 loc3 [V04,T03] ( 18, 75.30) int -> x24
-; V05 loc4 [V05,T01] ( 10,218.31) int -> x21
+; V00 arg0 [V00,T07] ( 5, 5.14) ref -> x19 class-hnd single-def <System.Collections.Generic.List`1[NamedSet][]>
+; V01 loc0 [V01,T06] ( 5, 7.32) int -> x23
+; V02 loc1 [V02,T02] ( 8,123.62) ref -> x22 class-hnd <System.Collections.Generic.List`1[NamedSet]>
+; V03 loc2 [V03,T09] ( 2, 1.57) ubyte -> x21
+; V04 loc3 [V04,T03] ( 9, 75.30) int -> x20
+; V05 loc4 [V05,T01] ( 8,218.31) int -> x21
; V06 loc5 [V06,T00] ( 6,380.46) int -> x20
;# V07 OutArgs [V07 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V08 tmp1 [V08,T04] ( 6, 63.65) ref -> x26 class-hnd "Inlining Arg" <<unknown class>>
-; V09 tmp2 [V09,T05] ( 6, 63.65) ref -> x25 "arr expr"
+; V08 tmp1 [V08,T04] ( 3, 63.65) ref -> x0 class-hnd "Inlining Arg" <<unknown class>>
+; V09 tmp2 [V09,T05] ( 3, 63.65) ref -> x0 "arr expr"
+; V10 cse0 [V10,T08] ( 3, 4.71) int -> x0 hoist multi-def "CSE - aggressive"
;
-; Lcl frame size = 0
+; Lcl frame size = 8
G_M3612_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- stp x19, x20, [sp, #0x10]
- stp x21, x22, [sp, #0x20]
- stp x23, x24, [sp, #0x30]
- stp x25, x26, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldr x19, [fp, #0x88]
+ ldr x19, [fp, #0x78]
; gcrRegs +[x19]
- ldr w23, [fp, #0x84]
- ldr x22, [fp, #0x78]
+ ldr w23, [fp, #0x74]
+ ldr x22, [fp, #0x68]
; gcrRegs +[x22]
- ldp w20, w21, [fp, #0x68]
- ;; size=40 bbWeight=1 PerfScore 13.50
+ ldp w20, w21, [fp, #0x58]
+ ;; size=36 bbWeight=1 PerfScore 12.50
G_M3612_IG02: ; bbWeight=1, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref
- b G_M3612_IG18
+ b G_M3612_IG11
;; size=4 bbWeight=1 PerfScore 1.00
-G_M3612_IG03: ; bbWeight=0.52, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
+G_M3612_IG03: ; bbWeight=0.52, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x22]
+ cmp w23, w0
+ bhs G_M3612_IG15
add x0, x19, #16
; byrRegs +[x0]
ldr x22, [x0, w23, UXTW #3]
; gcrRegs +[x22]
- ;; size=8 bbWeight=0.52 PerfScore 1.81
+ ;; size=16 bbWeight=0.52 PerfScore 2.61
G_M3612_IG04: ; bbWeight=0.52, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
; byrRegs -[x0]
- mov w20, wzr
+ mov w21, wzr
ldr w0, [x22, #0x10]
- sub w24, w0, #2
- tbnz w24, #31, G_M3612_IG06
- ;; size=16 bbWeight=0.52 PerfScore 2.59
-G_M3612_IG05: ; bbWeight=10.50, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ sub w20, w0, #2
+ tbnz w20, #31, G_M3612_IG06
+ ;; size=16 bbWeight=0.52 PerfScore 2.61
+G_M3612_IG05: ; bbWeight=10.61, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
ldr w0, [x22, #0x10]
- cmp w24, w0
- bhs G_M3612_IG25
- ldr x25, [x22, #0x08]
- ; gcrRegs +[x25]
- ldr w0, [x25, #0x08]
- cmp w24, w0
- bhs G_M3612_IG22
- add x0, x25, #16
+ cmp w20, w0
+ bhs G_M3612_IG18
+ ldr x0, [x22, #0x08]
+ ; gcrRegs +[x0]
+ ldr w1, [x0, #0x08]
+ cmp w20, w1
+ bhs G_M3612_IG15
+ add x0, x0, #16
+ ; gcrRegs -[x0]
; byrRegs +[x0]
- ldr x0, [x0, w24, UXTW #3]
+ ldr x0, [x0, w20, UXTW #3]
; gcrRegs +[x0]
; byrRegs -[x0]
- ldr x26, [x0, #0x08]
- ; gcrRegs +[x26]
- ldr w0, [x26, #0x28]
+ ldr x0, [x0, #0x08]
+ ldr w1, [x0, #0x28]
+ ldr w0, [x0, #0x30]
; gcrRegs -[x0]
- ldr w1, [x26, #0x30]
- sub w0, w0, w1
+ sub w0, w1, w0
cbz w0, G_M3612_IG04
mov x0, x22
; gcrRegs +[x0]
- mov w1, w24
+ mov w1, w20
movz x2, #0xD1FFAB1E // code for <unknown method>
movk x2, #0xD1FFAB1E LSL #16
movk x2, #0xD1FFAB1E LSL #32
ldr x2, [x2]
blr x2
- ; gcrRegs -[x0 x25-x26]
+ ; gcrRegs -[x0]
; gcr arg pop 0
- sub w24, w24, #1
- tbz w24, #31, G_M3612_IG05
- ;; size=92 bbWeight=10.50 PerfScore 357.08
-G_M3612_IG06: ; bbWeight=1.04, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- cbnz w20, G_M3612_IG04
- ;; size=4 bbWeight=1.04 PerfScore 1.04
+ sub w20, w20, #1
+ tbz w20, #31, G_M3612_IG05
+ ;; size=92 bbWeight=10.61 PerfScore 360.68
+G_M3612_IG06: ; bbWeight=1.05, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ cbnz w21, G_M3612_IG04
+ ;; size=4 bbWeight=1.05 PerfScore 1.05
G_M3612_IG07: ; bbWeight=0.52, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
ldr w0, [x22, #0x10]
sub w21, w0, #2
- tbz w21, #31, G_M3612_IG17
- ;; size=12 bbWeight=0.52 PerfScore 2.33
-G_M3612_IG08: ; bbWeight=2.07, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
+ tbz w21, #31, G_M3612_IG10
+ ;; size=12 bbWeight=0.52 PerfScore 2.35
+G_M3612_IG08: ; bbWeight=2.09, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x22]
add w23, w23, #1
ldr w0, [x19, #0x08]
cmp w0, w23
- ble G_M3612_IG23
- ;; size=16 bbWeight=2.07 PerfScore 10.35
+ ble G_M3612_IG16
+ ;; size=16 bbWeight=2.09 PerfScore 10.46
G_M3612_IG09: ; bbWeight=0.52, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
b G_M3612_IG03
;; size=4 bbWeight=0.52 PerfScore 0.52
-G_M3612_IG10: ; bbWeight=0.01, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
- ldr w0, [x19, #0x08]
- cmp w23, w0
- bhs G_M3612_IG22
- add x0, x19, #16
- ; byrRegs +[x0]
- ldr x22, [x0, w23, UXTW #3]
- ; gcrRegs +[x22]
- ;; size=20 bbWeight=0.01 PerfScore 0.04
-G_M3612_IG11: ; bbWeight=0.01, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- ; byrRegs -[x0]
- mov w20, wzr
- ldr w0, [x22, #0x10]
- sub w24, w0, #2
- tbnz w24, #31, G_M3612_IG13
- ;; size=16 bbWeight=0.01 PerfScore 0.03
-G_M3612_IG12: ; bbWeight=0.11, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- ldr w0, [x22, #0x10]
- cmp w24, w0
- bhs G_M3612_IG25
- ldr x25, [x22, #0x08]
- ; gcrRegs +[x25]
- ldr w0, [x25, #0x08]
- cmp w24, w0
- bhs G_M3612_IG22
- add x0, x25, #16
- ; byrRegs +[x0]
- ldr x0, [x0, w24, UXTW #3]
- ; gcrRegs +[x0]
- ; byrRegs -[x0]
- ldr x26, [x0, #0x08]
- ; gcrRegs +[x26]
- ldr w0, [x26, #0x28]
- ; gcrRegs -[x0]
- ldr w1, [x26, #0x30]
- sub w0, w0, w1
- cbz w0, G_M3612_IG11
- mov x0, x22
- ; gcrRegs +[x0]
- mov w1, w24
- movz x2, #0xD1FFAB1E // code for <unknown method>
- movk x2, #0xD1FFAB1E LSL #16
- movk x2, #0xD1FFAB1E LSL #32
- ldr x2, [x2]
- blr x2
- ; gcrRegs -[x0 x25-x26]
- ; gcr arg pop 0
- sub w24, w24, #1
- tbz w24, #31, G_M3612_IG12
- ;; size=92 bbWeight=0.11 PerfScore 3.61
-G_M3612_IG13: ; bbWeight=0.01, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- cbnz w20, G_M3612_IG11
- ;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M3612_IG14: ; bbWeight=0.01, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- ldr w0, [x22, #0x10]
- sub w21, w0, #2
- tbz w21, #31, G_M3612_IG17
- ;; size=12 bbWeight=0.01 PerfScore 0.02
-G_M3612_IG15: ; bbWeight=0.02, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[x22]
- add w23, w23, #1
- ldr w0, [x19, #0x08]
- cmp w0, w23
- ble G_M3612_IG23
- ;; size=16 bbWeight=0.02 PerfScore 0.10
-G_M3612_IG16: ; bbWeight=0.01, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
- b G_M3612_IG10
- ;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M3612_IG17: ; bbWeight=9.77, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref
+G_M3612_IG10: ; bbWeight=9.77, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref
; gcrRegs +[x22]
sub w20, w21, #1
;; size=4 bbWeight=9.77 PerfScore 4.89
-G_M3612_IG18: ; bbWeight=9.77, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- tbnz w20, #31, G_M3612_IG20
+G_M3612_IG11: ; bbWeight=9.77, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ tbnz w20, #31, G_M3612_IG13
;; size=4 bbWeight=9.77 PerfScore 9.77
-G_M3612_IG19: ; bbWeight=90.23, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+G_M3612_IG12: ; bbWeight=90.23, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
mov x0, x22
; gcrRegs +[x0]
mov w1, w20
@@ -193,36 +127,33 @@ G_M3612_IG19: ; bbWeight=90.23, gcrefRegs=480000 {x19 x22}, byrefRegs=000
blr x3
; gcrRegs -[x0]
; gcr arg pop 0
- cbnz w0, G_M3612_IG24
+ cbnz w0, G_M3612_IG17
sub w20, w20, #1
- tbz w20, #31, G_M3612_IG19
+ tbz w20, #31, G_M3612_IG12
;; size=44 bbWeight=90.23 PerfScore 857.17
-G_M3612_IG20: ; bbWeight=39.09, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
...
-460 (-31.86%) : 251680.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,140 +10,139 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 20, 5.12) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T17] ( 7, 2.01) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T06] ( 13, 5.11) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T17] ( 4, 2.02) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T03] ( 6,103.01) int -> x21
-; V03 loc1 [V03,T18] ( 19, 3.14) int -> x23
-; V04 loc2 [V04,T32] ( 7, 0.02) int -> x24
-; V05 loc3 [V05,T08] ( 30, 6.19) int -> x22
-; V06 loc4 [V06,T22] ( 22, 0.18) int -> x4
-; V07 loc5 [V07,T40] ( 8, 1.12) double -> d8
-; V08 loc6 [V08,T15] ( 22, 4.23) int -> x6
-; V09 loc7 [V09,T39] ( 9, 2.13) double -> d9
-; V10 loc8 [V10,T33] ( 4, 0.02) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T41] ( 5, 1.03) double -> d10
-; V12 loc10 [V12,T16] ( 19, 4.15) int -> x4
-; V13 loc11 [V13,T13] ( 9, 5.09) int -> x3
+; V03 loc1 [V03,T18] ( 13, 3.14) int -> x23
+; V04 loc2 [V04,T32] ( 2, 0.02) int -> x24
+; V05 loc3 [V05,T08] ( 18, 6.20) int -> x22
+; V06 loc4 [V06,T22] ( 12, 0.19) int -> x3
+; V07 loc5 [V07,T35] ( 5, 1.12) double -> d8
+; V08 loc6 [V08,T15] ( 14, 4.22) int -> x4
+; V09 loc7 [V09,T34] ( 6, 2.13) double -> d9
+; V10 loc8 [V10,T31] ( 2, 0.02) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T36] ( 3, 1.03) double -> d16
+; V12 loc10 [V12,T16] ( 12, 4.14) int -> x0
+; V13 loc11 [V13,T13] ( 7, 5.09) int -> x3
; V14 loc12 [V14,T07] ( 9, 7.06) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T14] ( 6, 5.02) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T38] ( 3,100 ) double -> d16
+; V16 loc14 [V16,T33] ( 3,100 ) double -> d16
; V17 loc15 [V17,T01] ( 13,400.96) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T09] ( 9, 6.14) byref -> x6 "dup spill"
-; V20 tmp2 [V20,T26] ( 4, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V19 tmp1 [V19,T09] ( 6, 6.14) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V21 tmp3 [V21,T00] ( 6,593.92) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T23] ( 6, 0.06) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T10] ( 9, 6.14) ref -> registers "arr expr"
-; V25 tmp7 [V25,T24] ( 6, 0.06) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T25] ( 6, 0.06) ref -> x3 "arr expr"
-; V27 tmp9 [V27,T11] ( 9, 6.14) ref -> x5 "arr expr"
+; V23 tmp5 [V23,T23] ( 3, 0.06) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T10] ( 6, 6.14) ref -> x14 "arr expr"
+; V25 tmp7 [V25,T24] ( 3, 0.06) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T25] ( 3, 0.06) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T11] ( 6, 6.14) ref -> x1 "arr expr"
; V28 cse0 [V28,T28] ( 3, 0.03) ref -> x15 "CSE - conservative"
-; V29 cse1 [V29,T35] ( 3, 0.00) ref -> x15 "CSE - conservative"
-; V30 cse2 [V30,T36] ( 3, 0.00) ref -> x2 "CSE - conservative"
-; V31 cse3 [V31,T29] ( 3, 0.03) ref -> x2 "CSE - conservative"
-; V32 cse4 [V32,T02] ( 3,293.99) long -> x15 "CSE - aggressive"
-; V33 cse5 [V33,T21] ( 11, 2.10) long -> x27 "CSE - aggressive"
-; V34 cse6 [V34,T19] ( 3, 3.04) long -> x14 "CSE - aggressive"
-; V35 cse7 [V35,T20] ( 3, 2.97) long -> x0 "CSE - moderate"
-; V36 cse8 [V36,T31] ( 9, 0.02) long -> x26 "CSE - conservative"
-; V37 cse9 [V37,T04] ( 4,100.00) byref -> xip0 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T05] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T12] ( 19, 5.13) byref -> x25 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T27] ( 4, 0.04) int -> x28 "CSE - conservative"
-; V41 cse13 [V41,T34] ( 4, 0.00) int -> x27 "CSE - conservative"
-; V42 cse14 [V42,T30] ( 3, 0.03) long -> x26 "CSE - conservative"
-; V43 cse15 [V43,T37] ( 3, 0.00) long -> x14 "CSE - conservative"
+; V29 cse1 [V29,T29] ( 3, 0.03) ref -> x2 "CSE - conservative"
+; V30 cse2 [V30,T02] ( 3,293.99) long -> x15 "CSE - aggressive"
+; V31 cse3 [V31,T21] ( 11, 2.12) long -> x27 "CSE - aggressive"
+; V32 cse4 [V32,T19] ( 3, 3.04) long -> x14 "CSE - aggressive"
+; V33 cse5 [V33,T20] ( 3, 2.97) long -> x0 "CSE - moderate"
+; V34 cse6 [V34,T04] ( 4,100.00) byref -> xip0 hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T05] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
+; V36 cse8 [V36,T12] ( 12, 5.13) byref -> x25 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T26] ( 4, 0.04) int -> x28 "CSE - conservative"
+; V38 cse10 [V38,T30] ( 3, 0.03) long -> x26 "CSE - conservative"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M58112_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x70]!
+ stp d8, d9, [sp, #0x10]
+ stp x19, x20, [sp, #0x20]
+ stp x21, x22, [sp, #0x30]
+ stp x23, x24, [sp, #0x40]
+ stp x25, x26, [sp, #0x50]
+ stp x27, x28, [sp, #0x60]
mov fp, sp
ldp x20, x19, [fp, #0xD1FFAB1E]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w23, w21, [fp, #0xF8]
+ ldp w22, w24, [fp, #0xF0]
+ ldr w3, [fp, #0xB8]
+ ldp x12, x15, [fp, #0xA8]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=1 PerfScore 28.50
+ ldr d16, [fp, #0xA0]
+ ldr w14, [fp, #0x9C]
+ ;; size=60 bbWeight=1 PerfScore 23.50
G_M58112_IG02: ; bbWeight=1, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
b G_M58112_IG14
;; size=4 bbWeight=1 PerfScore 1.00
G_M58112_IG03: ; bbWeight=0.01, gcrefRegs=180000 {x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x25]
- sxtw w4, w22
- mov w26, w4
+ sxtw w3, w22
+ ldr w14, [x19, #0x08]
+ cmp w3, w14
+ bhs G_M58112_IG34
+ mov w26, w3
lsl x27, x26, #3
ldr x2, [x25, x27]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG52
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w3, w15
+ bhs G_M58112_IG34
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fabs d8, d16
- add w28, w4, #1
- sxtw w6, w28
- cmp w6, w23
+ add w28, w3, #1
+ sxtw w4, w28
+ cmp w4, w23
blt G_M58112_IG05
- ;; size=60 bbWeight=0.01 PerfScore 0.18
+ ;; size=72 bbWeight=0.01 PerfScore 0.23
G_M58112_IG04: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x5]
; byrRegs -[x14]
+ ldr w14, [x20, #0x08]
+ cmp w22, w14
+ bhs G_M58112_IG34
add x14, x20, #16
; byrRegs +[x14]
lsl x15, x26, #2
- str w4, [x14, x15]
+ str w3, [x14, x15]
ldr w14, [x19, #0x08]
; byrRegs -[x14]
- cmp w4, w14
- bhs G_M58112_IG52
- ldr x15, [x25, w4, UXTW #3]
+ cmp w3, w14
+ bhs G_M58112_IG34
+ ldr x15, [x25, w3, UXTW #3]
; gcrRegs +[x15]
- mov x7, x15
- ; gcrRegs +[x7]
- ldr w14, [x7, #0x08]
- cmp w22, w14
- bhs G_M58112_IG52
- add x14, x7, #16
+ mov x14, x15
+ ; gcrRegs +[x14]
+ ldr w12, [x14, #0x08]
+ cmp w22, w12
+ bhs G_M58112_IG34
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fcmp d16, #0.0
- beq G_M58112_IG37
+ beq G_M58112_IG38
b G_M58112_IG21
- ;; size=64 bbWeight=0.01 PerfScore 0.23
+ ;; size=76 bbWeight=0.01 PerfScore 0.28
G_M58112_IG05: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x7 x15]
+ ; gcrRegs -[x15]
; byrRegs -[x14]
- orr w14, w6, w23
+ orr w14, w4, w23
tbz w14, #31, G_M58112_IG08
;; size=8 bbWeight=0.01 PerfScore 0.02
G_M58112_IG06: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
ldr w14, [x19, #0x08]
- cmp w6, w14
- bhs G_M58112_IG52
- ldr x14, [x25, w6, UXTW #3]
+ cmp w4, w14
+ bhs G_M58112_IG34
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG52
+ bhs G_M58112_IG34
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -161,12 +160,12 @@ G_M58112_IG08: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
cmp w14, w23
blt G_M58112_IG06
;; size=12 bbWeight=0.01 PerfScore 0.05
-G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ldr x14, [x25, w6, UXTW #3]
+G_M58112_IG09: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG52
+ bhs G_M58112_IG34
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -174,18 +173,18 @@ G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
fabs d9, d16
fcmp d9, d8
bgt G_M58112_IG12
- ;; size=36 bbWeight=1.00 PerfScore 15.05
-G_M58112_IG10: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ;; size=36 bbWeight=1.01 PerfScore 15.20
+G_M58112_IG10: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; byrRegs -[x14]
...
-156 (-21.67%) : 255335.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,215 +11,169 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.98) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.98) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.98) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.00) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.93) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.93) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.07) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.07) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.04) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.02) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.98) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.97) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.06) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.99) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.98) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.98) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.02) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.98) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.97) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.06) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.99) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.98) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.98) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG07
;; size=8 bbWeight=0.99 PerfScore 1.48
-G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG09
- ldr w6, [x0, #0x08]
- cmp w6, w22
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG09
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG09
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG09
tbnz w2, #31, G_M9806_IG09
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG09
;; size=44 bbWeight=0.98 PerfScore 15.67
-G_M9806_IG05: ; bbWeight=0.98, gcrefRegs=1800AB {x0 x1 x3 x5 x7 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+G_M9806_IG05: ; bbWeight=0.98, gcrefRegs=18012B {x0 x1 x3 x5 x8 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG12
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=20 bbWeight=0.98 PerfScore 7.83
-G_M9806_IG06: ; bbWeight=98.02, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=20 bbWeight=0.98 PerfScore 7.83
+G_M9806_IG06: ; bbWeight=98.02, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG12
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG06
;; size=52 bbWeight=98.02 PerfScore 1323.28
-G_M9806_IG07: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG07: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG22
+ bge G_M9806_IG14
;; size=12 bbWeight=0.99 PerfScore 1.98
-G_M9806_IG08: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG08: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.99 PerfScore 1.48
-G_M9806_IG09: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG09: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG12
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG12
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG12
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG10: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG10: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG12
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
bhs G_M9806_IG12
- add x6, x11, #16
- ; byrRegs +[x6]
...
-156 (-21.67%) : 255348.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,213 +11,167 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.96) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.96) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.96) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.02) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.88) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.88) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.12) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.12) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.08) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.06) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.96) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.94) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.09) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.98) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.96) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.96) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.06) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.96) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.94) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.09) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.98) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.96) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.96) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG06
;; size=8 bbWeight=0.98 PerfScore 1.47
-G_M9806_IG04: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG08
- ldr w6, [x0, #0x08]
- cmp w6, w22
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG08
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG08
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG08
tbnz w2, #31, G_M9806_IG08
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG08
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=64 bbWeight=0.97 PerfScore 23.29
-G_M9806_IG05: ; bbWeight=98.03, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=64 bbWeight=0.97 PerfScore 23.29
+G_M9806_IG05: ; bbWeight=98.03, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG05
;; size=52 bbWeight=98.03 PerfScore 1323.40
-G_M9806_IG06: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG06: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG21
+ bge G_M9806_IG13
;; size=12 bbWeight=0.98 PerfScore 1.96
-G_M9806_IG07: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG07: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.98 PerfScore 1.47
-G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG11
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG11
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x11, #16
- ; byrRegs +[x6]
- str d16, [x6, x8]
+ add x7, x13, #16
+ ; byrRegs +[x7]
...
libraries.pmi.linux.arm64.checked.mch
-16 (-12.90%) : 91673.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint
@@ -8,10 +8,10 @@
; Final local variable assignments
;
; V00 loc0 [V00,T03] ( 3, 3 ) ref -> x19 class-hnd exact single-def <uint[]>
-; V01 loc1 [V01,T00] ( 7, 49 ) int -> x20
-; V02 loc2 [V02,T01] ( 2, 16 ) int -> x0
+; V01 loc1 [V01,T00] ( 6, 40.60) int -> x20
+; V02 loc2 [V02,T01] ( 2, 15.84) int -> x0
;# V03 OutArgs [V03 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V04 cse0 [V04,T02] ( 2, 9 ) byref -> x21 hoist "CSE - aggressive"
+; V04 cse0 [V04,T02] ( 2, 8.92) byref -> x21 hoist "CSE - aggressive"
;
; Lcl frame size = 8
@@ -34,7 +34,7 @@ G_M39919_IG02: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
add x21, x19, #16
; byrRegs +[x21]
;; size=32 bbWeight=1 PerfScore 4.50
-G_M39919_IG03: ; bbWeight=8, gcrefRegs=80000 {x19}, byrefRegs=200000 {x21}, byref, isz
+G_M39919_IG03: ; bbWeight=7.92, gcrefRegs=80000 {x19}, byrefRegs=200000 {x21}, byref, isz
; gcrRegs -[x0]
mov w0, w20
movz x1, #0xD1FFAB1E // code for Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:CalcEntry(uint):uint
@@ -42,13 +42,11 @@ G_M39919_IG03: ; bbWeight=8, gcrefRegs=80000 {x19}, byrefRegs=200000 {x21
movk x1, #0xD1FFAB1E LSL #32
ldr x1, [x1]
blr x1
- cmp w20, #0xD1FFAB1E
- bhs G_M39919_IG06
str w0, [x21, w20, UXTW #2]
add w20, w20, #1
cmp w20, #255
bls G_M39919_IG03
- ;; size=48 bbWeight=8 PerfScore 84.00
+ ;; size=40 bbWeight=7.92 PerfScore 71.28
G_M39919_IG04: ; bbWeight=1, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
; byrRegs -[x21]
mov x0, x19
@@ -60,13 +58,8 @@ G_M39919_IG05: ; bbWeight=1, epilog, nogc, extend
ldp fp, lr, [sp], #0x30
ret lr
;; size=16 bbWeight=1 PerfScore 5.00
-G_M39919_IG06: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
- ; gcrRegs -[x0 x19]
- bl CORINFO_HELP_RNGCHKFAIL
- brk_unix #0
- ;; size=8 bbWeight=0 PerfScore 0.00
-; Total bytes of code 124, prolog size 16, PerfScore 97.50, instruction count 31, allocated bytes for code 124 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
+; Total bytes of code 108, prolog size 16, PerfScore 84.78, instruction count 27, allocated bytes for code 108 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
; ============================================================
Unwind Info:
@@ -77,7 +70,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 31 (0x0001f) Actual length = 124 (0x00007c)
+ Function Length : 27 (0x0001b) Actual length = 108 (0x00006c)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
libraries_tests.run.linux.arm64.Release.mch
-76 (-3.48%) : 309448.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
@@ -13,13 +13,13 @@
;* V00 this [V00 ] ( 0, 0 ) ref -> zero-ref this class-hnd single-def <System.Globalization.Tests.CompareInfoCompareTests>
;* V01 arg1 [V01 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def <int[]>
; V02 arg2 [V02,T59] ( 3, 2 ) ref -> x19 class-hnd single-def <int[]>
-; V03 loc0 [V03,T40] ( 10, 302.43) ref -> x22 class-hnd exact <System.Collections.Generic.List`1[ushort]>
+; V03 loc0 [V03,T40] ( 9, 302.43) ref -> x22 class-hnd exact <System.Collections.Generic.List`1[ushort]>
;* V04 loc1 [V04 ] ( 0, 0 ) ushort -> zero-ref
;* V05 loc2 [V05 ] ( 0, 0 ) ushort -> zero-ref
-; V06 loc3 [V06,T61] ( 6, 0.15) ref -> x27 class-hnd <int[]>
-; V07 loc4 [V07,T60] ( 10, 0.30) int -> x26
-; V08 loc5 [V08,T08] ( 6, 1854.52) int -> x20
-; V09 loc6 [V09,T57] ( 9, 16.81) int -> x25
+; V06 loc3 [V06,T62] ( 2, 0.08) ref -> x27 class-hnd <int[]>
+; V07 loc4 [V07,T60] ( 5, 0.19) int -> x26
+; V08 loc5 [V08,T08] ( 5, 1854.52) int -> x20
+; V09 loc6 [V09,T57] ( 8, 16.81) int -> x25
; V10 loc7 [V10,T47] ( 4, 200 ) ushort -> x23
; V11 loc8 [V11,T48] ( 3, 197.60) ushort -> x24
; V12 loc9 [V12,T14] ( 8, 590.42) int -> x21
@@ -28,13 +28,13 @@
; V15 loc12 [V15,T49] ( 2, 195.21) int -> [fp+0x19C] spill-single-def tier0-frame
; V16 loc13 [V16,T50] ( 2, 195.21) int -> [fp+0x198] spill-single-def tier0-frame
; V17 loc14 [V17 ] ( 45,26744.56) struct (40) [fp+0x170] do-not-enreg[XS] addr-exposed ld-addr-op tier0-frame <System.Runtime.CompilerServices.DefaultInterpolatedStringHandler>
-; V18 loc15 [V18,T64] ( 3, 0 ) ref -> x19 class-hnd <int[]>
-; V19 loc16 [V19,T63] ( 5, 0 ) int -> x20
+; V18 loc15 [V18,T65] ( 3, 0 ) ref -> x19 class-hnd <int[]>
+; V19 loc16 [V19,T64] ( 5, 0 ) int -> x20
;* V20 loc17 [V20 ] ( 0, 0 ) ref -> zero-ref class-hnd exact <<unknown class>>
;# V21 OutArgs [V21 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V22 tmp1 [V22 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Collections.Generic.List`1[ushort]>
-; V23 tmp2 [V23,T62] ( 7, 0 ) ref -> x21 class-hnd exact "NewObj constructor temp" <<unknown class>>
-; V24 tmp3 [V24,T65] ( 3, 0 ) ref -> x23 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V23 tmp2 [V23,T63] ( 7, 0 ) ref -> x21 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V24 tmp3 [V24,T66] ( 3, 0 ) ref -> x23 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V25 tmp4 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
;* V26 tmp5 [V26 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V27 tmp6 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
@@ -711,13 +711,14 @@
; V698 tmp677 [V698,T38] ( 2, 390.42) ref -> [fp+0x20] spill-single-def "argument with side effect"
;* V699 tmp678 [V699 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
; V700 tmp679 [V700,T39] ( 2, 390.42) ref -> x1 "argument with side effect"
-; V701 cse0 [V701,T21] ( 5, 488.02) ref -> [fp+0x18] spill-single-def "CSE - moderate"
-; V702 cse1 [V702,T42] ( 3, 292.81) int -> x1 "CSE - moderate"
-; V703 cse2 [V703,T43] ( 3, 292.81) int -> x1 "CSE - moderate"
-; V704 cse3 [V704,T44] ( 3, 292.81) int -> x1 "CSE - moderate"
-; V705 cse4 [V705,T45] ( 3, 292.81) int -> x1 "CSE - moderate"
-; V706 cse5 [V706,T46] ( 3, 292.81) int -> x1 "CSE - moderate"
-; V707 cse6 [V707,T07] ( 3,12688.55) int -> x1 "CSE - moderate"
+; V701 cse0 [V701,T61] ( 3, 0.11) int -> x0 "CSE - conservative"
+; V702 cse1 [V702,T21] ( 5, 488.02) ref -> [fp+0x18] spill-single-def "CSE - moderate"
+; V703 cse2 [V703,T42] ( 3, 292.81) int -> x1 "CSE - moderate"
+; V704 cse3 [V704,T43] ( 3, 292.81) int -> x1 "CSE - moderate"
+; V705 cse4 [V705,T44] ( 3, 292.81) int -> x1 "CSE - moderate"
+; V706 cse5 [V706,T45] ( 3, 292.81) int -> x1 "CSE - moderate"
+; V707 cse6 [V707,T46] ( 3, 292.81) int -> x1 "CSE - moderate"
+; V708 cse7 [V708,T07] ( 3,12688.55) int -> x1 "CSE - moderate"
;
; Lcl frame size = 128
@@ -747,12 +748,12 @@ G_M28013_IG02: ; bbWeight=1, gcrefRegs=8480000 {x19 x22 x27}, byrefRegs=0
G_M28013_IG03: ; bbWeight=2.40, gcrefRegs=8480000 {x19 x22 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x22, #0x10]
cmp w25, w0
- bhs G_M28013_IG29
+ bhs G_M28013_IG25
ldr x0, [x22, #0x08]
; gcrRegs +[x0]
ldr w1, [x0, #0x08]
cmp w25, w1
- bhs G_M28013_IG23
+ bhs G_M28013_IG19
add x0, x0, #16
; gcrRegs -[x0]
; byrRegs +[x0]
@@ -779,12 +780,12 @@ G_M28013_IG04: ; bbWeight=2.40, gcrefRegs=8480000 {x19 x22 x27}, byrefReg
G_M28013_IG05: ; bbWeight=97.60, gcrefRegs=8480000 {x19 x22 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x22, #0x10]
cmp w21, w0
- bhs G_M28013_IG29
+ bhs G_M28013_IG25
ldr x0, [x22, #0x08]
; gcrRegs +[x0]
ldr w1, [x0, #0x08]
cmp w21, w1
- bhs G_M28013_IG23
+ bhs G_M28013_IG19
add x0, x0, #16
; gcrRegs -[x0]
; byrRegs +[x0]
@@ -875,7 +876,7 @@ G_M28013_IG05: ; bbWeight=97.60, gcrefRegs=8480000 {x19 x22 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG30
+ bhi G_M28013_IG26
ldr x2, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x2]
ubfiz x3, x0, #1, #32
@@ -895,7 +896,7 @@ G_M28013_IG05: ; bbWeight=97.60, gcrefRegs=8480000 {x19 x22 x27}, byrefRe
; gcr arg pop 0
ldr w0, [fp, #0x8C] // [V32 tmp11]
cmp w0, #15
- blo G_M28013_IG24
+ blo G_M28013_IG20
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -917,8 +918,8 @@ G_M28013_IG06: ; bbWeight=97.60, gcVars=00000000000000000000000000000000
movz x3, #0xD1FFAB1E
movk x3, #0xD1FFAB1E LSL #16
movk x3, #0xD1FFAB1E LSL #32
- str x3, [fp, #0x18] // [V701 cse0]
- ; GC ptr vars +{V701}
+ str x3, [fp, #0x18] // [V702 cse1]
+ ; GC ptr vars +{V702}
mov x2, x3
; gcrRegs +[x2]
movz x4, #0xD1FFAB1E // code for <unknown method>
@@ -931,7 +932,7 @@ G_M28013_IG06: ; bbWeight=97.60, gcVars=00000000000000000000000000000000
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG30
+ bhi G_M28013_IG26
ldr x2, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x2]
ubfiz x3, x0, #1, #32
@@ -951,7 +952,7 @@ G_M28013_IG06: ; bbWeight=97.60, gcVars=00000000000000000000000000000000
; gcr arg pop 0
ldr w0, [fp, #0x88] // [V42 tmp21]
cmp w0, #2
- blo G_M28013_IG25
+ blo G_M28013_IG21
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -963,12 +964,12 @@ G_M28013_IG06: ; bbWeight=97.60, gcVars=00000000000000000000000000000000
add w0, w0, #2
str w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
;; size=164 bbWeight=97.60 PerfScore 4099.38
-G_M28013_IG07: ; bbWeight=97.60, gcVars=00000000000000000000000000200000 {V701}, gcrefRegs=8480000 {x19 x22 x27}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG07: ; bbWeight=97.60, gcVars=00000000000000000000000000200000 {V702}, gcrefRegs=8480000 {x19 x22 x27}, byrefRegs=0000 {}, gcvars, byref, isz
; byrRegs -[x2]
; GC ptr vars -{V43}
add x0, fp, #0xD1FFAB1E // [V17 loc14]
mov w1, w28
- ldr x2, [fp, #0x18] // [V701 cse0]
+ ldr x2, [fp, #0x18] // [V702 cse1]
; gcrRegs +[x2]
movz x3, #0xD1FFAB1E // code for <unknown method>
movk x3, #0xD1FFAB1E LSL #16
@@ -980,7 +981,7 @@ G_M28013_IG07: ; bbWeight=97.60, gcVars=00000000000000000000000000200000
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG30
+ bhi G_M28013_IG26
ldr x2, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x2]
ubfiz x3, x0, #1, #32
@@ -999,7 +1000,7 @@ G_M28013_IG07: ; bbWeight=97.60, gcVars=00000000000000000000000000200000
; gcr arg pop 0
ldr w0, [fp, #0x84] // [V52 tmp31]
cmp w0, #13
- blo G_M28013_IG26
+ blo G_M28013_IG22
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -1015,7 +1016,7 @@ G_M28013_IG08: ; bbWeight=97.60, gcrefRegs=8480000 {x19 x22 x27}, byrefRe
; byrRegs -[x28]
add x0, fp, #0xD1FFAB1E // [V17 loc14]
mov w1, w24
- ldr x2, [fp, #0x18] // [V701 cse0]
+ ldr x2, [fp, #0x18] // [V702 cse1]
; gcrRegs +[x2]
movz x3, #0xD1FFAB1E // code for <unknown method>
movk x3, #0xD1FFAB1E LSL #16
@@ -1027,7 +1028,7 @@ G_M28013_IG08: ; bbWeight=97.60, gcrefRegs=8480000 {x19 x22 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG30
+ bhi G_M28013_IG26
ldr x2, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x2]
ubfiz x3, x0, #1, #32
@@ -1046,7 +1047,7 @@ G_M28013_IG08: ; bbWeight=97.60, gcrefRegs=8480000 {x19 x22 x27}, byrefRe
; gcr arg pop 0
ldr w0, [fp, #0x80] // [V62 tmp41]
cmp w0, #2
- blo G_M28013_IG27
+ blo G_M28013_IG23
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -1060,20 +1061,20 @@ G_M28013_IG09: ; bbWeight=97.60, gcrefRegs=8480000 {x19 x22 x27}, byrefRe
; byrRegs -[x28]
add x0, fp, #0xD1FFAB1E // [V17 loc14]
ldr w1, [fp, #0xD1FFAB1E] // [V14 loc11]
- ldr x2, [fp, #0x18] // [V701 cse0]
+ ldr x2, [fp, #0x18] // [V702 cse1]
; gcrRegs +[x2]
movz x3, #0xD1FFAB1E // code for <unknown method>
movk x3, #0xD1FFAB1E LSL #16
movk x3, #0xD1FFAB1E LSL #32
ldr x3, [x3]
- ; GC ptr vars -{V701}
+ ; GC ptr vars -{V702}
blr x3
; gcrRegs -[x2]
; gcr arg pop 0
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG30
+ bhi G_M28013_IG26
ldr x2, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x2]
ubfiz x3, x0, #1, #32
@@ -1092,7 +1093,7 @@ G_M28013_IG09: ; bbWeight=97.60, gcrefRegs=8480000 {x19 x22 x27}, byrefRe
; gcr arg pop 0
ldr w0, [fp, #0x7C] // [V72 tmp51]
cmp w0, #22
- blo G_M28013_IG28
+ blo G_M28013_IG24
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -1135,7 +1136,7 @@ G_M28013_IG13: ; bbWeight=97.60, gcrefRegs=8480000 {x19 x22 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG30
+ bhi G_M28013_IG26
;; size=16 bbWeight=97.60 PerfScore 536.82
G_M28013_IG14: ; bbWeight=12493.34, gcrefRegs=8480000 {x19 x22 x27}, byrefRegs=0000 {}, byref, isz
ldr x2, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
@@ -1252,38 +1253,12 @@ G_M28013_IG17: ; bbWeight=2.40, gcrefRegs=8480000 {x19 x22 x27}, byrefReg
bgt G_M28013_IG03
;; size=36 bbWeight=2.40 PerfScore 19.17
G_M28013_IG18: ; bbWeight=0.04, gcrefRegs=8480000 {x19 x22 x27}, byrefRegs=0000 {}, byref, isz
- cbz x27, G_M28013_IG22
- tbnz w26, #31, G_M28013_IG22
- ;; size=8 bbWeight=0.04 PerfScore 0.08
-G_M28013_IG19: ; bbWeight=0.08, gcrefRegs=8480000 {x19 x22 x27}, byrefRegs=0000 {}, byref, isz
add w26, w26, #1
ldr w0, [x27, #0x08]
cmp w0, w26
- ble G_M28013_IG34
...
-80 (-1.97%) : 535920.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
@@ -14,8 +14,8 @@
; V02 arg2 [V02,T12] ( 5, 6.61) ref -> x20 class-hnd single-def <System.String>
;* V03 arg3 [V03 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def <System.ReadOnlySpan`1[System.Object]>
; V04 loc0 [V04,T45] ( 4, 2.22) ref -> x24 class-hnd single-def <System.ICustomFormatter>
-; V05 loc1 [V05,T02] ( 72, 38.13) int -> x25 ld-addr-op
-; V06 loc2 [V06,T06] ( 34, 15.62) ushort -> [fp+0xEC]
+; V05 loc1 [V05,T02] ( 62, 38.13) int -> x25 ld-addr-op
+; V06 loc2 [V06,T06] ( 30, 15.62) ushort -> [fp+0xEC]
; V07 loc3 [V07,T24] ( 12, 4.44) int -> [fp+0xE8]
; V08 loc4 [V08,T34] ( 5, 2.99) ubyte -> [fp+0xE4]
;* V09 loc5 [V09 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op <System.ReadOnlySpan`1[ushort]>
@@ -250,8 +250,8 @@
; V238 cse4 [V238,T65] ( 3, 1.32) long -> x5 "CSE - conservative"
; V239 cse5 [V239,T75] ( 3, 0.99) ref -> x1 "CSE - conservative"
; V240 cse6 [V240,T88] ( 3, 0.56) long -> x0 "CSE - conservative"
-; V241 cse7 [V241,T07] ( 20, 14.70) int -> x27 "CSE - aggressive"
-; V242 cse8 [V242,T10] ( 17, 11.80) byref -> x28 "CSE - moderate"
+; V241 cse7 [V241,T07] ( 18, 14.70) int -> x27 "CSE - aggressive"
+; V242 cse8 [V242,T10] ( 15, 11.80) byref -> x28 "CSE - moderate"
; V243 cse9 [V243,T99] ( 2, 0.10) ref -> x28 "CSE - moderate"
; V244 rat0 [V244,T15] ( 5, 7 ) ref -> x24 class-hnd "replacement local" <System.ICustomFormatter>
; V245 rat1 [V245,T13] ( 6, 8.25) ref -> x0 class-hnd "replacement local" <System.ISpanFormattable>
@@ -308,7 +308,7 @@ G_M4730_IG05: ; bbWeight=0.50, gcrefRegs=1380002 {x1 x19 x20 x21 x24}, by
movk x2, #0xD1FFAB1E LSL #16
movk x2, #0xD1FFAB1E LSL #32
cmp x0, x2
- bne G_M4730_IG138
+ bne G_M4730_IG132
;; size=24 bbWeight=0.50 PerfScore 3.00
G_M4730_IG06: ; bbWeight=1, gcrefRegs=1380000 {x19 x20 x21 x24}, byrefRegs=400000 {x22}, byref
; gcrRegs -[x1]
@@ -322,7 +322,7 @@ G_M4730_IG06: ; bbWeight=1, gcrefRegs=1380000 {x19 x20 x21 x24}, byrefReg
G_M4730_IG07: ; bbWeight=2.30, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=400000 {x22}, byref, isz
ldr w27, [x20, #0x08]
cmp w27, w25
- bls G_M4730_IG95
+ bls G_M4730_IG89
;; size=12 bbWeight=2.30 PerfScore 10.34
G_M4730_IG08: ; bbWeight=1.31, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=400000 {x22}, byref, isz
add x28, x20, #12
@@ -364,12 +364,12 @@ G_M4730_IG08: ; bbWeight=1.31, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
; gcr arg pop 0
sxtw w1, w0
str w1, [fp, #0xDC] // [V15 loc11]
- tbnz w1, #31, G_M4730_IG134
+ tbnz w1, #31, G_M4730_IG128
;; size=116 bbWeight=1.31 PerfScore 35.39
G_M4730_IG09: ; bbWeight=1.30, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
ldr w2, [fp, #0x88] // [V170 tmp148]
cmp w1, w2
- bhi G_M4730_IG155
+ bhi G_M4730_IG149
cmp w1, #0
cset x0, ge
movz x2, #0xD1FFAB1E // code for <unknown method>
@@ -465,7 +465,7 @@ G_M4730_IG17: ; bbWeight=0.36, gcVars=00000000000000002080000000080000 {V
asr x9, x5, #32
ldr w5, [fp, #0x80] // [V218 tmp196]
cmp w9, w5
- bgt G_M4730_IG141
+ bgt G_M4730_IG135
b G_M4730_IG19
;; size=92 bbWeight=0.36 PerfScore 8.48
G_M4730_IG18: ; bbWeight=0.03, gcVars=00000000000000000000000000000000 {}, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=400000 {x22}, gcvars, byref
@@ -509,7 +509,7 @@ G_M4730_IG19: ; bbWeight=0.36, gcVars=00000000000002000080000000080000 {V
; gcr arg pop 0
ldr w1, [fp, #0xA4] // [V120 tmp98]
cmp w1, #10
- blo G_M4730_IG89
+ blo G_M4730_IG83
b G_M4730_IG29
;; size=72 bbWeight=0.36 PerfScore 7.22
G_M4730_IG20: ; bbWeight=0.30, gcVars=00000000000000000000000008000000 {V169}, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400001 {x0 x22 x28}, gcvars, byref
@@ -545,7 +545,7 @@ G_M4730_IG22: ; bbWeight=0.00, gcVars=00000000000000000000000008000000 {V
ldrh w1, [x5]
strh w1, [x0]
cmp w3, #2
- beq G_M4730_IG139
+ beq G_M4730_IG133
b G_M4730_IG21
;; size=24 bbWeight=0.00 PerfScore 0.01
G_M4730_IG23: ; bbWeight=0.70, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref
@@ -569,18 +569,18 @@ G_M4730_IG23: ; bbWeight=0.70, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
G_M4730_IG24: ; bbWeight=1.30, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
add w25, w25, w3
cmp w25, w27
- bhs G_M4730_IG137
+ bhs G_M4730_IG131
ldrh w2, [x28, w25, UXTW #2]
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG151
+ bls G_M4730_IG145
ldrh w4, [x28, w25, UXTW #2]
cmp w2, w4
- beq G_M4730_IG42
+ beq G_M4730_IG41
;; size=40 bbWeight=1.30 PerfScore 14.93
G_M4730_IG25: ; bbWeight=1.19, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
cmp w2, #123
- bne G_M4730_IG149
+ bne G_M4730_IG143
stp wzr, w4, [fp, #0xE8] // [V07 loc3], [V06 loc2]
str wzr, [fp, #0xE4] // [V08 loc4]
str xzr, [fp, #0x40] // [V159 tmp137]
@@ -588,7 +588,7 @@ G_M4730_IG25: ; bbWeight=1.19, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
str wzr, [fp, #0x90] // [V160 tmp138]
sub w0, w25, #1
cmp w0, w27
- bhs G_M4730_IG137
+ bhs G_M4730_IG131
sub w0, w25, #1
ldrh w0, [x28, w0, UXTW #2]
cmp w0, #123
@@ -611,10 +611,10 @@ G_M4730_IG25: ; bbWeight=1.19, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
ldr w1, [fp, #0xEC] // [V06 loc2]
sub w2, w1, #48
cmp w2, #10
- bhs G_M4730_IG150
+ bhs G_M4730_IG144
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG151
+ bls G_M4730_IG145
ldrh w1, [x28, w25, UXTW #2]
cmp w1, #125
beq G_M4730_IG28
@@ -634,24 +634,24 @@ G_M4730_IG27: ; bbWeight=0.07, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
str w2, [fp, #0xE0] // [V10 loc6]
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG151
+ bls G_M4730_IG145
ldrh w1, [x28, w25, UXTW #2]
ldr w2, [fp, #0xE0] // [V10 loc6]
b G_M4730_IG26
;; size=40 bbWeight=0.07 PerfScore 0.89
G_M4730_IG28: ; bbWeight=0.60, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref
str w2, [fp, #0xE0] // [V10 loc6]
- b G_M4730_IG63
+ b G_M4730_IG57
;; size=8 bbWeight=0.60 PerfScore 1.19
G_M4730_IG29: ; bbWeight=1.44, gcVars=00000000000000000080000000080000 {V13 V159}, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, gcvars, byref, isz
; gcrRegs +[x28]
; byrRegs -[x28]
; GC ptr vars +{V13}
cmp w1, #100
- blo G_M4730_IG74
+ blo G_M4730_IG68
;; size=8 bbWeight=1.44 PerfScore 2.17
G_M4730_IG30: ; bbWeight=1.44, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, byref
- b G_M4730_IG43
+ b G_M4730_IG42
;; size=4 bbWeight=1.44 PerfScore 1.44
G_M4730_IG31: ; bbWeight=0.01, gcVars=00000000000000000080000000000000 {V159}, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, gcvars, byref, isz
; gcrRegs -[x28]
@@ -662,12 +662,12 @@ G_M4730_IG31: ; bbWeight=0.01, gcVars=00000000000000000080000000000000 {V
;; size=8 bbWeight=0.01 PerfScore 0.01
G_M4730_IG32: ; bbWeight=0.46, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
cmp w1, #44
- bne G_M4730_IG51
+ bne G_M4730_IG50
;; size=8 bbWeight=0.46 PerfScore 0.69
G_M4730_IG33: ; bbWeight=0.66, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG151
+ bls G_M4730_IG145
ldrh w1, [x28, w25, UXTW #2]
cmp w1, #32
beq G_M4730_IG33
@@ -680,7 +680,7 @@ G_M4730_IG35: ; bbWeight=0.14, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
mov w1, #1
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG151
+ bls G_M4730_IG145
ldrh w0, [x28, w25, UXTW #2]
sxtw w3, w0
str w1, [fp, #0xE4] // [V08 loc4]
@@ -689,31 +689,28 @@ G_M4730_IG35: ; bbWeight=0.14, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
G_M4730_IG36: ; bbWeight=0.32, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
sub w1, w1, #48
cmp w1, #10
- bhs G_M4730_IG150
+ bhs G_M4730_IG144
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG151
+ bls G_M4730_IG145
;; size=24 bbWeight=0.32 PerfScore 1.27
G_M4730_IG37: ; bbWeight=1.27, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref
- b G_M4730_IG48
+ b G_M4730_IG45
;; size=4 bbWeight=1.27 PerfScore 1.27
-G_M4730_IG38: ; bbWeight=0.00, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
- tbnz w25, #31, G_M4730_IG45
- ;; size=4 bbWeight=0.00 PerfScore 0.00
-G_M4730_IG39: ; bbWeight=0.20, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
+G_M4730_IG38: ; bbWeight=0.20, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG151
+ bls G_M4730_IG145
;; size=12 bbWeight=0.20 PerfScore 0.41
-G_M4730_IG40: ; bbWeight=0.66, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
+G_M4730_IG39: ; bbWeight=0.66, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
ldrh w1, [x28, w25, UXTW #2]
cmp w1, #32
- beq G_M4730_IG39
- ;; size=12 bbWeight=0.66 PerfScore 2.96
-G_M4730_IG41: ; bbWeight=0.05, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref
+ beq G_M4730_IG38
+ ;; size=12 bbWeight=0.66 PerfScore 2.99
+G_M4730_IG40: ; bbWeight=0.46, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref
b G_M4730_IG32
- ;; size=4 bbWeight=0.05 PerfScore 0.05
-G_M4730_IG42: ; bbWeight=0.11, gcVars=00000000000000000000000000000000 {}, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=400000 {x22}, gcvars, byref
+ ;; size=4 bbWeight=0.46 PerfScore 0.46
+G_M4730_IG41: ; bbWeight=0.11, gcVars=00000000000000000000000000000000 {}, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=400000 {x22}, gcvars, byref
; byrRegs -[x28]
; GC ptr vars -{V159}
mov x0, x19
@@ -728,7 +725,7 @@ G_M4730_IG42: ; bbWeight=0.11, gcVars=00000000000000000000000000000000 {}
add w25, w25, #1
b G_M4730_IG07
;; size=36 bbWeight=0.11 PerfScore 0.84
-G_M4730_IG43: ; bbWeight=11.55, gcVars=00000000000000000080000000080000 {V13 V159}, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, gcvars, byref, isz
+G_M4730_IG42: ; bbWeight=11.55, gcVars=00000000000000000080000000080000 {V13 V159}, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, gcvars, byref, isz
; gcrRegs -[x0] +[x28]
; GC ptr vars +{V13 V159}
ldr x2, [fp, #0x98] // [V121 tmp99]
@@ -774,39 +771,26 @@ G_M4730_IG43: ; bbWeight=11.55, gcVars=00000000000000000080000000080000 {
ldr w1, [fp, #0xA4] // [V120 tmp98]
cmp w1, #100
str x0, [fp, #0x98] // [V121 tmp99]
- bhs G_M4730_IG43
+ bhs G_M4730_IG42
;; size=148 bbWeight=11.55 PerfScore 479.21
-G_M4730_IG44: ; bbWeight=1.44, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, byref
+G_M4730_IG43: ; bbWeight=1.44, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, byref
; byrRegs -[x0]
- b G_M4730_IG74
+ b G_M4730_IG68
;; size=4 bbWeight=1.44 PerfScore 1.44
-G_M4730_IG45: ; bbWeight=0.00, gcVars=00000000000000000080000000000000 {V159}, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, gcvars, byref, isz
+G_M4730_IG44: ; bbWeight=0.07, gcVars=00000000000000000080000000000000 {V159}, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, gcvars, byref, isz
; gcrRegs -[x28]
; byrRegs +[x28]
; GC ptr vars -{V13}
...
librariestestsnotieredcompilation.run.linux.arm64.Release.mch
+12 (+0.83%) : 130183.dasm - System.IO.Tests.UmaReadWriteStructArray:UmaReadWriteStructArrayMultiples() (FullOpts)
@@ -8,54 +8,54 @@
; 14 inlinees with PGO data; 44 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 loc0 [V00,T33] ( 3, 5.97) ref -> x19 class-hnd exact single-def <<unknown class>>
-; V01 loc1 [V01,T25] ( 4, 10.07) ref -> x20 class-hnd exact single-def <<unknown class>>
+; V00 loc0 [V00,T32] ( 3, 5.97) ref -> x19 class-hnd exact single-def <<unknown class>>
+; V01 loc1 [V01,T14] ( 7, 21.95) ref -> x20 class-hnd exact single-def <<unknown class>>
; V02 loc2 [V02,T09] ( 7, 24.76) int -> x0
;* V03 loc3 [V03 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SF] ld-addr-op <System.IO.Tests.Uma_TestStructs+UmaTestStruct>
-; V04 loc4 [V04,T39] ( 3, 1 ) ref -> [fp+0x38] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
-; V05 loc5 [V05,T38] ( 5, 2 ) ref -> [fp+0x30] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
-; V06 loc6 [V06,T07] ( 8, 29.13) int -> x19
+; V04 loc4 [V04,T38] ( 3, 1 ) ref -> [fp+0x38] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
+; V05 loc5 [V05,T37] ( 5, 2 ) ref -> [fp+0x30] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
+; V06 loc6 [V06,T07] ( 8, 28.84) int -> x19
;# V07 OutArgs [V07 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V08 tmp1 [V08,T31] ( 4, 8 ) ref -> x21 class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
-; V09 tmp2 [V09,T26] ( 5, 10.03) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
-; V10 tmp3 [V10,T34] ( 2, 4.03) int -> x19 "Inlining Arg"
-; V11 tmp4 [V11,T32] ( 3, 6.04) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V08 tmp1 [V08,T28] ( 4, 8 ) ref -> x21 class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
+; V09 tmp2 [V09,T22] ( 5, 10.03) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
+; V10 tmp3 [V10,T33] ( 2, 4.03) int -> x19 "Inlining Arg"
+; V11 tmp4 [V11,T31] ( 3, 6.04) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V12 tmp5 [V12 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V13 tmp6 [V13,T37] ( 3, 3.02) ref -> x24 class-hnd exact single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V14 tmp7 [V14,T27] ( 4, 8.06) ref -> x26 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V15 tmp8 [V15,T28] ( 4, 8.06) ref -> x27 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V16 tmp9 [V16,T14] ( 2, 16.12) int -> x26 "Inlining Arg"
-; V17 tmp10 [V17,T10] ( 3, 24.18) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V13 tmp6 [V13,T36] ( 3, 3.02) ref -> x24 class-hnd exact single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V14 tmp7 [V14,T26] ( 4, 8.06) ref -> x26 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V15 tmp8 [V15,T27] ( 4, 8.06) ref -> x27 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V16 tmp9 [V16,T15] ( 2, 15.96) int -> x26 "Inlining Arg"
+; V17 tmp10 [V17,T11] ( 3, 23.94) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V18 tmp11 [V18 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V19 tmp12 [V19,T17] ( 3, 12.09) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V20 tmp13 [V20,T01] ( 4, 32.24) ref -> [fp+0x28] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V21 tmp14 [V21,T02] ( 4, 32.24) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V19 tmp12 [V19,T18] ( 3, 11.97) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V20 tmp13 [V20,T01] ( 4, 31.91) ref -> [fp+0x28] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V21 tmp14 [V21,T02] ( 4, 31.91) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V22 tmp15 [V22 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
-; V23 tmp16 [V23,T15] ( 2, 16.12) int -> x26 "Inlining Arg"
-; V24 tmp17 [V24,T11] ( 3, 24.18) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V23 tmp16 [V23,T16] ( 2, 15.96) int -> x26 "Inlining Arg"
+; V24 tmp17 [V24,T12] ( 3, 23.94) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V25 tmp18 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V26 tmp19 [V26,T18] ( 3, 12.09) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V27 tmp20 [V27,T03] ( 4, 32.24) ref -> [fp+0x20] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V28 tmp21 [V28,T04] ( 4, 32.24) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V26 tmp19 [V26,T19] ( 3, 11.97) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V27 tmp20 [V27,T03] ( 4, 31.91) ref -> [fp+0x20] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V28 tmp21 [V28,T04] ( 4, 31.91) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V29 tmp22 [V29 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V30 tmp23 [V30 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V31 tmp24 [V31 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
;* V32 tmp25 [V32 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V33 tmp26 [V33,T16] ( 2, 16.12) ushort -> x26 "Inlining Arg"
-; V34 tmp27 [V34,T12] ( 3, 24.18) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
+; V33 tmp26 [V33,T17] ( 2, 15.96) ushort -> x26 "Inlining Arg"
+; V34 tmp27 [V34,T13] ( 3, 23.94) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
;* V35 tmp28 [V35 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V36 tmp29 [V36,T19] ( 3, 12.09) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V37 tmp30 [V37,T05] ( 4, 32.24) ref -> [fp+0x18] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V38 tmp31 [V38,T06] ( 4, 32.24) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V36 tmp29 [V36,T20] ( 3, 11.97) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
+; V37 tmp30 [V37,T05] ( 4, 31.91) ref -> [fp+0x18] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V38 tmp31 [V38,T06] ( 4, 31.91) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V39 tmp32 [V39 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V40 tmp33 [V40 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V41 tmp34 [V41 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
-;* V42 tmp35 [V42,T35] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
-; V43 tmp36 [V43,T29] ( 3, 8.06) ubyte -> x26 "field V30.value (fldOffset=0x1)" P-INDEP
+;* V42 tmp35 [V42,T34] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
+; V43 tmp36 [V43,T29] ( 3, 7.98) ubyte -> x26 "field V30.value (fldOffset=0x1)" P-INDEP
;* V44 tmp37 [V44 ] ( 0, 0 ) ubyte -> zero-ref "field V31.hasValue (fldOffset=0x0)" P-INDEP
;* V45 tmp38 [V45 ] ( 0, 0 ) ubyte -> zero-ref "field V31.value (fldOffset=0x1)" P-INDEP
-;* V46 tmp39 [V46,T36] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
-; V47 tmp40 [V47,T30] ( 2, 8.06) ubyte -> x0 "field V40.value (fldOffset=0x1)" P-INDEP
+;* V46 tmp39 [V46,T35] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
+; V47 tmp40 [V47,T30] ( 3, 7.98) ubyte -> x22 "field V40.value (fldOffset=0x1)" P-INDEP
;* V48 tmp41 [V48 ] ( 0, 0 ) ubyte -> zero-ref "field V41.hasValue (fldOffset=0x0)" P-INDEP
;* V49 tmp42 [V49 ] ( 0, 0 ) ubyte -> zero-ref "field V41.value (fldOffset=0x1)" P-INDEP
;* V50 tmp43 [V50 ] ( 0, 0 ) int -> zero-ref "V03.[000..004)"
@@ -64,15 +64,14 @@
;* V53 tmp46 [V53 ] ( 0, 0 ) ushort -> zero-ref "V03.[012..014)"
;* V54 tmp47 [V54 ] ( 0, 0 ) ubyte -> zero-ref "V03.[014..015)"
; V55 tmp48 [V55,T00] ( 6, 47.52) byref -> x1 "Spilling address for field-by-field copy"
-; V56 tmp49 [V56,T41] ( 6, 0 ) struct ( 8) [fp+0x40] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
-; V57 PSPSym [V57,T40] ( 1, 1 ) long -> [fp+0x48] do-not-enreg[V] "PSPSym"
-; V58 cse0 [V58,T13] ( 5, 20.15) byref -> x22 "CSE - aggressive"
-; V59 cse1 [V59,T20] ( 3, 12.09) long -> x22 "CSE - moderate"
-; V60 cse2 [V60,T08] ( 9, 27.20) long -> x25 "CSE - aggressive"
-; V61 cse3 [V61,T22] ( 4, 10.07) long -> x21 "CSE - moderate"
-; V62 cse4 [V62,T23] ( 4, 10.07) long -> x23 "CSE - moderate"
-; V63 cse5 [V63,T24] ( 4, 10.07) long -> x24 "CSE - moderate"
-; V64 cse6 [V64,T21] ( 3, 11.88) int -> x2 "CSE - moderate"
+; V56 tmp49 [V56,T40] ( 6, 0 ) struct ( 8) [fp+0x40] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
+; V57 PSPSym [V57,T39] ( 1, 1 ) long -> [fp+0x48] do-not-enreg[V] "PSPSym"
+; V58 cse0 [V58,T10] ( 6, 23.94) long -> x22 "CSE - aggressive"
+; V59 cse1 [V59,T08] ( 9, 26.96) long -> x25 "CSE - aggressive"
+; V60 cse2 [V60,T23] ( 4, 9.99) long -> x21 "CSE - moderate"
+; V61 cse3 [V61,T24] ( 4, 9.99) long -> x23 "CSE - moderate"
+; V62 cse4 [V62,T25] ( 4, 9.99) long -> x24 "CSE - moderate"
+; V63 cse5 [V63,T21] ( 3, 11.88) int -> x2 "CSE - moderate"
;
; Lcl frame size = 64
@@ -147,7 +146,7 @@ G_M53770_IG04: ; bbWeight=1, gcrefRegs=180000 {x19 x20}, byrefRegs=0000 {
str x21, [fp, #0x38] // [V04 loc4]
; GC ptr vars +{V04}
;; size=48 bbWeight=1 PerfScore 10.00
-G_M53770_IG05: ; bbWeight=1, gcVars=0000008000000000 {V04}, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG05: ; bbWeight=1, gcVars=0000004000000000 {V04}, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, gcvars, byref
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -171,7 +170,7 @@ G_M53770_IG05: ; bbWeight=1, gcVars=0000008000000000 {V04}, gcrefRegs=380
str x22, [fp, #0x30] // [V05 loc5]
; GC ptr vars +{V05}
;; size=60 bbWeight=1 PerfScore 11.50
-G_M53770_IG06: ; bbWeight=1.01, gcVars=000000C000000000 {V04 V05}, gcrefRegs=580000 {x19 x20 x22}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG06: ; bbWeight=1.01, gcVars=0000006000000000 {V04 V05}, gcrefRegs=580000 {x19 x20 x22}, byrefRegs=0000 {}, gcvars, byref
mov x0, x22
; gcrRegs +[x0]
mov x2, x19
@@ -291,7 +290,7 @@ G_M53770_IG06: ; bbWeight=1.01, gcVars=000000C000000000 {V04 V05}, gcrefR
; gcr arg pop 0
mov w19, wzr
;; size=300 bbWeight=1.01 PerfScore 54.90
-G_M53770_IG07: ; bbWeight=4.03, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
+G_M53770_IG07: ; bbWeight=3.99, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
ubfiz x0, x19, #4, #32
add x22, x0, #16
ldr w26, [x20, x22]
@@ -374,10 +373,11 @@ G_M53770_IG07: ; bbWeight=4.03, gcrefRegs=100000 {x20}, byrefRegs=0000 {}
blr x3
; gcrRegs -[x2 x27]
; gcr arg pop 0
- add x22, x20, x22
- ; byrRegs +[x22]
- ldr w26, [x22, #0x08]
+ add x0, x20, x22
+ ; byrRegs +[x0]
+ ldr w26, [x0, #0x08]
mov x0, x21
+ ; byrRegs -[x0]
bl CORINFO_HELP_NEWSFAST
; gcrRegs +[x0]
; gcr arg pop 0
@@ -456,10 +456,14 @@ G_M53770_IG07: ; bbWeight=4.03, gcrefRegs=100000 {x20}, byrefRegs=0000 {}
blr x3
; gcrRegs -[x2 x27]
; gcr arg pop 0
- ldrb w26, [x22, #0x04]
+ add x0, x20, x22
+ ; byrRegs +[x0]
+ ldrb w26, [x0, #0x04]
cbnz w26, G_M53770_IG10
- ldrh w26, [x22, #0x0C]
+ add x0, x20, x22
+ ldrh w26, [x0, #0x0C]
movz x0, #0xD1FFAB1E
+ ; byrRegs -[x0]
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
bl CORINFO_HELP_NEWSFAST
@@ -545,19 +549,21 @@ G_M53770_IG07: ; bbWeight=4.03, gcrefRegs=100000 {x20}, byrefRegs=0000 {}
blr x3
; gcrRegs -[x2 x27]
; gcr arg pop 0
- ldrb w0, [x22, #0x0E]
- cbz w0, G_M53770_IG11
- ;; size=572 bbWeight=4.03 PerfScore 501.67
-G_M53770_IG08: ; bbWeight=4, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
- ; byrRegs -[x22]
+ add x0, x20, x22
+ ; byrRegs +[x0]
+ ldrb w22, [x0, #0x0E]
+ cbz w22, G_M53770_IG11
+ ;; size=584 bbWeight=3.99 PerfScore 502.64
+G_M53770_IG08: ; bbWeight=3.96, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
+ ; byrRegs -[x0]
add w19, w19, #1
cmp w19, #12
blt G_M53770_IG07
- ;; size=12 bbWeight=4 PerfScore 8.00
-G_M53770_IG09: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ ;; size=12 bbWeight=3.96 PerfScore 7.92
+G_M53770_IG09: ; bbWeight=1.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
; gcrRegs -[x20]
b G_M53770_IG12
- ;; size=4 bbWeight=0.50 PerfScore 0.50
+ ;; size=4 bbWeight=1.01 PerfScore 1.01
G_M53770_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov w1, #1
strb w1, [fp, #0x40] // [V56 tmp49]
@@ -578,7 +584,7 @@ G_M53770_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
G_M53770_IG11: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov w1, #1
strb w1, [fp, #0x40] // [V56 tmp49]
- strb wzr, [fp, #0x41] // [V56 tmp49+0x01]
+ strb w22, [fp, #0x41] // [V56 tmp49+0x01]
ldrh w1, [fp, #0x40] // [V56 tmp49]
mov x0, xzr
movz x2, #0xD1FFAB1E // code for <unknown method>
@@ -622,8 +628,8 @@ G_M53770_IG14: ; bbWeight=1, epilog, nogc, extend
ldp fp, lr, [sp], #0xA0
ret lr
;; size=28 bbWeight=1 PerfScore 7.00
-G_M53770_IG15: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
- ; GC ptr vars +{V04 V05 V38}
+G_M53770_IG15: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
+ ; GC ptr vars +{V04 V05 V37 V38}
stp fp, lr, [sp, #-0x70]!
stp x19, x20, [sp, #0x20]
stp x21, x22, [sp, #0x30]
@@ -633,11 +639,11 @@ G_M53770_IG15: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs
add x3, fp, #160
str x3, [sp, #0x18]
;; size=32 bbWeight=0 PerfScore 0.00
-G_M53770_IG16: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG16: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
ldr x0, [fp, #0x30] // [V05 loc5]
; gcrRegs +[x0]
strb wzr, [x0, #0x24]
- ; GC ptr vars -{V05 V38}
+ ; GC ptr vars -{V05 V37 V38}
bl <unknown method>
; gcrRegs -[x0]
; gcr arg pop 0
@@ -661,7 +667,7 @@ G_M53770_IG18: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
add x3, fp, #160
str x3, [sp, #0x18]
;; size=32 bbWeight=0 PerfScore 0.00
-G_M53770_IG19: ; bbWeight=0, gcVars=0000008000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG19: ; bbWeight=0, gcVars=0000004000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
ldr x0, [fp, #0x38] // [V04 loc4]
; gcrRegs +[x0]
movz x1, #0xD1FFAB1E // code for <unknown method>
@@ -683,7 +689,7 @@ G_M53770_IG20: ; bbWeight=0, funclet epilog, nogc, extend
ret lr
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 1448, prolog size 36, PerfScore 660.17, instruction count 362, allocated bytes for code 1448 (MethodHash=942a2df5) for method System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
+; Total bytes of code 1460, prolog size 36, PerfScore 661.57, instruction count 365, allocated bytes for code 1460 (MethodHash=942a2df5) for method System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
; ============================================================
...
Details
Improvements/regressions per collection
| Collection |
Contexts with diffs |
Improvements |
Regressions |
Same size |
Improvements (bytes) |
Regressions (bytes) |
| benchmarks.run.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_pgo.linux.arm64.checked.mch |
5 |
5 |
0 |
0 |
-1,304 |
+0 |
| benchmarks.run_tiered.linux.arm64.checked.mch |
3 |
3 |
0 |
0 |
-632 |
+0 |
| coreclr_tests.run.linux.arm64.checked.mch |
4 |
4 |
0 |
0 |
-944 |
+0 |
| libraries.crossgen2.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries.pmi.linux.arm64.checked.mch |
2 |
1 |
1 |
0 |
-16 |
+268 |
| libraries_tests.run.linux.arm64.Release.mch |
2 |
2 |
0 |
0 |
-156 |
+0 |
| librariestestsnotieredcompilation.run.linux.arm64.Release.mch |
1 |
0 |
1 |
0 |
-0 |
+12 |
| realworld.run.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| smoke_tests.nativeaot.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
|
17 |
15 |
2 |
0 |
-3,052 |
+280 |
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| benchmarks.run.linux.arm64.checked.mch |
32,435 |
2,362 |
30,073 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_pgo.linux.arm64.checked.mch |
152,751 |
60,751 |
92,000 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_tiered.linux.arm64.checked.mch |
60,787 |
45,077 |
15,710 |
0 (0.00%) |
0 (0.00%) |
| coreclr_tests.run.linux.arm64.checked.mch |
626,694 |
383,548 |
243,146 |
1 (0.00%) |
2 (0.00%) |
| libraries.crossgen2.linux.arm64.checked.mch |
1,936 |
0 |
1,936 |
0 (0.00%) |
0 (0.00%) |
| libraries.pmi.linux.arm64.checked.mch |
295,690 |
6 |
295,684 |
0 (0.00%) |
0 (0.00%) |
| libraries_tests.run.linux.arm64.Release.mch |
751,111 |
494,543 |
256,568 |
0 (0.00%) |
0 (0.00%) |
| librariestestsnotieredcompilation.run.linux.arm64.Release.mch |
304,828 |
21,600 |
283,228 |
0 (0.00%) |
0 (0.00%) |
| realworld.run.linux.arm64.checked.mch |
33,343 |
157 |
33,186 |
0 (0.00%) |
0 (0.00%) |
| smoke_tests.nativeaot.linux.arm64.checked.mch |
52 |
0 |
52 |
0 (0.00%) |
0 (0.00%) |
|
2,259,627 |
1,008,044 |
1,251,583 |
1 (0.00%) |
2 (0.00%) |
jit-analyze output
benchmarks.run_pgo.linux.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 79928956 (overridden on cmd)
Total bytes of diff: 79927652 (overridden on cmd)
Total bytes of delta: -1304 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-476 : 148546.dasm (-33.06 % of base)
-460 : 148531.dasm (-31.86 % of base)
-156 : 75363.dasm (-21.67 % of base)
-156 : 75394.dasm (-21.67 % of base)
-56 : 108871.dasm (-6.64 % of base)
5 total files with Code Size differences (5 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-476 (-33.06 % of base) : 148546.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-460 (-31.86 % of base) : 148531.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-156 (-21.67 % of base) : 75363.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 75394.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.64 % of base) : 108871.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method improvements (percentages):
-476 (-33.06 % of base) : 148546.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-460 (-31.86 % of base) : 148531.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-156 (-21.67 % of base) : 75363.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 75394.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.64 % of base) : 108871.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
5 total methods with Code Size differences (5 improved, 0 regressed).
benchmarks.run_tiered.linux.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 22277428 (overridden on cmd)
Total bytes of diff: 22276796 (overridden on cmd)
Total bytes of delta: -632 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-424 : 60343.dasm (-31.74 % of base)
-152 : 34797.dasm (-14.13 % of base)
-56 : 49094.dasm (-6.97 % of base)
3 total files with Code Size differences (3 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-424 (-31.74 % of base) : 60343.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-152 (-14.13 % of base) : 34797.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.97 % of base) : 49094.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method improvements (percentages):
-424 (-31.74 % of base) : 60343.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-152 (-14.13 % of base) : 34797.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.97 % of base) : 49094.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
3 total methods with Code Size differences (3 improved, 0 regressed).
coreclr_tests.run.linux.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 509755544 (overridden on cmd)
Total bytes of diff: 509754600 (overridden on cmd)
Total bytes of delta: -944 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-460 : 251680.dasm (-31.86 % of base)
-172 : 314183.dasm (-32.58 % of base)
-156 : 255348.dasm (-21.67 % of base)
-156 : 255335.dasm (-21.67 % of base)
4 total files with Code Size differences (4 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-460 (-31.86 % of base) : 251680.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-172 (-32.58 % of base) : 314183.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
-156 (-21.67 % of base) : 255348.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 255335.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
Top method improvements (percentages):
-172 (-32.58 % of base) : 314183.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
-460 (-31.86 % of base) : 251680.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-156 (-21.67 % of base) : 255348.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 255335.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
4 total methods with Code Size differences (4 improved, 0 regressed).
libraries.pmi.linux.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 76286724 (overridden on cmd)
Total bytes of diff: 76286976 (overridden on cmd)
Total bytes of delta: 252 (0.00 % of base)
diff is a regression.
relative diff is a regression.
Detail diffs
Top file regressions (bytes):
268 : 95102.dasm (36.41 % of base)
Top file improvements (bytes):
-16 : 91673.dasm (-12.90 % of base)
2 total files with Code Size differences (1 improved, 1 regressed), 0 unchanged.
Top method regressions (bytes):
268 (36.41 % of base) : 95102.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
Top method improvements (bytes):
-16 (-12.90 % of base) : 91673.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
Top method regressions (percentages):
268 (36.41 % of base) : 95102.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
Top method improvements (percentages):
-16 (-12.90 % of base) : 91673.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
2 total methods with Code Size differences (1 improved, 1 regressed).
libraries_tests.run.linux.arm64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 400455948 (overridden on cmd)
Total bytes of diff: 400455792 (overridden on cmd)
Total bytes of delta: -156 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-80 : 535920.dasm (-1.97 % of base)
-76 : 309448.dasm (-3.48 % of base)
2 total files with Code Size differences (2 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-80 (-1.97 % of base) : 535920.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
-76 (-3.48 % of base) : 309448.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
Top method improvements (percentages):
-76 (-3.48 % of base) : 309448.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-80 (-1.97 % of base) : 535920.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
2 total methods with Code Size differences (2 improved, 0 regressed).
librariestestsnotieredcompilation.run.linux.arm64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 165114004 (overridden on cmd)
Total bytes of diff: 165114016 (overridden on cmd)
Total bytes of delta: 12 (0.00 % of base)
diff is a regression.
relative diff is a regression.
Detail diffs
Top file regressions (bytes):
12 : 130183.dasm (0.83 % of base)
1 total files with Code Size differences (0 improved, 1 regressed), 0 unchanged.
Top method regressions (bytes):
12 (0.83 % of base) : 130183.dasm - System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
Top method regressions (percentages):
12 (0.83 % of base) : 130183.dasm - System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
1 total methods with Code Size differences (0 improved, 1 regressed).
linux x64
Diffs are based on 2,249,836 contexts (981,298 MinOpts, 1,268,538 FullOpts).
MISSED contexts: base: 0 (0.00%), diff: 1 (0.00%)
Overall (-1,606 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.linux.x64.checked.mch |
69,179,263 |
-536 |
| benchmarks.run_tiered.linux.x64.checked.mch |
15,898,771 |
-679 |
| coreclr_tests.run.linux.x64.checked.mch |
403,326,592 |
-490 |
| libraries.pmi.linux.x64.checked.mch |
60,406,292 |
+291 |
| libraries_tests.run.linux.x64.Release.mch |
348,614,608 |
-192 |
| librariestestsnotieredcompilation.run.linux.x64.Release.mch |
132,684,821 |
+0 |
FullOpts (-1,606 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.linux.x64.checked.mch |
47,837,218 |
-536 |
| benchmarks.run_tiered.linux.x64.checked.mch |
3,640,387 |
-679 |
| coreclr_tests.run.linux.x64.checked.mch |
123,835,431 |
-490 |
| libraries.pmi.linux.x64.checked.mch |
60,293,435 |
+291 |
| libraries_tests.run.linux.x64.Release.mch |
164,859,444 |
-192 |
| librariestestsnotieredcompilation.run.linux.x64.Release.mch |
122,067,035 |
+0 |
Example diffs
benchmarks.run_pgo.linux.x64.checked.mch
-46 (-5.82%) : 112776.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -10,16 +10,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 3 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T12] ( 15, 104.00) ref -> rdi class-hnd single-def <float[][]>
+; V00 arg0 [V00,T12] ( 12, 103.79) ref -> rdi class-hnd single-def <float[][]>
; V01 arg1 [V01,T13] ( 11, 103.79) ref -> rsi class-hnd single-def <int[][]>
; V02 arg2 [V02,T21] ( 3, 2.21) ref -> [rbp+0x60] class-hnd single-def tier0-frame <double[]>
; V03 arg3 [V03,T14] ( 4, 101.79) ref -> rcx class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T20] ( 5, 2.62) int -> r8 single-def
+; V04 arg4 [V04,T20] ( 4, 2.62) int -> r8 single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T05] ( 25,1698.26) int -> rax
-; V08 loc3 [V08,T16] ( 6, 100.21) ref -> r11 class-hnd <float[]>
-; V09 loc4 [V09,T11] ( 13, 208.20) int -> r10
+; V07 loc2 [V07,T05] ( 20,1698.26) int -> rax
+; V08 loc3 [V08,T16] ( 5, 100.21) ref -> r11 class-hnd <float[]>
+; V09 loc4 [V09,T11] ( 12, 208.20) int -> r10
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T07] ( 24,1300.21) int -> r9
; V12 loc7 [V12,T27] ( 4, 199.58) float -> mm0
@@ -42,7 +42,7 @@
; V29 tmp14 [V29,T24] ( 6, 0.96) ref -> rdx "arr expr"
; V30 cse0 [V30,T09] ( 6, 598.73) ref -> r13 multi-def "CSE - moderate"
; V31 cse1 [V31,T10] ( 16, 399.80) int -> r12 multi-def "CSE - moderate"
-; V32 cse2 [V32,T15] ( 9, 101.05) int -> rbx "CSE - moderate"
+; V32 cse2 [V32,T15] ( 7, 100.84) int -> rbx "CSE - moderate"
; V33 cse3 [V33,T17] ( 4, 100.00) int -> r15 hoist multi-def "CSE - moderate"
; V34 cse4 [V34,T18] ( 4, 100.00) long -> r14 hoist multi-def "CSE - moderate"
;
@@ -79,20 +79,20 @@ G_M56974_IG02: ; bbWeight=0.21, gcrefRegs=08C6 {rcx rdx rsi rdi r11}, byr
; GC ptr vars +{V02}
mov ebx, dword ptr [rdx+0x08]
cmp ebx, r9d
- jle G_M56974_IG15
+ jle G_M56974_IG12
;; size=16 bbWeight=0.21 PerfScore 0.90
G_M56974_IG03: ; bbWeight=0.21, gcVars=0000000000200000 {V02}, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, gcvars, byref
; gcrRegs -[rdx]
test rsi, rsi
- je G_M56974_IG25
+ je G_M56974_IG22
test rdi, rdi
- je G_M56974_IG25
+ je G_M56974_IG22
test r9d, r9d
- jl G_M56974_IG25
+ jl G_M56974_IG22
cmp dword ptr [rsi+0x08], ebx
- jl G_M56974_IG25
+ jl G_M56974_IG22
cmp dword ptr [rdi+0x08], ebx
- jl G_M56974_IG25
+ jl G_M56974_IG22
;; size=45 bbWeight=0.21 PerfScore 2.47
G_M56974_IG04: ; bbWeight=0.21, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref
mov r15d, dword ptr [r11+0x08]
@@ -100,97 +100,75 @@ G_M56974_IG04: ; bbWeight=0.21, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRe
;; size=7 bbWeight=0.21 PerfScore 0.47
G_M56974_IG05: ; bbWeight=98.79, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
cmp r10d, r15d
- jae G_M56974_IG36
+ jae G_M56974_IG33
vmovss xmm0, dword ptr [r11+4*r14+0x10]
mov r13, gword ptr [rcx+0x08]
; gcrRegs +[r13]
cmp dword ptr [r13+0x08], eax
jle SHORT G_M56974_IG07
;; size=26 bbWeight=98.79 PerfScore 1111.40
-G_M56974_IG06: ; bbWeight=395.16, gcrefRegs=28C2 {rcx rsi rdi r11 r13}, byrefRegs=0000 {}, byref
+G_M56974_IG06: ; bbWeight=395.16, gcrefRegs=28C2 {rcx rsi rdi r11 r13}, byrefRegs=0000 {}, byref, isz
cmp eax, r9d
- jne G_M56974_IG18
- ;; size=9 bbWeight=395.16 PerfScore 493.96
+ jne SHORT G_M56974_IG15
+ ;; size=5 bbWeight=395.16 PerfScore 493.96
G_M56974_IG07: ; bbWeight=395.16, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref
; gcrRegs -[r13]
vxorps xmm1, xmm1, xmm1
- jmp G_M56974_IG19
+ jmp G_M56974_IG16
;; size=9 bbWeight=395.16 PerfScore 922.05
G_M56974_IG08: ; bbWeight=0.21, gcrefRegs=00C2 {rcx rsi rdi}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r11]
+ cmp eax, dword ptr [rdi+0x08]
+ jae G_M56974_IG33
mov r11d, eax
mov r11, gword ptr [rdi+8*r11+0x10]
; gcrRegs +[r11]
xor r10d, r10d
test r8d, r8d
- jg SHORT G_M56974_IG11
- ;; size=16 bbWeight=0.21 PerfScore 0.78
+ jg SHORT G_M56974_IG10
+ ;; size=25 bbWeight=0.21 PerfScore 1.64
G_M56974_IG09: ; bbWeight=0.21, gcrefRegs=00C2 {rcx rsi rdi}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r11]
inc eax
cmp ebx, eax
- jle G_M56974_IG37
+ jle G_M56974_IG34
jmp SHORT G_M56974_IG08
- ;; size=12 bbWeight=0.21 PerfScore 0.73
-G_M56974_IG10: ; bbWeight=0.00, gcrefRegs=00C2 {rcx rsi rdi}, byrefRegs=0000 {}, byref, isz
- cmp eax, dword ptr [rdi+0x08]
- jae G_M56974_IG36
- mov r11d, eax
- mov r11, gword ptr [rdi+8*r11+0x10]
+ ;; size=12 bbWeight=0.21 PerfScore 0.74
+G_M56974_IG10: ; bbWeight=0.21, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
; gcrRegs +[r11]
- xor r10d, r10d
- test r8d, r8d
- jle SHORT G_M56974_IG14
- ;; size=25 bbWeight=0.00 PerfScore 0.02
-G_M56974_IG11: ; bbWeight=0.21, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
cmp eax, dword ptr [rsi+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
mov r9d, eax
mov r9, gword ptr [rsi+8*r9+0x10]
; gcrRegs +[r9]
test r10d, r10d
- jl SHORT G_M56974_IG15
+ jl SHORT G_M56974_IG12
;; size=22 bbWeight=0.21 PerfScore 1.58
-G_M56974_IG12: ; bbWeight=6.75, gcrefRegs=0AC2 {rcx rsi rdi r9 r11}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG11: ; bbWeight=6.75, gcrefRegs=0AC2 {rcx rsi rdi r9 r11}, byrefRegs=0000 {}, byref, isz
cmp dword ptr [r9+0x08], r10d
- jle SHORT G_M56974_IG15
+ jg SHORT G_M56974_IG14
;; size=6 bbWeight=6.75 PerfScore 27.02
-G_M56974_IG13: ; bbWeight=0.21, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref
+G_M56974_IG12: ; bbWeight=0.41, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r9]
+ inc r10d
+ cmp r10d, r8d
+ jl SHORT G_M56974_IG10
+ ;; size=8 bbWeight=0.41 PerfScore 0.62
+G_M56974_IG13: ; bbWeight=0.21, gcrefRegs=00C2 {rcx rsi rdi}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs -[r11]
+ jmp SHORT G_M56974_IG09
+ ;; size=2 bbWeight=0.21 PerfScore 0.42
+G_M56974_IG14: ; bbWeight=0.21, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref
+ ; gcrRegs +[r11]
lea r9d, [rax+0x01]
mov rdx, gword ptr [rbp+0x60]
; gcrRegs +[rdx]
jmp G_M56974_IG02
;; size=13 bbWeight=0.21 PerfScore 0.74
-G_M56974_IG14: ; bbWeight=0.00, gcrefRegs=00C2 {rcx rsi rdi}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rdx r11]
- inc eax
- cmp ebx, eax
- jle G_M56974_IG37
- jmp SHORT G_M56974_IG10
- ;; size=12 bbWeight=0.00 PerfScore 0.01
-G_M56974_IG15: ; bbWeight=0.41, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[r11]
- inc r10d
- cmp r10d, r8d
- jl SHORT G_M56974_IG11
- ;; size=8 bbWeight=0.41 PerfScore 0.62
-G_M56974_IG16: ; bbWeight=0.21, gcrefRegs=00C2 {rcx rsi rdi}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[r11]
- test rdi, rdi
- je SHORT G_M56974_IG14
- test eax, eax
- jl SHORT G_M56974_IG14
- cmp dword ptr [rdi+0x08], ebx
- jl SHORT G_M56974_IG14
- ;; size=14 bbWeight=0.21 PerfScore 1.37
-G_M56974_IG17: ; bbWeight=0.64, gcrefRegs=00C2 {rcx rsi rdi}, byrefRegs=0000 {}, byref, isz
- jmp SHORT G_M56974_IG09
- ;; size=2 bbWeight=0.64 PerfScore 1.29
-G_M56974_IG18: ; bbWeight=395.16, gcrefRegs=28C2 {rcx rsi rdi r11 r13}, byrefRegs=0000 {}, byref
- ; gcrRegs +[r11 r13]
+G_M56974_IG15: ; bbWeight=395.16, gcrefRegs=28C2 {rcx rsi rdi r11 r13}, byrefRegs=0000 {}, byref
+ ; gcrRegs -[rdx] +[r13]
cmp eax, dword ptr [r13+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
mov r12d, eax
mov r12, gword ptr [r13+8*r12+0x10]
; gcrRegs +[r12]
@@ -199,10 +177,10 @@ G_M56974_IG18: ; bbWeight=395.16, gcrefRegs=28C2 {rcx rsi rdi r11 r13}, b
sub r13d, eax
dec r13d
cmp r13d, dword ptr [r12+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
vcvtss2sd xmm1, xmm1, dword ptr [r12+4*r13+0x10]
;; size=45 bbWeight=395.16 PerfScore 7112.95
-G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG16: ; bbWeight=98.79, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r12]
vcvtss2sd xmm0, xmm0, xmm0
vaddsd xmm0, xmm0, xmm1
@@ -212,39 +190,39 @@ G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefR
lea r12d, [r10+0x01]
mov edx, r12d
test edx, edx
- jl SHORT G_M56974_IG24
+ jl SHORT G_M56974_IG21
;; size=27 bbWeight=98.79 PerfScore 1111.40
-G_M56974_IG20: ; bbWeight=3161.31, gcrefRegs=28C2 {rcx rsi rdi r11 r13}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG17: ; bbWeight=3161.31, gcrefRegs=28C2 {rcx rsi rdi r11 r13}, byrefRegs=0000 {}, byref, isz
cmp dword ptr [r13+0x08], edx
- jle SHORT G_M56974_IG24
+ jle SHORT G_M56974_IG21
;; size=6 bbWeight=3161.31 PerfScore 12645.25
-G_M56974_IG21: ; bbWeight=98.79, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG18: ; bbWeight=98.79, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r13]
mov edx, r9d
mov rdx, gword ptr [rdi+8*rdx+0x10]
; gcrRegs +[rdx]
cmp r12d, dword ptr [rdx+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
mov r13d, r12d
vcvtss2sd xmm1, xmm1, dword ptr [rdx+4*r13+0x10]
vucomisd xmm1, xmm0
- ja SHORT G_M56974_IG24
+ ja SHORT G_M56974_IG21
;; size=34 bbWeight=98.79 PerfScore 1630.05
-G_M56974_IG22: ; bbWeight=98.79, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref
+G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref
; gcrRegs -[rdx]
inc r9d
cmp ebx, r9d
jg G_M56974_IG05
;; size=12 bbWeight=98.79 PerfScore 148.19
-G_M56974_IG23: ; bbWeight=0.21, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref
- jmp G_M56974_IG15
+G_M56974_IG20: ; bbWeight=0.21, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref
+ jmp G_M56974_IG12
;; size=5 bbWeight=0.21 PerfScore 0.42
-G_M56974_IG24: ; bbWeight=0.16, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG21: ; bbWeight=0.16, gcrefRegs=08C2 {rcx rsi rdi r11}, byrefRegs=0000 {}, byref, isz
mov edx, r9d
mov rdx, gword ptr [rdi+8*rdx+0x10]
; gcrRegs +[rdx]
cmp r12d, dword ptr [rdx+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
mov r13d, r12d
vcvtsd2ss xmm0, xmm0, xmm0
vmovss dword ptr [rdx+4*r13+0x10], xmm0
...
benchmarks.run_tiered.linux.x64.checked.mch
-48 (-6.66%) : 46384.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -9,16 +9,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T08] ( 15, 12.06) ref -> rbx class-hnd single-def <float[][]>
+; V00 arg0 [V00,T08] ( 12, 12.04) ref -> rbx class-hnd single-def <float[][]>
; V01 arg1 [V01,T09] ( 9, 12.04) ref -> r15 class-hnd single-def <int[][]>
; V02 arg2 [V02,T19] ( 3, 3 ) ref -> r12 class-hnd single-def <double[]>
; V03 arg3 [V03,T18] ( 4, 6 ) ref -> r13 class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T10] ( 5, 12 ) int -> r14 single-def
+; V04 arg4 [V04,T10] ( 4, 12 ) int -> r14 single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T03] ( 17, 37.52) int -> [rbp+0x48] tier0-frame
-; V08 loc3 [V08,T14] ( 6, 10 ) ref -> [rbp+0x40] class-hnd tier0-frame <float[]>
-; V09 loc4 [V09,T00] ( 13, 56 ) int -> [rbp+0x3C] tier0-frame
+; V07 loc2 [V07,T03] ( 12, 38.50) int -> [rbp+0x48] tier0-frame
+; V08 loc3 [V08,T14] ( 5, 10 ) ref -> [rbp+0x40] class-hnd tier0-frame <float[]>
+; V09 loc4 [V09,T00] ( 12, 56 ) int -> [rbp+0x3C] tier0-frame
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T05] ( 20, 26.58) int -> [rbp+0x34] tier0-frame
;* V12 loc7 [V12 ] ( 0, 0 ) float -> zero-ref
@@ -37,7 +37,7 @@
; V25 tmp10 [V25,T13] ( 6, 12 ) ref -> registers "arr expr"
; V26 cse0 [V26,T20] ( 3, 0.10) ref -> rcx "CSE - conservative"
; V27 cse1 [V27,T17] ( 3, 9.90) ref -> rax "CSE - moderate"
-; V28 cse2 [V28,T07] ( 9, 17 ) int -> [rbp-0x2C] spill-single-def "CSE - moderate"
+; V28 cse2 [V28,T07] ( 7, 16 ) int -> [rbp-0x2C] spill-single-def "CSE - moderate"
; V29 cse3 [V29,T06] ( 16, 20 ) int -> r9 multi-def "CSE - moderate"
; TEMP_01 double -> [rbp-0x34]
;
@@ -69,39 +69,13 @@ G_M56974_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
mov edi, dword ptr [rbp+0x3C]
mov eax, dword ptr [rbp+0x34]
;; size=90 bbWeight=0.01 PerfScore 0.28
-G_M56974_IG02: ; bbWeight=0.01, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref
- jmp G_M56974_IG16
- ;; size=5 bbWeight=0.01 PerfScore 0.02
-G_M56974_IG03: ; bbWeight=1.98, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG02: ; bbWeight=0.01, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+ jmp SHORT G_M56974_IG12
+ ;; size=2 bbWeight=0.01 PerfScore 0.02
+G_M56974_IG03: ; bbWeight=2, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rcx]
- mov eax, esi
- mov rax, gword ptr [rbx+8*rax+0x10]
- ; gcrRegs +[rax]
- xor ecx, ecx
- test r14d, r14d
- mov edi, ecx
- jg SHORT G_M56974_IG06
- ;; size=16 bbWeight=1.98 PerfScore 7.92
-G_M56974_IG04: ; bbWeight=7.92, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rax]
- inc esi
- cmp r8d, esi
- jg SHORT G_M56974_IG03
- ;; size=7 bbWeight=7.92 PerfScore 11.88
-G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rbx r12-r13 r15]
- jmp SHORT G_M56974_IG09
- ;; size=2 bbWeight=1 PerfScore 2.00
-G_M56974_IG06: ; bbWeight=0.99, gcrefRegs=B009 {rax rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[rax rbx r12-r13 r15]
- mov rcx, rax
- ; gcrRegs +[rcx]
- jmp SHORT G_M56974_IG11
- ;; size=5 bbWeight=0.99 PerfScore 2.23
-G_M56974_IG07: ; bbWeight=0.02, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rax rcx]
cmp esi, dword ptr [rbx+0x08]
- jae G_M56974_IG33
+ jae G_M56974_IG29
mov ecx, esi
mov rcx, gword ptr [rbx+8*rcx+0x10]
; gcrRegs +[rcx]
@@ -112,15 +86,15 @@ G_M56974_IG07: ; bbWeight=0.02, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRe
; gcrRegs -[rcx]
test r14d, r14d
mov edi, ecx
- jg SHORT G_M56974_IG10
- ;; size=30 bbWeight=0.02 PerfScore 0.17
-G_M56974_IG08: ; bbWeight=0.08, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+ jg SHORT G_M56974_IG06
+ ;; size=30 bbWeight=2 PerfScore 17.00
+G_M56974_IG04: ; bbWeight=8, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rax]
inc esi
cmp r8d, esi
- jg SHORT G_M56974_IG07
- ;; size=7 bbWeight=0.08 PerfScore 0.12
-G_M56974_IG09: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
+ jg SHORT G_M56974_IG03
+ ;; size=7 bbWeight=8 PerfScore 12.00
+G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
; gcrRegs -[rbx r12-r13 r15]
add rsp, 184
pop rbx
@@ -131,64 +105,58 @@ G_M56974_IG09: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
pop rbp
ret
;; size=18 bbWeight=1 PerfScore 4.25
-G_M56974_IG10: ; bbWeight=0.01, gcVars=0000000000000000 {}, gcrefRegs=B009 {rax rbx r12 r13 r15}, byrefRegs=0000 {}, gcvars, byref
+G_M56974_IG06: ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=B009 {rax rbx r12 r13 r15}, byrefRegs=0000 {}, gcvars, byref
; gcrRegs +[rax rbx r12-r13 r15]
mov rcx, rax
; gcrRegs +[rcx]
- ;; size=3 bbWeight=0.01 PerfScore 0.00
-G_M56974_IG11: ; bbWeight=2, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+ ;; size=3 bbWeight=1 PerfScore 0.25
+G_M56974_IG07: ; bbWeight=2, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rax]
cmp esi, dword ptr [r15+0x08]
- jae G_M56974_IG33
+ jae G_M56974_IG29
mov eax, esi
mov rdx, gword ptr [r15+8*rax+0x10]
; gcrRegs +[rdx]
test edi, edi
- jl SHORT G_M56974_IG13
+ jl SHORT G_M56974_IG09
;; size=21 bbWeight=2 PerfScore 15.00
-G_M56974_IG12: ; bbWeight=16, gcrefRegs=B00E {rcx rdx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG08: ; bbWeight=16, gcrefRegs=B00E {rcx rdx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
cmp dword ptr [rdx+0x08], edi
- jg SHORT G_M56974_IG15
+ jg SHORT G_M56974_IG11
;; size=5 bbWeight=16 PerfScore 64.00
-G_M56974_IG13: ; bbWeight=8, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG09: ; bbWeight=8, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rdx]
inc edi
cmp edi, r14d
- jl SHORT G_M56974_IG11
+ jl SHORT G_M56974_IG07
;; size=7 bbWeight=8 PerfScore 12.00
-G_M56974_IG14: ; bbWeight=1, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG10: ; bbWeight=1, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rcx]
- test rbx, rbx
- je SHORT G_M56974_IG08
- test esi, esi
- jl SHORT G_M56974_IG08
- cmp dword ptr [rbx+0x08], r8d
- jl SHORT G_M56974_IG08
jmp SHORT G_M56974_IG04
- ;; size=17 bbWeight=1 PerfScore 8.50
-G_M56974_IG15: ; bbWeight=0.50, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref
+ ;; size=2 bbWeight=1 PerfScore 2.00
+G_M56974_IG11: ; bbWeight=0.50, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref
; gcrRegs +[rcx]
lea eax, [rsi+0x01]
;; size=3 bbWeight=0.50 PerfScore 0.25
-G_M56974_IG16: ; bbWeight=1, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG12: ; bbWeight=1, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
mov r8d, dword ptr [r12+0x08]
mov dword ptr [rbp-0x2C], r8d
cmp r8d, eax
- jle SHORT G_M56974_IG13
+ jle SHORT G_M56974_IG09
test r15, r15
- je G_M56974_IG26
+ je G_M56974_IG22
test rbx, rbx
- je G_M56974_IG25
+ je G_M56974_IG21
test eax, eax
- jl G_M56974_IG24
+ jl G_M56974_IG20
cmp dword ptr [r15+0x08], r8d
- jl G_M56974_IG23
+ jl G_M56974_IG19
cmp dword ptr [rbx+0x08], r8d
- jl G_M56974_IG26
+ jl G_M56974_IG22
;; size=60 bbWeight=1 PerfScore 16.00
-G_M56974_IG17: ; bbWeight=3.96, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG13: ; bbWeight=3.96, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
cmp edi, dword ptr [rcx+0x08]
- jae G_M56974_IG33
+ jae G_M56974_IG29
mov dword ptr [rbp+0x3C], edi
mov edx, edi
mov gword ptr [rbp+0x40], rcx
@@ -215,42 +183,42 @@ G_M56974_IG17: ; bbWeight=3.96, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byr
lea r9d, [r8+0x01]
mov r10d, r9d
test r10d, r10d
- jl SHORT G_M56974_IG20
+ jl SHORT G_M56974_IG16
;; size=82 bbWeight=3.96 PerfScore 135.63
-G_M56974_IG18: ; bbWeight=15.84, gcrefRegs=B00B {rax rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG14: ; bbWeight=15.84, gcrefRegs=B00B {rax rcx rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
cmp dword ptr [rcx+0x08], r10d
- jle SHORT G_M56974_IG20
+ jle SHORT G_M56974_IG16
;; size=6 bbWeight=15.84 PerfScore 63.36
-G_M56974_IG19: ; bbWeight=1.98, gcrefRegs=B009 {rax rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG15: ; bbWeight=1.98, gcrefRegs=B009 {rax rbx r12 r13 r15}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rcx]
mov esi, edi
mov r11, gword ptr [rbx+8*rsi+0x10]
; gcrRegs +[r11]
cmp r9d, dword ptr [r11+0x08]
- jae G_M56974_IG33
+ jae G_M56974_IG29
mov esi, r9d
vcvtss2sd xmm1, xmm1, dword ptr [r11+4*rsi+0x10]
vucomisd xmm1, xmm0
- jbe SHORT G_M56974_IG21
+ jbe SHORT G_M56974_IG17
;; size=33 bbWeight=1.98 PerfScore 32.67
-G_M56974_IG20: ; bbWeight=1.98, gcrefRegs=B009 {rax rbx r12 r13 r15}, byrefRegs=0000 {}, byref
+G_M56974_IG16: ; bbWeight=1.98, gcrefRegs=B009 {rax rbx r12 r13 r15}, byrefRegs=0000 {}, byref
; gcrRegs -[r11]
mov esi, edi
mov rdx, gword ptr [rbx+8*rsi+0x10]
; gcrRegs +[rdx]
cmp r9d, dword ptr [rdx+0x08]
- jae G_M56974_IG33
+ jae G_M56974_IG29
mov esi, r9d
vcvtsd2ss xmm0, xmm0, xmm0
vmovss dword ptr [rdx+4*rsi+0x10], xmm0
cmp r9d, dword ptr [rax+0x08]
- jae G_M56974_IG33
+ jae G_M56974_IG29
mov esi, r9d
mov ecx, dword ptr [rbp+0x48]
mov dword ptr [rax+4*rsi+0x10], ecx
mov dword ptr [rbp+0x48], ecx
;; size=53 bbWeight=1.98 PerfScore 39.10
-G_M56974_IG21: ; bbWeight=3.96, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref
+G_M56974_IG17: ; bbWeight=3.96, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRegs=0000 {}, byref
; gcrRegs -[rax rdx]
inc edi
cmp dword ptr [rbp-0x2C], edi
@@ -259,24 +227,24 @@ G_M56974_IG21: ; bbWeight=3.96, gcrefRegs=B008 {rbx r12 r13 r15}, byrefRe
mov rcx, gword ptr [rbp+0x40]
; gcrRegs +[rcx]
mov esi, dword ptr [rbp+0x48]
- jg G_M56974_IG17
+ jg G_M56974_IG13
;; size=23 bbWeight=3.96 PerfScore 22.77
-G_M56974_IG22: ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, gcvars, byref
+G_M56974_IG18: ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=B00A {rcx rbx r12 r13 r15}, byrefRegs=0000 {}, gcvars, byref
; GC ptr vars -{V08}
mov r8d, dword ptr [rbp-0x2C]
- jmp G_M56974_IG13
+ jmp G_M56974_IG09
...
coreclr_tests.run.linux.x64.checked.mch
+31 (+2.67%) : 475934.dasm - JitTestlcsmixedlcs_cs.LCS:TestEntryPoint():int (Tier1-OSR)
@@ -11,13 +11,13 @@
; Final local variable assignments
;
;* V00 loc0 [V00 ] ( 0, 0 ) ref -> zero-ref class-hnd exact <<unknown class>>
-; V01 loc1 [V01,T20] ( 25, 320.52) ref -> r14 class-hnd exact <int[]>
-; V02 loc2 [V02,T63] ( 3, 0 ) ref -> r12 class-hnd exact <ushort[][]>
+; V01 loc1 [V01,T20] ( 26, 320.53) ref -> r14 class-hnd exact <int[]>
+; V02 loc2 [V02,T64] ( 3, 0 ) ref -> r12 class-hnd exact <ushort[][]>
; V03 loc3 [V03,T49] ( 2, 2.38) ref -> r13 class-hnd <int[,,,][,,,]>
; V04 loc4 [V04,T10] ( 17, 440.89) ref -> r15 class-hnd <int[,][,][,][,]>
; V05 loc5 [V05,T02] ( 30, 684.27) ref -> rbx class-hnd exact <int[]>
;* V06 loc6 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc7 [V07,T62] ( 6, 0 ) int -> rsi
+; V07 loc7 [V07,T63] ( 10, 0.04) int -> rsi
;# V08 OutArgs [V08 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V09 tmp1 [V09 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "dup spill" <<unknown class>>
;* V10 tmp2 [V10 ] ( 0, 0 ) int -> zero-ref "Strict ordering of exceptions for Array store"
@@ -50,7 +50,7 @@
; V37 tmp29 [V37,T48] ( 3, 3.35) byref -> rdx "dup spill"
; V38 tmp30 [V38,T52] ( 3, 0.59) byref -> rdx "dup spill"
; V39 tmp31 [V39,T60] ( 3, 0.13) byref -> rdi "dup spill"
-; V40 tmp32 [V40,T64] ( 3, 0 ) byref -> rdi "dup spill"
+; V40 tmp32 [V40,T61] ( 6, 0.07) byref -> rdi "dup spill"
; V41 tmp33 [V41,T00] ( 6,1028.48) ref -> rdx class-hnd "impImportNewObjArray" <int[,][,]>
; V42 tmp34 [V42,T15] ( 2, 342.83) int -> rdi "impImportNewObjArray"
; V43 tmp35 [V43,T16] ( 2, 342.83) int -> rsi "impImportNewObjArray"
@@ -83,13 +83,13 @@
; V70 cse1 [V70,T51] ( 3, 1.04) byref -> [rbp-0x60] spill-single-def hoist "CSE - conservative"
; V71 cse2 [V71,T59] ( 3, 0.22) byref -> r8 "CSE - conservative"
; V72 cse3 [V72,T58] ( 3, 0.30) int -> rdi "CSE - conservative"
-; V73 cse4 [V73,T61] ( 3, 0.07) int -> rsi "CSE - conservative"
+; V73 cse4 [V73,T62] ( 3, 0.07) int -> rsi "CSE - conservative"
; V74 cse5 [V74,T22] ( 3, 257.12) int -> rdi "CSE - moderate"
; V75 cse6 [V75,T27] ( 3, 42.88) int -> rdi "CSE - moderate"
; V76 cse7 [V76,T46] ( 3, 7.15) int -> rdi "CSE - conservative"
; V77 cse8 [V77,T50] ( 3, 1.67) int -> rdi "CSE - conservative"
; V78 cse9 [V78,T29] ( 2, 28.59) int -> rdx "CSE - aggressive"
-; V79 cse10 [V79,T25] ( 7, 204.77) int -> [rbp-0x4C] spill-single-def "CSE - moderate"
+; V79 cse10 [V79,T25] ( 8, 204.77) int -> [rbp-0x4C] spill-single-def "CSE - moderate"
; V80 cse11 [V80,T21] ( 9, 264.53) int -> registers multi-def "CSE - moderate"
; V81 cse12 [V81,T23] ( 3, 257.12) int -> rcx "CSE - moderate"
; V82 cse13 [V82,T24] ( 3, 257.12) int -> r9 "CSE - moderate"
@@ -125,7 +125,7 @@ G_M23463_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
; gcrRegs +[rbx]
;; size=114 bbWeight=1 PerfScore 25.33
G_M23463_IG02: ; bbWeight=1, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
- jmp G_M23463_IG09
+ jmp G_M23463_IG10
;; size=5 bbWeight=1 PerfScore 2.00
G_M23463_IG03: ; bbWeight=0.02, gcVars=00000000000000000008800000000000 {V69 V70}, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0100 {r8}, gcvars, byref, isz
; byrRegs +[r8]
@@ -134,7 +134,7 @@ G_M23463_IG03: ; bbWeight=0.02, gcVars=00000000000000000008800000000000 {
mov dword ptr [r8], edi
mov edi, dword ptr [rbx+0x14]
cmp edi, dword ptr [r14+0x14]
- jl SHORT G_M23463_IG05
+ jl SHORT G_M23463_IG06
;; size=14 bbWeight=0.02 PerfScore 0.16
G_M23463_IG04: ; bbWeight=0.02, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0100 {r8}, byref, isz
lea rdi, bword ptr [rbx+0x10]
@@ -143,23 +143,38 @@ G_M23463_IG04: ; bbWeight=0.02, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byr
inc esi
mov dword ptr [rdi], esi
cmp esi, dword ptr [r14+0x10]
- jge G_M23463_IG26
+ jge G_M23463_IG27
jmp SHORT G_M23463_IG03
;; size=22 bbWeight=0.02 PerfScore 0.21
-G_M23463_IG05: ; bbWeight=0.09, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
+G_M23463_IG05: ; bbWeight=0.01, gcVars=00000000000000000000000000000000 {}, gcrefRegs=D000 {r12 r14 r15}, byrefRegs=0000 {}, gcvars, byref, isz
+ ; gcrRegs -[rbx r13]
; byrRegs -[rdi r8]
+ ; GC ptr vars -{V47 V69 V70}
+ mov edi, esi
+ lea rdi, bword ptr [r14+4*rdi+0x10]
+ ; byrRegs +[rdi]
+ dec dword ptr [rdi]
+ inc esi
+ cmp esi, 8
+ jge G_M23463_IG29
+ jmp SHORT G_M23463_IG05
+ ;; size=22 bbWeight=0.01 PerfScore 0.08
+G_M23463_IG06: ; bbWeight=0.09, gcVars=00000000000000000008800000000000 {V69 V70}, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, gcvars, byref
+ ; gcrRegs +[rbx r13]
+ ; byrRegs -[rdi]
+ ; GC ptr vars +{V47 V69 V70}
mov edx, dword ptr [rbx+0x10]
mov edi, dword ptr [rbx+0x14]
mov esi, dword ptr [r14+0x18]
mov r8d, dword ptr [r14+0x1C]
sub edx, dword ptr [r15+0x18]
cmp edx, dword ptr [r15+0x10]
- jae G_M23463_IG25
+ jae G_M23463_IG26
mov r9d, dword ptr [r15+0x14]
imul edx, r9d
sub edi, dword ptr [r15+0x1C]
cmp edi, r9d
- jae G_M23463_IG25
+ jae G_M23463_IG26
add edx, edi
lea rdi, bword ptr [r15+8*rdx+0x20]
; byrRegs +[rdi]
@@ -186,9 +201,9 @@ G_M23463_IG05: ; bbWeight=0.09, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byr
mov dword ptr [rsi], edi
mov edi, dword ptr [rbx+0x18]
cmp edi, dword ptr [r14+0x18]
- jl G_M23463_IG16
+ jl G_M23463_IG17
;; size=124 bbWeight=0.09 PerfScore 3.50
-G_M23463_IG06: ; bbWeight=0.10, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
+G_M23463_IG07: ; bbWeight=0.10, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
; byrRegs -[rsi]
lea r8, bword ptr [rbx+0x14]
; byrRegs +[r8]
@@ -198,41 +213,41 @@ G_M23463_IG06: ; bbWeight=0.10, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byr
inc edi
mov dword ptr [rdx], edi
cmp edi, dword ptr [r14+0x14]
- jl G_M23463_IG05
+ jl G_M23463_IG06
;; size=23 bbWeight=0.10 PerfScore 0.79
-G_M23463_IG07: ; bbWeight=0.01, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0100 {r8}, byref
+G_M23463_IG08: ; bbWeight=0.01, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0100 {r8}, byref
; byrRegs -[rdx]
jmp G_M23463_IG04
;; size=5 bbWeight=0.01 PerfScore 0.02
-G_M23463_IG08: ; bbWeight=14.29, gcVars=00000000000000000000000000000000 {}, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, gcvars, byref
+G_M23463_IG09: ; bbWeight=14.29, gcVars=00000000000000000000000000000000 {}, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[r8]
; GC ptr vars -{V47 V69 V70}
xor edx, edx
mov dword ptr [rbx+0x24], edx
;; size=5 bbWeight=14.29 PerfScore 17.87
-G_M23463_IG09: ; bbWeight=14.29, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
+G_M23463_IG10: ; bbWeight=14.29, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
mov edx, dword ptr [rbx+0x08]
cmp edx, 5
- jbe G_M23463_IG25
+ jbe G_M23463_IG26
mov edx, dword ptr [rbx+0x24]
mov eax, dword ptr [r14+0x08]
mov dword ptr [rbp-0x4C], eax
cmp eax, 5
- jbe G_M23463_IG25
+ jbe G_M23463_IG26
cmp edx, dword ptr [r14+0x24]
- jge G_M23463_IG15
+ jge G_M23463_IG16
;; size=41 bbWeight=14.29 PerfScore 192.96
-G_M23463_IG10: ; bbWeight=85.71, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
+G_M23463_IG11: ; bbWeight=85.71, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
mov edx, dword ptr [rbx+0x10]
mov edi, dword ptr [rbx+0x14]
sub edx, dword ptr [r15+0x18]
cmp edx, dword ptr [r15+0x10]
- jae G_M23463_IG25
+ jae G_M23463_IG26
mov ecx, dword ptr [r15+0x14]
imul edx, ecx
sub edi, dword ptr [r15+0x1C]
cmp edi, ecx
- jae G_M23463_IG25
+ jae G_M23463_IG26
add edx, edi
mov rdx, gword ptr [r15+8*rdx+0x20]
; gcrRegs +[rdx]
@@ -240,30 +255,30 @@ G_M23463_IG10: ; bbWeight=85.71, gcrefRegs=F008 {rbx r12 r13 r14 r15}, by
mov esi, dword ptr [rbx+0x1C]
sub edi, dword ptr [rdx+0x18]
cmp edi, dword ptr [rdx+0x10]
- jae G_M23463_IG25
+ jae G_M23463_IG26
mov ecx, dword ptr [rdx+0x14]
imul edi, ecx
sub esi, dword ptr [rdx+0x1C]
cmp esi, ecx
- jae G_M23463_IG25
+ jae G_M23463_IG26
add edi, esi
mov rdx, gword ptr [rdx+8*rdi+0x20]
mov edi, dword ptr [rbx+0x20]
mov esi, dword ptr [rbx+0x24]
cmp eax, 6
- jbe G_M23463_IG25
+ jbe G_M23463_IG26
mov ecx, dword ptr [r14+0x28]
cmp eax, 7
- jbe G_M23463_IG25
+ jbe G_M23463_IG26
mov r8d, dword ptr [r14+0x2C]
sub edi, dword ptr [rdx+0x18]
cmp edi, dword ptr [rdx+0x10]
- jae G_M23463_IG25
+ jae G_M23463_IG26
mov r9d, dword ptr [rdx+0x14]
imul edi, r9d
sub esi, dword ptr [rdx+0x1C]
cmp esi, r9d
- jae G_M23463_IG25
+ jae G_M23463_IG26
add edi, esi
lea rdi, bword ptr [rdx+8*rdi+0x20]
; byrRegs +[rdi]
@@ -286,16 +301,16 @@ G_M23463_IG10: ; bbWeight=85.71, gcrefRegs=F008 {rbx r12 r13 r14 r15}, by
; gcrRegs -[rax rsi]
; byrRegs -[rdi]
;; size=206 bbWeight=85.71 PerfScore 6620.83
-G_M23463_IG11: ; bbWeight=85.71, isz, extend
+G_M23463_IG12: ; bbWeight=85.71, isz, extend
lea rdx, bword ptr [rbx+0x24]
; byrRegs +[rdx]
mov edi, dword ptr [rdx]
inc edi
mov dword ptr [rdx], edi
cmp edi, dword ptr [r14+0x24]
- jl SHORT G_M23463_IG14
+ jl SHORT G_M23463_IG15
;; size=16 bbWeight=85.71 PerfScore 664.23
-G_M23463_IG12: ; bbWeight=14.29, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
+G_M23463_IG13: ; bbWeight=14.29, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
; byrRegs -[rdx]
lea rdx, bword ptr [rbx+0x20]
; byrRegs +[rdx]
@@ -303,26 +318,26 @@ G_M23463_IG12: ; bbWeight=14.29, gcrefRegs=F008 {rbx r12 r13 r14 r15}, by
inc edi
mov dword ptr [rdx], edi
cmp edi, dword ptr [r14+0x20]
- jl G_M23463_IG08
+ jl G_M23463_IG09
;; size=20 bbWeight=14.29 PerfScore 110.77
-G_M23463_IG13: ; bbWeight=2.04, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
+G_M23463_IG14: ; bbWeight=2.04, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
; byrRegs -[rdx]
lea rax, bword ptr [rbx+0x1C]
; byrRegs +[rax]
mov bword ptr [rbp-0x58], rax
; GC ptr vars +{V69}
- jmp G_M23463_IG21
+ jmp G_M23463_IG22
;; size=13 bbWeight=2.04 PerfScore 7.12
-G_M23463_IG14: ; bbWeight=42.85, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
+G_M23463_IG15: ; bbWeight=42.85, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref
; byrRegs -[rax]
; GC ptr vars -{V69}
mov eax, dword ptr [rbp-0x4C]
- jmp G_M23463_IG10
+ jmp G_M23463_IG11
;; size=8 bbWeight=42.85 PerfScore 128.56
-G_M23463_IG15: ; bbWeight=7.15, gcrefRegs=F008 {rbx r12 r13 r14 r15}, byrefRegs=0000 {}, byref, isz
...
libraries.pmi.linux.x64.checked.mch
-15 (-17.44%) : 104608.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint
@@ -7,9 +7,9 @@
; No matching PGO data
; Final local variable assignments
;
-; V00 loc0 [V00,T02] ( 3, 10 ) ref -> rbx class-hnd exact single-def <uint[]>
-; V01 loc1 [V01,T00] ( 7, 49 ) int -> r15
-; V02 loc2 [V02,T01] ( 2, 16 ) int -> rax
+; V00 loc0 [V00,T02] ( 3, 9.92) ref -> rbx class-hnd exact single-def <uint[]>
+; V01 loc1 [V01,T00] ( 6, 40.60) int -> r15
+; V02 loc2 [V02,T01] ( 2, 15.84) int -> rax
;# V03 OutArgs [V03 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;
; Lcl frame size = 0
@@ -29,18 +29,16 @@ G_M39919_IG02: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
; gcrRegs +[rbx]
xor r15d, r15d
;; size=26 bbWeight=1 PerfScore 2.00
-G_M39919_IG03: ; bbWeight=8, gcrefRegs=0008 {rbx}, byrefRegs=0000 {}, byref, isz
+G_M39919_IG03: ; bbWeight=7.92, gcrefRegs=0008 {rbx}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rax]
mov edi, r15d
call [Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:CalcEntry(uint):uint]
- cmp r15d, 256
- jae SHORT G_M39919_IG06
mov ecx, r15d
mov dword ptr [rbx+4*rcx+0x10], eax
inc r15d
cmp r15d, 255
jbe SHORT G_M39919_IG03
- ;; size=37 bbWeight=8 PerfScore 58.00
+ ;; size=28 bbWeight=7.92 PerfScore 47.52
G_M39919_IG04: ; bbWeight=1, gcrefRegs=0008 {rbx}, byrefRegs=0000 {}, byref
mov rax, rbx
; gcrRegs +[rax]
@@ -51,13 +49,8 @@ G_M39919_IG05: ; bbWeight=1, epilog, nogc, extend
pop rbp
ret
;; size=5 bbWeight=1 PerfScore 2.50
-G_M39919_IG06: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
- ; gcrRegs -[rax rbx]
- call CORINFO_HELP_RNGCHKFAIL
- int3
- ;; size=6 bbWeight=0 PerfScore 0.00
-; Total bytes of code 86, prolog size 9, PerfScore 66.25, instruction count 25, allocated bytes for code 86 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
+; Total bytes of code 71, prolog size 9, PerfScore 55.77, instruction count 21, allocated bytes for code 71 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
; ============================================================
Unwind Info:
libraries_tests.run.linux.x64.Release.mch
-124 (-6.37%) : 322107.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
@@ -13,13 +13,13 @@
;* V00 this [V00 ] ( 0, 0 ) ref -> zero-ref this class-hnd single-def <System.Globalization.Tests.CompareInfoCompareTests>
;* V01 arg1 [V01 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def <int[]>
; V02 arg2 [V02,T53] ( 3, 2 ) ref -> rbx class-hnd single-def <int[]>
-; V03 loc0 [V03,T40] ( 10, 302.45) ref -> r13 class-hnd exact <System.Collections.Generic.List`1[ushort]>
+; V03 loc0 [V03,T40] ( 9, 302.45) ref -> r13 class-hnd exact <System.Collections.Generic.List`1[ushort]>
;* V04 loc1 [V04 ] ( 0, 0 ) ushort -> zero-ref
;* V05 loc2 [V05 ] ( 0, 0 ) ushort -> zero-ref
-; V06 loc3 [V06,T55] ( 6, 0.15) ref -> [rbp+0xD8] class-hnd tier0-frame <int[]>
-; V07 loc4 [V07,T54] ( 10, 0.30) int -> [rbp+0xD4] tier0-frame
-; V08 loc5 [V08,T09] ( 6, 1854.29) int -> registers
-; V09 loc6 [V09,T51] ( 9, 16.89) int -> [rbp+0xCC] tier0-frame
+; V06 loc3 [V06,T56] ( 2, 0.08) ref -> [rbp+0xD8] class-hnd tier0-frame <int[]>
+; V07 loc4 [V07,T54] ( 5, 0.19) int -> [rbp+0xD4] tier0-frame
+; V08 loc5 [V08,T09] ( 5, 1854.29) int -> r15
+; V09 loc6 [V09,T51] ( 8, 16.89) int -> [rbp+0xCC] tier0-frame
; V10 loc7 [V10,T42] ( 4, 200 ) ushort -> r12
; V11 loc8 [V11,T43] ( 3, 197.59) ushort -> [rbp+0xC4] tier0-frame
; V12 loc9 [V12,T15] ( 8, 590.37) int -> registers
@@ -28,13 +28,13 @@
; V15 loc12 [V15,T44] ( 2, 195.18) int -> [rbp+0xB4] spill-single-def tier0-frame
; V16 loc13 [V16,T45] ( 2, 195.18) int -> [rbp+0xB0] spill-single-def tier0-frame
; V17 loc14 [V17 ] ( 50,52017.76) struct (40) [rbp+0x88] do-not-enreg[XS] addr-exposed ld-addr-op tier0-frame <System.Runtime.CompilerServices.DefaultInterpolatedStringHandler>
-; V18 loc15 [V18,T58] ( 3, 0 ) ref -> rbx class-hnd <int[]>
-; V19 loc16 [V19,T57] ( 5, 0 ) int -> r15
+; V18 loc15 [V18,T59] ( 3, 0 ) ref -> rbx class-hnd <int[]>
+; V19 loc16 [V19,T58] ( 5, 0 ) int -> r15
;* V20 loc17 [V20 ] ( 0, 0 ) ref -> zero-ref class-hnd exact <<unknown class>>
;# V21 OutArgs [V21 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V22 tmp1 [V22 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Collections.Generic.List`1[ushort]>
-; V23 tmp2 [V23,T56] ( 7, 0 ) ref -> r14 class-hnd exact "NewObj constructor temp" <<unknown class>>
-; V24 tmp3 [V24,T59] ( 3, 0 ) ref -> r12 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V23 tmp2 [V23,T57] ( 7, 0 ) ref -> r14 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V24 tmp3 [V24,T60] ( 3, 0 ) ref -> r12 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V25 tmp4 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
;* V26 tmp5 [V26 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V27 tmp6 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
@@ -706,7 +706,8 @@
; V693 tmp672 [V693,T38] ( 2, 390.37) ref -> [rbp-0xB0] spill-single-def "argument with side effect"
;* V694 tmp673 [V694 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
; V695 tmp674 [V695,T39] ( 2, 390.37) ref -> rsi "argument with side effect"
-; V696 cse0 [V696,T04] ( 3,37475.49) int -> rcx "CSE - aggressive"
+; V696 cse0 [V696,T55] ( 3, 0.11) int -> rdi "CSE - conservative"
+; V697 cse1 [V697,T04] ( 3,37475.49) int -> rcx "CSE - aggressive"
;
; Lcl frame size = 136
@@ -731,17 +732,17 @@ G_M28013_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov r12d, dword ptr [rbp+0xC8]
mov r14d, dword ptr [rbp+0xC0]
;; size=104 bbWeight=1 PerfScore 21.00
-G_M28013_IG02: ; bbWeight=1, gcVars=0080000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG02: ; bbWeight=1, gcVars=0100000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref, isz
; GC ptr vars +{V06}
jmp SHORT G_M28013_IG04
;; size=2 bbWeight=1 PerfScore 2.00
G_M28013_IG03: ; bbWeight=2.41, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, byref
cmp r14d, dword ptr [r13+0x10]
- jae G_M28013_IG32
+ jae G_M28013_IG26
mov rdi, gword ptr [r13+0x08]
; gcrRegs +[rdi]
cmp r14d, dword ptr [rdi+0x08]
- jae G_M28013_IG26
+ jae G_M28013_IG20
mov eax, r14d
movzx r12, word ptr [rdi+2*rax+0x10]
lea edi, [r12+0x60]
@@ -765,11 +766,11 @@ G_M28013_IG04: ; bbWeight=2.41, gcrefRegs=2008 {rbx r13}, byrefRegs=0000
;; size=20 bbWeight=2.41 PerfScore 18.06
G_M28013_IG05: ; bbWeight=97.59, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, byref
cmp r14d, dword ptr [r13+0x10]
- jae G_M28013_IG32
+ jae G_M28013_IG26
mov rdi, gword ptr [r13+0x08]
; gcrRegs +[rdi]
cmp r14d, dword ptr [rdi+0x08]
- jae G_M28013_IG26
+ jae G_M28013_IG20
mov esi, r14d
movzx rax, word ptr [rdi+2*rsi+0x10]
mov dword ptr [rbp+0xBC], eax
@@ -844,7 +845,7 @@ G_M28013_IG06: ; bbWeight=97.59, extend
; gcr arg pop 0
mov edi, dword ptr [rbp+0x98]
cmp edi, dword ptr [rbp+0xA8]
- ja G_M28013_IG33
+ ja G_M28013_IG27
mov rax, bword ptr [rbp+0xA0]
; byrRegs +[rax]
mov ecx, edi
@@ -861,7 +862,7 @@ G_M28013_IG06: ; bbWeight=97.59, extend
; byrRegs -[rax]
; gcr arg pop 0
cmp dword ptr [rbp-0x2C], 15
- jb G_M28013_IG27
+ jb G_M28013_IG21
mov rdi, 0xD1FFAB1E
; byrRegs +[rdi]
mov rsi, bword ptr [rbp-0x60]
@@ -875,7 +876,7 @@ G_M28013_IG06: ; bbWeight=97.59, extend
add edi, 15
mov dword ptr [rbp+0x98], edi
;; size=122 bbWeight=97.59 PerfScore 3366.94
-G_M28013_IG07: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG07: ; bbWeight=97.59, gcVars=0100000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rsi]
; GC ptr vars -{V33}
lea rdi, [rbp+0x88]
@@ -887,7 +888,7 @@ G_M28013_IG07: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
; gcr arg pop 0
mov edi, dword ptr [rbp+0x98]
cmp edi, dword ptr [rbp+0xA8]
- ja G_M28013_IG33
+ ja G_M28013_IG27
mov rax, bword ptr [rbp+0xA0]
; byrRegs +[rax]
mov ecx, edi
@@ -904,7 +905,7 @@ G_M28013_IG07: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
; byrRegs -[rax]
; gcr arg pop 0
cmp dword ptr [rbp-0x30], 2
- jb G_M28013_IG28
+ jb G_M28013_IG22
mov rdi, 0xD1FFAB1E
; byrRegs +[rdi]
mov rdx, bword ptr [rbp-0x68]
@@ -916,7 +917,7 @@ G_M28013_IG07: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
add edi, 2
mov dword ptr [rbp+0x98], edi
;; size=128 bbWeight=97.59 PerfScore 2586.20
-G_M28013_IG08: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG08: ; bbWeight=97.59, gcVars=0100000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rdx]
; GC ptr vars -{V43}
lea rdi, [rbp+0x88]
@@ -928,7 +929,7 @@ G_M28013_IG08: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
; gcr arg pop 0
mov edi, dword ptr [rbp+0x98]
cmp edi, dword ptr [rbp+0xA8]
- ja G_M28013_IG33
+ ja G_M28013_IG27
mov rax, bword ptr [rbp+0xA0]
; byrRegs +[rax]
mov ecx, edi
@@ -945,7 +946,7 @@ G_M28013_IG08: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
; byrRegs -[rax]
; gcr arg pop 0
cmp dword ptr [rbp-0x34], 13
- jb G_M28013_IG29
+ jb G_M28013_IG23
mov rdi, 0xD1FFAB1E
; byrRegs +[rdi]
mov rsi, bword ptr [rbp-0x70]
@@ -959,7 +960,7 @@ G_M28013_IG08: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
add edi, 13
mov dword ptr [rbp+0x98], edi
;; size=145 bbWeight=97.59 PerfScore 3537.73
-G_M28013_IG09: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG09: ; bbWeight=97.59, gcVars=0100000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rsi]
; GC ptr vars -{V53}
lea rdi, [rbp+0x88]
@@ -971,7 +972,7 @@ G_M28013_IG09: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
; gcr arg pop 0
mov edi, dword ptr [rbp+0x98]
cmp edi, dword ptr [rbp+0xA8]
- ja G_M28013_IG33
+ ja G_M28013_IG27
mov rax, bword ptr [rbp+0xA0]
; byrRegs +[rax]
mov ecx, edi
@@ -988,7 +989,7 @@ G_M28013_IG09: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
; byrRegs -[rax]
; gcr arg pop 0
cmp dword ptr [rbp-0x38], 2
- jb G_M28013_IG30
+ jb G_M28013_IG24
mov rdi, 0xD1FFAB1E
; byrRegs +[rdi]
mov rdx, bword ptr [rbp-0x78]
@@ -1000,7 +1001,7 @@ G_M28013_IG09: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
add edi, 2
mov dword ptr [rbp+0x98], edi
;; size=131 bbWeight=97.59 PerfScore 2659.39
-G_M28013_IG10: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG10: ; bbWeight=97.59, gcVars=0100000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rdx]
; GC ptr vars -{V63}
lea rdi, [rbp+0x88]
@@ -1012,7 +1013,7 @@ G_M28013_IG10: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
; gcr arg pop 0
mov edi, dword ptr [rbp+0x98]
cmp edi, dword ptr [rbp+0xA8]
- ja G_M28013_IG33
+ ja G_M28013_IG27
mov rax, bword ptr [rbp+0xA0]
; byrRegs +[rax]
mov ecx, edi
@@ -1029,7 +1030,7 @@ G_M28013_IG10: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
; byrRegs -[rax]
; gcr arg pop 0
cmp dword ptr [rbp-0x3C], 22
- jb G_M28013_IG31
+ jb G_M28013_IG25
mov rdi, 0xD1FFAB1E
; byrRegs +[rdi]
mov rsi, bword ptr [rbp-0x80]
@@ -1043,7 +1044,7 @@ G_M28013_IG10: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs
add edi, 22
mov dword ptr [rbp+0x98], edi
;; size=145 bbWeight=97.59 PerfScore 3635.32
-G_M28013_IG11: ; bbWeight=97.59, gcVars=0080000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG11: ; bbWeight=97.59, gcVars=0100000000000000 {V06}, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, gcvars, byref, isz
; byrRegs -[rsi]
; GC ptr vars -{V73}
mov dword ptr [rbp-0x40], r15d
@@ -1069,7 +1070,7 @@ G_M28013_IG14: ; bbWeight=12491.83, gcrefRegs=2008 {rbx r13}, byrefRegs=0
mov edi, dword ptr [rbp+0x98]
mov ecx, dword ptr [rbp+0xA8]
cmp edi, ecx
- ja G_M28013_IG33
+ ja G_M28013_IG27
mov rdx, bword ptr [rbp+0xA0]
; byrRegs +[rdx]
mov esi, edi
@@ -1156,89 +1157,44 @@ G_M28013_IG17: ; bbWeight=2.41, gcrefRegs=2008 {rbx r13}, byrefRegs=0000
jg G_M28013_IG03
;; size=28 bbWeight=2.41 PerfScore 13.84
G_M28013_IG18: ; bbWeight=0.04, gcrefRegs=2008 {rbx r13}, byrefRegs=0000 {}, byref, isz
- mov r12, gword ptr [rbp+0xD8]
- ; gcrRegs +[r12]
- test r12, r12
- je G_M28013_IG24
- mov r15d, dword ptr [rbp+0xD4]
- test r15d, r15d
- jl SHORT G_M28013_IG22
- ;; size=28 bbWeight=0.04 PerfScore 0.17
-G_M28013_IG19: ; bbWeight=0.08, gcVars=0000000000000000 {}, gcrefRegs=3008 {rbx r12 r13}, byrefRegs=0000 {}, gcvars, byref
- ; GC ptr vars -{V06}
- inc r15d
- cmp dword ptr [r12+0x08], r15d
- jle G_M28013_IG37
- ;; size=14 bbWeight=0.08 PerfScore 0.32
-G_M28013_IG20: ; bbWeight=0.04, gcrefRegs=3008 {rbx r12 r13}, byrefRegs=0000 {}, byref, isz
- mov edi, r15d
- mov edi, dword ptr [r12+4*rdi+0x10]
- mov r14d, edi
+ mov r12d, dword ptr [rbp+0xD4]
+ inc r12d
...
-68 (-2.23%) : 549430.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
@@ -11,11 +11,11 @@
;
; V00 this [V00,T04] ( 24, 12.59) ref -> r15 this class-hnd single-def <System.Text.StringBuilder>
; V01 arg1 [V01,T11] ( 12, 5.05) ref -> r14 class-hnd single-def <System.IFormatProvider>
-; V02 arg2 [V02,T01] ( 20, 16.86) ref -> rbx class-hnd single-def <System.String>
+; V02 arg2 [V02,T01] ( 18, 16.86) ref -> rbx class-hnd single-def <System.String>
;* V03 arg3 [V03 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def <System.ReadOnlySpan`1[System.Object]>
; V04 loc0 [V04,T49] ( 5, 2.51) ref -> [rbp-0x90] class-hnd spill-single-def <System.ICustomFormatter>
-; V05 loc1 [V05,T00] ( 72, 40.88) int -> [rbp-0x2C] ld-addr-op
-; V06 loc2 [V06,T02] ( 34, 16.53) ushort -> [rbp-0x30]
+; V05 loc1 [V05,T00] ( 62, 40.88) int -> [rbp-0x2C] ld-addr-op
+; V06 loc2 [V06,T02] ( 30, 16.53) ushort -> [rbp-0x30]
; V07 loc3 [V07,T19] ( 12, 4.54) int -> [rbp-0x34]
; V08 loc4 [V08,T28] ( 5, 3.58) ubyte -> [rbp-0x38]
;* V09 loc5 [V09 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op <System.ReadOnlySpan`1[ushort]>
@@ -182,7 +182,7 @@
; V170 cse5 [V170,T66] ( 3, 1.54) ref -> rdi "CSE - conservative"
; V171 cse6 [V171,T75] ( 3, 1.04) ref -> [rbp-0x100] spill-single-def "CSE - conservative"
; V172 cse7 [V172,T79] ( 3, 0.74) long -> rdi "CSE - conservative"
-; V173 cse8 [V173,T03] ( 20, 15.86) int -> [rbp-0x88] spill-single-def "CSE - aggressive"
+; V173 cse8 [V173,T03] ( 18, 15.86) int -> [rbp-0x88] spill-single-def "CSE - aggressive"
; V174 rat0 [V174,T10] ( 5, 7.18) ref -> rax class-hnd "replacement local" <System.ICustomFormatter>
;
; Lcl frame size = 232
@@ -245,7 +245,7 @@ G_M4730_IG07: ; bbWeight=2.44, gcVars=00000000000000000002000000000000 {V
mov edx, dword ptr [rbx+0x08]
mov dword ptr [rbp-0x88], edx
cmp edx, ecx
- jbe G_M4730_IG100
+ jbe G_M4730_IG91
;; size=17 bbWeight=2.44 PerfScore 10.37
G_M4730_IG08: ; bbWeight=1.44, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref
mov edi, ecx
@@ -299,11 +299,11 @@ G_M4730_IG08: ; bbWeight=1.44, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=20
; gcr arg pop 0
mov dword ptr [rbp-0x50], eax
test eax, eax
- jl G_M4730_IG134
+ jl G_M4730_IG125
;; size=164 bbWeight=1.44 PerfScore 57.69
G_M4730_IG09: ; bbWeight=1.44, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
cmp eax, dword ptr [rbp-0x7C]
- ja G_M4730_IG147
+ ja G_M4730_IG138
mov ecx, eax
not ecx
shr ecx, 31
@@ -381,12 +381,12 @@ G_M4730_IG16: ; bbWeight=1.44, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=20
add ecx, eax
mov edx, dword ptr [rbp-0x88]
cmp ecx, edx
- jae G_M4730_IG137
+ jae G_M4730_IG128
mov edi, ecx
movzx rdi, word ptr [rbx+2*rdi+0x0C]
inc ecx
cmp edx, ecx
- jbe G_M4730_IG142
+ jbe G_M4730_IG133
mov eax, ecx
movzx rax, word ptr [rbx+2*rax+0x0C]
mov dword ptr [rbp-0x30], eax
@@ -414,7 +414,7 @@ G_M4730_IG21: ; bbWeight=1.41, gcVars=00000000000000000002000000000000 {V
; gcrRegs -[rsi]
; GC ptr vars +{V04}
cmp edi, 123
- jne G_M4730_IG140
+ jne G_M4730_IG131
xor esi, esi
mov dword ptr [rbp-0x34], esi
xor r8d, r8d
@@ -427,7 +427,7 @@ G_M4730_IG21: ; bbWeight=1.41, gcVars=00000000000000000002000000000000 {V
mov dword ptr [rbp-0x78], r10d
lea edi, [rcx-0x01]
cmp edi, edx
- jae G_M4730_IG137
+ jae G_M4730_IG128
mov dword ptr [rbp-0x2C], ecx
lea edi, [rcx-0x01]
cmp word ptr [rbx+2*rdi+0x0C], 123
@@ -445,7 +445,7 @@ G_M4730_IG21: ; bbWeight=1.41, gcVars=00000000000000000002000000000000 {V
lea ecx, [rax-0x30]
mov dword ptr [rbp-0x3C], ecx
cmp ecx, 10
- jae G_M4730_IG141
+ jae G_M4730_IG132
;; size=109 bbWeight=1.41 PerfScore 37.78
G_M4730_IG22: ; bbWeight=1.41, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
mov edx, dword ptr [rbp-0x2C]
@@ -466,7 +466,7 @@ G_M4730_IG24: ; bbWeight=0.71, gcVars=00000000000000000000000000000000 {}
; byrRegs -[r13]
; GC ptr vars -{V04 V113}
mov ecx, edx
- jmp G_M4730_IG142
+ jmp G_M4730_IG133
;; size=7 bbWeight=0.71 PerfScore 1.59
G_M4730_IG25: ; bbWeight=0.21, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref
; gcrRegs +[rbx r14-r15]
@@ -496,7 +496,7 @@ G_M4730_IG26: ; bbWeight=0.25, gcVars=00000000000000000002000000000000 {V
add rax, rdi
mov r10d, esi
cmp rax, r10
- ja G_M4730_IG144
+ ja G_M4730_IG135
mov edx, dword ptr [rbp-0x2C]
jmp SHORT G_M4730_IG29
;; size=39 bbWeight=0.25 PerfScore 1.97
@@ -548,7 +548,7 @@ G_M4730_IG30: ; bbWeight=1.41, gcVars=00000000000000000003000000000000 {V
; byrRegs -[rax]
; GC ptr vars -{V77}
cmp edx, esi
- jae G_M4730_IG137
+ jae G_M4730_IG128
mov dword ptr [rbp-0x2C], edx
mov edi, edx
cmp word ptr [rbx+2*rdi+0x0C], 125
@@ -567,7 +567,7 @@ G_M4730_IG30: ; bbWeight=1.41, gcVars=00000000000000000003000000000000 {V
; GC ptr vars +{V12}
mov r8d, dword ptr [rbp-0x3C]
cmp r8d, r12d
- jae G_M4730_IG145
+ jae G_M4730_IG136
mov rdx, gword ptr [rbp-0xA0]
mov esi, r8d
mov r9, gword ptr [r13+8*rsi]
@@ -575,7 +575,7 @@ G_M4730_IG30: ; bbWeight=1.41, gcVars=00000000000000000003000000000000 {V
mov gword ptr [rbp-0xA8], r9
; GC ptr vars +{V13}
cmp gword ptr [rbp-0x90], 0
- je G_M4730_IG83
+ je G_M4730_IG74
;; size=101 bbWeight=1.41 PerfScore 32.48
G_M4730_IG31: ; bbWeight=0.05, gcVars=00000000000000000003000000001000 {V04 V13 V113}, gcrefRegs=C20C {rdx rbx r9 r14 r15}, byrefRegs=2000 {r13}, gcvars, byref
; gcrRegs -[rcx]
@@ -592,7 +592,7 @@ G_M4730_IG32: ; bbWeight=0.00, gcVars=00000000000000000002000000400000 {V
movzx rsi, word ptr [r8]
mov word ptr [rdi], si
cmp eax, 2
- je G_M4730_IG138
+ je G_M4730_IG129
jmp G_M4730_IG28
;; size=28 bbWeight=0.00 PerfScore 0.00
G_M4730_IG33: ; bbWeight=0.03, gcVars=00000000000000000002000000000000 {V04}, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, gcvars, byref
@@ -630,7 +630,7 @@ G_M4730_IG34: ; bbWeight=0.01, gcVars=00000000000000000003000000001000 {V
; gcr arg pop 0
mov rsi, rax
; gcrRegs +[rsi]
- jmp G_M4730_IG82
+ jmp G_M4730_IG73
;; size=43 bbWeight=0.01 PerfScore 0.06
G_M4730_IG35: ; bbWeight=0.48, gcVars=00000000000000000003000000000000 {V04 V113}, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, gcvars, byref, isz
; gcrRegs -[rax rsi]
@@ -653,14 +653,16 @@ G_M4730_IG37: ; bbWeight=0.02, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=20
jbe SHORT G_M4730_IG38
mov eax, edx
movzx rax, word ptr [rbx+2*rax+0x0C]
+ mov edi, eax
+ mov eax, edi
jmp SHORT G_M4730_IG35
- ;; size=25 bbWeight=0.02 PerfScore 0.16
+ ;; size=29 bbWeight=0.02 PerfScore 0.17
G_M4730_IG38: ; bbWeight=0.01, gcVars=00000000000000000000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
; gcrRegs -[rbx r14-r15]
; byrRegs -[r13]
; GC ptr vars -{V04 V113}
mov ecx, edx
- jmp G_M4730_IG142
+ jmp G_M4730_IG133
;; size=7 bbWeight=0.01 PerfScore 0.02
G_M4730_IG39: ; bbWeight=0.01, gcVars=00000000000000000003000000000000 {V04 V113}, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, gcvars, byref, isz
; gcrRegs +[rbx r14-r15]
@@ -673,248 +675,184 @@ G_M4730_IG40: ; bbWeight=0.05, gcVars=00000000000000000003000000001000 {V
; gcrRegs +[rdx r9]
; GC ptr vars -{V48} +{V12 V13}
cmp dword ptr [rbp-0x78], 0
- je G_M4730_IG80
+ je G_M4730_IG71
;; size=10 bbWeight=0.05 PerfScore 0.15
G_M4730_IG41: ; bbWeight=0.03, gcrefRegs=C208 {rbx r9 r14 r15}, byrefRegs=2000 {r13}, byref
; gcrRegs -[rdx]
mov r8d, dword ptr [rbp-0x78]
- jmp G_M4730_IG79
+ jmp G_M4730_IG70
;; size=9 bbWeight=0.03 PerfScore 0.08
-G_M4730_IG42: ; bbWeight=0.00, gcVars=00000000000000000003000000000000 {V04 V113}, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, gcvars, byref
+G_M4730_IG42: ; bbWeight=0.00, gcVars=00000000000000000003000000000000 {V04 V113}, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, gcvars, byref, isz
; gcrRegs -[r9]
; GC ptr vars -{V12 V13}
cmp eax, 32
- je G_M4730_IG68
- ;; size=9 bbWeight=0.00 PerfScore 0.00
-G_M4730_IG43: ; bbWeight=0.46, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref
- cmp eax, 44
- jne G_M4730_IG58
- ;; size=9 bbWeight=0.46 PerfScore 0.57
-G_M4730_IG44: ; bbWeight=0.45, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
+ mov edi, eax
+ jne SHORT G_M4730_IG45
+ ;; size=7 bbWeight=0.00 PerfScore 0.00
+G_M4730_IG43: ; bbWeight=0.05, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref
inc edx
cmp esi, edx
- jbe G_M4730_IG55
+ jbe G_M4730_IG58
+ ;; size=10 bbWeight=0.05 PerfScore 0.08
+G_M4730_IG44: ; bbWeight=0.51, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
mov eax, edx
movzx rax, word ptr [rbx+2*rax+0x0C]
- cmp eax, 32
- je SHORT G_M4730_IG44
+ mov edi, eax
+ cmp edi, 32
+ je SHORT G_M4730_IG43
+ ;; size=14 bbWeight=0.51 PerfScore 1.92
+G_M4730_IG45: ; bbWeight=0.46, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref
+ cmp edi, 44
+ jne G_M4730_IG63
+ ;; size=9 bbWeight=0.46 PerfScore 0.57
+G_M4730_IG46: ; bbWeight=0.45, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
+ inc edx
+ cmp esi, edx
+ jbe G_M4730_IG57
+ mov edi, edx
+ movzx rdi, word ptr [rbx+2*rdi+0x0C]
+ cmp edi, 32
+ je SHORT G_M4730_IG46
;; size=22 bbWeight=0.45 PerfScore 2.27
-G_M4730_IG45: ; bbWeight=0.37, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
- cmp eax, 45
- jne SHORT G_M4730_IG47
+G_M4730_IG47: ; bbWeight=0.37, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
+ cmp edi, 45
+ jne SHORT G_M4730_IG49
;; size=5 bbWeight=0.37 PerfScore 0.46
-G_M4730_IG46: ; bbWeight=0.14, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
- mov dword ptr [rbp-0x38], 1
+G_M4730_IG48: ; bbWeight=0.14, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
+ mov eax, 1
+ inc edx
+ cmp esi, edx
+ jbe SHORT G_M4730_IG56
+ mov edi, edx
+ movzx rdi, word ptr [rbx+2*rdi+0x0C]
+ mov dword ptr [rbp-0x38], eax
+ ;; size=21 bbWeight=0.14 PerfScore 0.68
+G_M4730_IG49: ; bbWeight=0.37, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=2000 {r13}, byref, isz
+ add edi, -48
+ mov r8d, edi
+ cmp r8d, 10
+ jae SHORT G_M4730_IG55
...
librariestestsnotieredcompilation.run.linux.x64.Release.mch
+0 (0.00%) : 131430.dasm - System.IO.Tests.UmaReadWriteStructArray:UmaReadWriteStructArrayMultiples() (FullOpts)
@@ -8,54 +8,54 @@
; 14 inlinees with PGO data; 44 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 loc0 [V00,T33] ( 3, 5.96) ref -> rbx class-hnd exact single-def <<unknown class>>
-; V01 loc1 [V01,T25] ( 4, 10.01) ref -> r15 class-hnd exact single-def <<unknown class>>
+; V00 loc0 [V00,T32] ( 3, 5.96) ref -> rbx class-hnd exact single-def <<unknown class>>
+; V01 loc1 [V01,T13] ( 7, 21.83) ref -> r15 class-hnd exact single-def <<unknown class>>
; V02 loc2 [V02,T08] ( 7, 24.76) int -> rdi
;* V03 loc3 [V03 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SF] ld-addr-op <System.IO.Tests.Uma_TestStructs+UmaTestStruct>
-; V04 loc4 [V04,T39] ( 3, 1 ) ref -> [rbp-0x58] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
-; V05 loc5 [V05,T38] ( 5, 2 ) ref -> [rbp-0x60] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
-; V06 loc6 [V06,T07] ( 8, 29.03) int -> rbx
+; V04 loc4 [V04,T38] ( 3, 1 ) ref -> [rbp-0x58] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
+; V05 loc5 [V05,T37] ( 5, 2 ) ref -> [rbp-0x60] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
+; V06 loc6 [V06,T07] ( 8, 28.75) int -> rbx
;# V07 OutArgs [V07 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V08 tmp1 [V08,T31] ( 4, 8 ) ref -> r14 class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
-; V09 tmp2 [V09,T26] ( 5, 10.01) ref -> r13 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
-; V10 tmp3 [V10,T34] ( 2, 4.01) int -> rbx "Inlining Arg"
-; V11 tmp4 [V11,T32] ( 3, 6.01) ref -> r13 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V08 tmp1 [V08,T28] ( 4, 8 ) ref -> r14 class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
+; V09 tmp2 [V09,T23] ( 5, 10.01) ref -> r13 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
+; V10 tmp3 [V10,T33] ( 2, 4.01) int -> rbx "Inlining Arg"
+; V11 tmp4 [V11,T31] ( 3, 6.01) ref -> r13 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V12 tmp5 [V12 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V13 tmp6 [V13,T37] ( 3, 3.00) ref -> [rbp-0x68] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V14 tmp7 [V14,T27] ( 4, 8.01) ref -> [rbp-0x70] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V15 tmp8 [V15,T28] ( 4, 8.01) ref -> [rbp-0x78] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V16 tmp9 [V16,T13] ( 2, 16.02) int -> [rbp-0x2C] spill-single-def "Inlining Arg"
-; V17 tmp10 [V17,T09] ( 3, 24.04) ref -> [rbp-0x80] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V13 tmp6 [V13,T36] ( 3, 3.00) ref -> [rbp-0x68] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V14 tmp7 [V14,T26] ( 4, 8.01) ref -> [rbp-0x70] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V15 tmp8 [V15,T27] ( 4, 8.01) ref -> [rbp-0x78] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V16 tmp9 [V16,T14] ( 2, 15.86) int -> [rbp-0x2C] spill-single-def "Inlining Arg"
+; V17 tmp10 [V17,T10] ( 3, 23.80) ref -> [rbp-0x80] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V18 tmp11 [V18 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V19 tmp12 [V19,T18] ( 3, 12.02) ref -> [rbp-0x88] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V20 tmp13 [V20,T01] ( 4, 32.05) ref -> [rbp-0x90] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V21 tmp14 [V21,T02] ( 4, 32.05) ref -> [rbp-0x98] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V19 tmp12 [V19,T19] ( 3, 11.90) ref -> [rbp-0x88] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V20 tmp13 [V20,T01] ( 4, 31.73) ref -> [rbp-0x90] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V21 tmp14 [V21,T02] ( 4, 31.73) ref -> [rbp-0x98] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
;* V22 tmp15 [V22 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
-; V23 tmp16 [V23,T14] ( 2, 16.02) int -> [rbp-0x30] spill-single-def "Inlining Arg"
-; V24 tmp17 [V24,T10] ( 3, 24.04) ref -> [rbp-0xA0] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V23 tmp16 [V23,T15] ( 2, 15.86) int -> [rbp-0x30] spill-single-def "Inlining Arg"
+; V24 tmp17 [V24,T11] ( 3, 23.80) ref -> [rbp-0xA0] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V25 tmp18 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V26 tmp19 [V26,T19] ( 3, 12.02) ref -> [rbp-0xA8] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V27 tmp20 [V27,T03] ( 4, 32.05) ref -> [rbp-0xB0] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V28 tmp21 [V28,T04] ( 4, 32.05) ref -> [rbp-0xB8] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V26 tmp19 [V26,T20] ( 3, 11.90) ref -> [rbp-0xA8] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V27 tmp20 [V27,T03] ( 4, 31.73) ref -> [rbp-0xB0] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V28 tmp21 [V28,T04] ( 4, 31.73) ref -> [rbp-0xB8] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
;* V29 tmp22 [V29 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V30 tmp23 [V30 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V31 tmp24 [V31 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
;* V32 tmp25 [V32 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V33 tmp26 [V33,T15] ( 2, 16.02) ushort -> [rbp-0x34] spill-single-def "Inlining Arg"
-; V34 tmp27 [V34,T11] ( 3, 24.04) ref -> [rbp-0xC0] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
+; V33 tmp26 [V33,T16] ( 2, 15.86) ushort -> [rbp-0x34] spill-single-def "Inlining Arg"
+; V34 tmp27 [V34,T12] ( 3, 23.80) ref -> [rbp-0xC0] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
;* V35 tmp28 [V35 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V36 tmp29 [V36,T20] ( 3, 12.02) ref -> [rbp-0xC8] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V37 tmp30 [V37,T05] ( 4, 32.05) ref -> [rbp-0xD0] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V38 tmp31 [V38,T06] ( 4, 32.05) ref -> [rbp-0xD8] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V36 tmp29 [V36,T21] ( 3, 11.90) ref -> [rbp-0xC8] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
+; V37 tmp30 [V37,T05] ( 4, 31.73) ref -> [rbp-0xD0] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V38 tmp31 [V38,T06] ( 4, 31.73) ref -> [rbp-0xD8] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
;* V39 tmp32 [V39 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V40 tmp33 [V40 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V41 tmp34 [V41 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
-;* V42 tmp35 [V42,T35] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
-; V43 tmp36 [V43,T29] ( 3, 8.01) ubyte -> rax "field V30.value (fldOffset=0x1)" P-INDEP
+;* V42 tmp35 [V42,T34] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
+; V43 tmp36 [V43,T29] ( 3, 7.93) ubyte -> rax "field V30.value (fldOffset=0x1)" P-INDEP
;* V44 tmp37 [V44 ] ( 0, 0 ) ubyte -> zero-ref "field V31.hasValue (fldOffset=0x0)" P-INDEP
;* V45 tmp38 [V45 ] ( 0, 0 ) ubyte -> zero-ref "field V31.value (fldOffset=0x1)" P-INDEP
-;* V46 tmp39 [V46,T36] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
-; V47 tmp40 [V47,T30] ( 2, 8.01) ubyte -> rdi "field V40.value (fldOffset=0x1)" P-INDEP
+;* V46 tmp39 [V46,T35] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
+; V47 tmp40 [V47,T30] ( 3, 7.93) ubyte -> r13 "field V40.value (fldOffset=0x1)" P-INDEP
;* V48 tmp41 [V48 ] ( 0, 0 ) ubyte -> zero-ref "field V41.hasValue (fldOffset=0x0)" P-INDEP
;* V49 tmp42 [V49 ] ( 0, 0 ) ubyte -> zero-ref "field V41.value (fldOffset=0x1)" P-INDEP
;* V50 tmp43 [V50 ] ( 0, 0 ) int -> zero-ref "V03.[000..004)"
@@ -64,15 +64,14 @@
;* V53 tmp46 [V53 ] ( 0, 0 ) ushort -> zero-ref "V03.[012..014)"
;* V54 tmp47 [V54 ] ( 0, 0 ) ubyte -> zero-ref "V03.[014..015)"
; V55 tmp48 [V55,T00] ( 6, 47.52) byref -> rax "Spilling address for field-by-field copy"
-; V56 tmp49 [V56,T41] ( 6, 0 ) struct ( 8) [rbp-0x40] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
-; V57 PSPSym [V57,T40] ( 1, 1 ) long -> [rbp-0xE0] do-not-enreg[V] "PSPSym"
-; V58 cse0 [V58,T12] ( 5, 20.03) byref -> r13 "CSE - moderate"
-; V59 cse1 [V59,T21] ( 3, 12.02) long -> r13 "CSE - moderate"
-; V60 cse2 [V60,T16] ( 5, 14.02) long -> [rbp-0x48] spill-single-def "CSE - moderate"
-; V61 cse3 [V61,T17] ( 5, 14.02) long -> [rbp-0x50] spill-single-def "CSE - moderate"
-; V62 cse4 [V62,T23] ( 4, 10.02) long -> r14 "CSE - moderate"
-; V63 cse5 [V63,T24] ( 4, 10.02) long -> r12 "CSE - moderate"
-; V64 cse6 [V64,T22] ( 3, 11.88) int -> rcx "CSE - moderate"
+; V56 tmp49 [V56,T40] ( 6, 0 ) struct ( 8) [rbp-0x40] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
+; V57 PSPSym [V57,T39] ( 1, 1 ) long -> [rbp-0xE0] do-not-enreg[V] "PSPSym"
+; V58 cse0 [V58,T09] ( 6, 23.80) long -> r13 "CSE - moderate"
+; V59 cse1 [V59,T17] ( 5, 13.90) long -> [rbp-0x48] spill-single-def "CSE - moderate"
+; V60 cse2 [V60,T18] ( 5, 13.90) long -> [rbp-0x50] spill-single-def "CSE - moderate"
+; V61 cse3 [V61,T24] ( 4, 9.94) long -> r14 "CSE - moderate"
+; V62 cse4 [V62,T25] ( 4, 9.94) long -> r12 "CSE - moderate"
+; V63 cse5 [V63,T22] ( 3, 11.88) int -> rcx "CSE - moderate"
;
; Lcl frame size = 184
@@ -136,7 +135,7 @@ G_M53770_IG04: ; bbWeight=1, gcrefRegs=8008 {rbx r15}, byrefRegs=0000 {},
mov gword ptr [rbp-0x58], r14
; GC ptr vars +{V04}
;; size=36 bbWeight=1 PerfScore 6.00
-G_M53770_IG05: ; bbWeight=1, gcVars=0000008000000000 {V04}, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG05: ; bbWeight=1, gcVars=0000004000000000 {V04}, gcrefRegs=C008 {rbx r14 r15}, byrefRegs=0000 {}, gcvars, byref
mov rdi, 0xD1FFAB1E ; System.IO.UnmanagedMemoryAccessor
call CORINFO_HELP_NEWSFAST
; gcrRegs +[rax]
@@ -156,7 +155,7 @@ G_M53770_IG05: ; bbWeight=1, gcVars=0000008000000000 {V04}, gcrefRegs=C00
mov gword ptr [rbp-0x60], r13
; GC ptr vars +{V05}
;; size=47 bbWeight=1 PerfScore 6.75
-G_M53770_IG06: ; bbWeight=1.00, gcVars=000000C000000000 {V04 V05}, gcrefRegs=A008 {rbx r13 r15}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG06: ; bbWeight=1.00, gcVars=0000006000000000 {V04 V05}, gcrefRegs=A008 {rbx r13 r15}, byrefRegs=0000 {}, gcvars, byref
mov rdi, r13
; gcrRegs +[rdi]
mov rdx, rbx
@@ -262,7 +261,7 @@ G_M53770_IG07: ; bbWeight=1.00, extend
; gcr arg pop 0
xor ebx, ebx
;; size=36 bbWeight=1.00 PerfScore 7.51
-G_M53770_IG08: ; bbWeight=4.01, gcrefRegs=8000 {r15}, byrefRegs=0000 {}, byref
+G_M53770_IG08: ; bbWeight=3.97, gcrefRegs=8000 {r15}, byrefRegs=0000 {}, byref
mov r13d, ebx
shl r13, 4
mov eax, dword ptr [r15+r13+0x10]
@@ -344,13 +343,11 @@ G_M53770_IG08: ; bbWeight=4.01, gcrefRegs=8000 {r15}, byrefRegs=0000 {},
call [<unknown method>]
; gcrRegs -[rdx]
; gcr arg pop 0
- lea r13, bword ptr [r15+r13+0x10]
- ; byrRegs +[r13]
- mov eax, dword ptr [r13+0x08]
+ mov eax, dword ptr [r15+r13+0x18]
mov dword ptr [rbp-0x30], eax
- ;; size=212 bbWeight=4.01 PerfScore 167.26
-G_M53770_IG09: ; bbWeight=4.01, extend
mov rdi, r14
+ ;; size=211 bbWeight=3.97 PerfScore 162.61
+G_M53770_IG09: ; bbWeight=3.97, extend
call CORINFO_HELP_NEWSFAST
; gcrRegs +[rax]
; gcr arg pop 0
@@ -427,13 +424,13 @@ G_M53770_IG09: ; bbWeight=4.01, extend
call [<unknown method>]
; gcrRegs -[rdx]
; gcr arg pop 0
- movzx rax, byte ptr [r13+0x04]
+ movzx rax, byte ptr [r15+r13+0x14]
test eax, eax
jne G_M53770_IG13
- movzx rax, word ptr [r13+0x0C]
+ movzx rax, word ptr [r15+r13+0x1C]
mov dword ptr [rbp-0x34], eax
- ;; size=216 bbWeight=4.01 PerfScore 162.25
-G_M53770_IG10: ; bbWeight=4.01, isz, extend
+ ;; size=215 bbWeight=3.97 PerfScore 159.64
+G_M53770_IG10: ; bbWeight=3.97, isz, extend
mov rdi, 0xD1FFAB1E ; Xunit.Sdk.AssertEqualityComparer`1[ushort]
call CORINFO_HELP_NEWSFAST
; gcrRegs +[rax]
@@ -511,20 +508,19 @@ G_M53770_IG10: ; bbWeight=4.01, isz, extend
call [<unknown method>]
; gcrRegs -[rdx]
; gcr arg pop 0
- movzx rdi, byte ptr [r13+0x0E]
- test edi, edi
+ movzx r13, byte ptr [r15+r13+0x1E]
+ test r13d, r13d
je SHORT G_M53770_IG14
- ;; size=218 bbWeight=4.01 PerfScore 149.23
-G_M53770_IG11: ; bbWeight=4, gcrefRegs=8000 {r15}, byrefRegs=0000 {}, byref
- ; byrRegs -[r13]
+ ;; size=220 bbWeight=3.97 PerfScore 147.74
+G_M53770_IG11: ; bbWeight=3.96, gcrefRegs=8000 {r15}, byrefRegs=0000 {}, byref
inc ebx
cmp ebx, 12
jl G_M53770_IG08
- ;; size=11 bbWeight=4 PerfScore 6.00
-G_M53770_IG12: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
+ ;; size=11 bbWeight=3.96 PerfScore 5.94
+G_M53770_IG12: ; bbWeight=1.00, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r15]
jmp SHORT G_M53770_IG15
- ;; size=2 bbWeight=0.50 PerfScore 1.00
+ ;; size=2 bbWeight=1.00 PerfScore 2.00
G_M53770_IG13: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov byte ptr [rbp-0x40], 1
mov byte ptr [rbp-0x3F], al
@@ -542,7 +538,7 @@ G_M53770_IG13: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
;; size=27 bbWeight=0 PerfScore 0.00
G_M53770_IG14: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov byte ptr [rbp-0x40], 1
- mov byte ptr [rbp-0x3F], 0
+ mov byte ptr [rbp-0x3F], r13b
movzx rsi, word ptr [rbp-0x40]
xor rdi, rdi
; gcrRegs +[rdi]
@@ -585,8 +581,8 @@ G_M53770_IG17: ; bbWeight=1, epilog, nogc, extend
pop rbp
ret
;; size=18 bbWeight=1 PerfScore 4.25
-G_M53770_IG18: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
- ; GC ptr vars +{V04 V05 V38}
+G_M53770_IG18: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
+ ; GC ptr vars +{V04 V05 V37 V38}
push rbp
push r15
push r14
@@ -598,11 +594,11 @@ G_M53770_IG18: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs
mov qword ptr [rsp], rbp
lea rbp, [rbp+0xE0]
;; size=25 bbWeight=0 PerfScore 0.00
-G_M53770_IG19: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG19: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
mov rdi, gword ptr [rbp-0x60]
; gcrRegs +[rdi]
mov byte ptr [rdi+0x24], 0
- ; GC ptr vars -{V05 V38}
+ ; GC ptr vars -{V05 V37 V38}
call <unknown method>
; gcrRegs -[rdi]
; gcr arg pop 0
@@ -630,7 +626,7 @@ G_M53770_IG21: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov qword ptr [rsp], rbp
lea rbp, [rbp+0xE0]
;; size=25 bbWeight=0 PerfScore 0.00
-G_M53770_IG22: ; bbWeight=0, gcVars=0000008000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG22: ; bbWeight=0, gcVars=0000004000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
mov rdi, gword ptr [rbp-0x58]
; gcrRegs +[rdi]
; GC ptr vars -{V04}
@@ -650,7 +646,7 @@ G_M53770_IG23: ; bbWeight=0, funclet epilog, nogc, extend
ret
;; size=15 bbWeight=0 PerfScore 0.00
-; Total bytes of code 1315, prolog size 32, PerfScore 597.71, instruction count 310, allocated bytes for code 1315 (MethodHash=942a2df5) for method System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
+; Total bytes of code 1315, prolog size 32, PerfScore 589.90, instruction count 309, allocated bytes for code 1315 (MethodHash=942a2df5) for method System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
; ============================================================
...
Details
Improvements/regressions per collection
| Collection |
Contexts with diffs |
Improvements |
Regressions |
Same size |
Improvements (bytes) |
Regressions (bytes) |
| benchmarks.run.linux.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_pgo.linux.x64.checked.mch |
7 |
5 |
2 |
0 |
-1,242 |
+706 |
| benchmarks.run_tiered.linux.x64.checked.mch |
3 |
3 |
0 |
0 |
-679 |
+0 |
| coreclr_tests.run.linux.x64.checked.mch |
6 |
4 |
2 |
0 |
-874 |
+384 |
| libraries.crossgen2.linux.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries.pmi.linux.x64.checked.mch |
2 |
1 |
1 |
0 |
-15 |
+306 |
| libraries_tests.run.linux.x64.Release.mch |
2 |
2 |
0 |
0 |
-192 |
+0 |
| librariestestsnotieredcompilation.run.linux.x64.Release.mch |
1 |
0 |
0 |
1 |
-0 |
+0 |
| realworld.run.linux.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| smoke_tests.nativeaot.linux.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
|
21 |
15 |
5 |
1 |
-3,002 |
+1,396 |
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| benchmarks.run.linux.x64.checked.mch |
34,975 |
3,135 |
31,840 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_pgo.linux.x64.checked.mch |
156,567 |
60,225 |
96,342 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_tiered.linux.x64.checked.mch |
56,298 |
42,308 |
13,990 |
0 (0.00%) |
0 (0.00%) |
| coreclr_tests.run.linux.x64.checked.mch |
598,049 |
355,280 |
242,769 |
0 (0.00%) |
1 (0.00%) |
| libraries.crossgen2.linux.x64.checked.mch |
1,930 |
0 |
1,930 |
0 (0.00%) |
0 (0.00%) |
| libraries.pmi.linux.x64.checked.mch |
296,878 |
6 |
296,872 |
0 (0.00%) |
0 (0.00%) |
| libraries_tests.run.linux.x64.Release.mch |
766,464 |
498,383 |
268,081 |
0 (0.00%) |
0 (0.00%) |
| librariestestsnotieredcompilation.run.linux.x64.Release.mch |
305,396 |
21,912 |
283,484 |
0 (0.00%) |
0 (0.00%) |
| realworld.run.linux.x64.checked.mch |
33,215 |
49 |
33,166 |
0 (0.00%) |
0 (0.00%) |
| smoke_tests.nativeaot.linux.x64.checked.mch |
64 |
0 |
64 |
0 (0.00%) |
0 (0.00%) |
|
2,249,836 |
981,298 |
1,268,538 |
0 (0.00%) |
1 (0.00%) |
jit-analyze output
benchmarks.run_pgo.linux.x64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 69179263 (overridden on cmd)
Total bytes of diff: 69178727 (overridden on cmd)
Total bytes of delta: -536 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file regressions (bytes):
353 : 66409.dasm (31.97 % of base)
353 : 66420.dasm (31.97 % of base)
Top file improvements (bytes):
-473 : 42161.dasm (-34.28 % of base)
-453 : 42176.dasm (-32.20 % of base)
-135 : 75420.dasm (-23.00 % of base)
-135 : 75458.dasm (-23.00 % of base)
-46 : 112776.dasm (-5.82 % of base)
7 total files with Code Size differences (5 improved, 2 regressed), 0 unchanged.
Top method regressions (bytes):
353 (31.97 % of base) : 66409.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
353 (31.97 % of base) : 66420.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
Top method improvements (bytes):
-473 (-34.28 % of base) : 42161.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-453 (-32.20 % of base) : 42176.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-135 (-23.00 % of base) : 75420.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-135 (-23.00 % of base) : 75458.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-46 (-5.82 % of base) : 112776.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method regressions (percentages):
353 (31.97 % of base) : 66409.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
353 (31.97 % of base) : 66420.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
Top method improvements (percentages):
-473 (-34.28 % of base) : 42161.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-453 (-32.20 % of base) : 42176.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-135 (-23.00 % of base) : 75420.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-135 (-23.00 % of base) : 75458.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-46 (-5.82 % of base) : 112776.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
7 total methods with Code Size differences (5 improved, 2 regressed).
benchmarks.run_tiered.linux.x64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 15898771 (overridden on cmd)
Total bytes of diff: 15898092 (overridden on cmd)
Total bytes of delta: -679 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-454 : 22067.dasm (-32.41 % of base)
-177 : 34049.dasm (-17.32 % of base)
-48 : 46384.dasm (-6.66 % of base)
3 total files with Code Size differences (3 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-454 (-32.41 % of base) : 22067.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-177 (-17.32 % of base) : 34049.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-48 (-6.66 % of base) : 46384.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method improvements (percentages):
-454 (-32.41 % of base) : 22067.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-177 (-17.32 % of base) : 34049.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-48 (-6.66 % of base) : 46384.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
3 total methods with Code Size differences (3 improved, 0 regressed).
coreclr_tests.run.linux.x64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 403326592 (overridden on cmd)
Total bytes of diff: 403326102 (overridden on cmd)
Total bytes of delta: -490 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file regressions (bytes):
353 : 449881.dasm (31.97 % of base)
31 : 475934.dasm (2.67 % of base)
Top file improvements (bytes):
-473 : 451368.dasm (-34.20 % of base)
-135 : 438635.dasm (-23.00 % of base)
-135 : 438648.dasm (-23.00 % of base)
-131 : 493124.dasm (-32.51 % of base)
6 total files with Code Size differences (4 improved, 2 regressed), 0 unchanged.
Top method regressions (bytes):
353 (31.97 % of base) : 449881.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
31 (2.67 % of base) : 475934.dasm - JitTest_lcsmixed_lcs_cs.LCS:TestEntryPoint():int (Tier1-OSR)
Top method improvements (bytes):
-473 (-34.20 % of base) : 451368.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-135 (-23.00 % of base) : 438635.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-135 (-23.00 % of base) : 438648.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-131 (-32.51 % of base) : 493124.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
Top method regressions (percentages):
353 (31.97 % of base) : 449881.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
31 (2.67 % of base) : 475934.dasm - JitTest_lcsmixed_lcs_cs.LCS:TestEntryPoint():int (Tier1-OSR)
Top method improvements (percentages):
-473 (-34.20 % of base) : 451368.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-131 (-32.51 % of base) : 493124.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
-135 (-23.00 % of base) : 438635.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-135 (-23.00 % of base) : 438648.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
6 total methods with Code Size differences (4 improved, 2 regressed).
libraries.pmi.linux.x64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 60406292 (overridden on cmd)
Total bytes of diff: 60406583 (overridden on cmd)
Total bytes of delta: 291 (0.00 % of base)
diff is a regression.
relative diff is a regression.
Detail diffs
Top file regressions (bytes):
306 : 108009.dasm (53.40 % of base)
Top file improvements (bytes):
-15 : 104608.dasm (-17.44 % of base)
2 total files with Code Size differences (1 improved, 1 regressed), 0 unchanged.
Top method regressions (bytes):
306 (53.40 % of base) : 108009.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
Top method improvements (bytes):
-15 (-17.44 % of base) : 104608.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
Top method regressions (percentages):
306 (53.40 % of base) : 108009.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
Top method improvements (percentages):
-15 (-17.44 % of base) : 104608.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
2 total methods with Code Size differences (1 improved, 1 regressed).
libraries_tests.run.linux.x64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 348614608 (overridden on cmd)
Total bytes of diff: 348614416 (overridden on cmd)
Total bytes of delta: -192 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-124 : 322107.dasm (-6.37 % of base)
-68 : 549430.dasm (-2.23 % of base)
2 total files with Code Size differences (2 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-124 (-6.37 % of base) : 322107.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-68 (-2.23 % of base) : 549430.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
Top method improvements (percentages):
-124 (-6.37 % of base) : 322107.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-68 (-2.23 % of base) : 549430.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
2 total methods with Code Size differences (2 improved, 0 regressed).
librariestestsnotieredcompilation.run.linux.x64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 132684821 (overridden on cmd)
Total bytes of diff: 132684821 (overridden on cmd)
Total bytes of delta: 0 (0.00 % of base)
Detail diffs
0 total files with Code Size differences (0 improved, 0 regressed), 1 unchanged.
0 total methods with Code Size differences (0 improved, 0 regressed).
osx arm64
Diffs are based on 2,029,494 contexts (927,368 MinOpts, 1,102,126 FullOpts).
MISSED contexts: base: 0 (0.00%), diff: 1 (0.00%)
Overall (-2,852 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.osx.arm64.checked.mch |
34,557,412 |
-1,376 |
| benchmarks.run_tiered.osx.arm64.checked.mch |
15,509,064 |
-648 |
| coreclr_tests.run.osx.arm64.checked.mch |
483,595,744 |
-944 |
| libraries.pmi.osx.arm64.checked.mch |
80,212,804 |
+252 |
| libraries_tests.run.osx.arm64.Release.mch |
314,052,980 |
-148 |
| librariestestsnotieredcompilation.run.osx.arm64.Release.mch |
163,157,008 |
+12 |
FullOpts (-2,852 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.osx.arm64.checked.mch |
18,184,064 |
-1,376 |
| benchmarks.run_tiered.osx.arm64.checked.mch |
4,004,792 |
-648 |
| coreclr_tests.run.osx.arm64.checked.mch |
153,422,976 |
-944 |
| libraries.pmi.osx.arm64.checked.mch |
80,091,676 |
+252 |
| libraries_tests.run.osx.arm64.Release.mch |
112,315,392 |
-148 |
| librariestestsnotieredcompilation.run.osx.arm64.Release.mch |
150,003,316 |
+12 |
Example diffs
benchmarks.run_pgo.osx.arm64.checked.mch
-476 (-33.06%) : 83057.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,134 +10,132 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T15] ( 11, 3.92) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T19] ( 7, 2.13) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T15] ( 7, 3.92) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T19] ( 4, 2.25) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T03] ( 6,102.67) int -> x21
-; V03 loc1 [V03,T13] ( 19, 25.96) int -> x23
-; V04 loc2 [V04,T39] ( 7, 0.00) int -> x24
-; V05 loc3 [V05,T11] ( 30, 28.66) int -> x22
-; V06 loc4 [V06,T24] ( 22, 1.37) int -> x4
-; V07 loc5 [V07,T42] ( 8, 13.06) double -> d8
-; V08 loc6 [V08,T09] ( 22, 50.25) int -> x5
-; V09 loc7 [V09,T41] ( 9, 25.38) double -> d9
-; V10 loc8 [V10,T30] ( 4, 0.25) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T43] ( 5, 12.37) double -> d10
-; V12 loc10 [V12,T10] ( 19, 49.62) int -> x5
-; V13 loc11 [V13,T18] ( 9, 4.50) int -> x3
+; V03 loc1 [V03,T13] ( 13, 25.96) int -> x23
+; V04 loc2 [V04,T34] ( 2, 0.00) int -> x24
+; V05 loc3 [V05,T11] ( 18, 28.78) int -> x22
+; V06 loc4 [V06,T24] ( 12, 1.37) int -> x4
+; V07 loc5 [V07,T37] ( 5, 13.06) double -> d16
+; V08 loc6 [V08,T09] ( 14, 50.13) int -> x14
+; V09 loc7 [V09,T36] ( 6, 25.38) double -> d17
+; V10 loc8 [V10,T29] ( 2, 0.25) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T38] ( 3, 12.37) double -> d16
+; V12 loc10 [V12,T10] ( 12, 49.50) int -> x0
+; V13 loc11 [V13,T18] ( 7, 4.50) int -> x3
; V14 loc12 [V14,T16] ( 8, 5.39) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T17] ( 6, 4.57) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T40] ( 3,100 ) double -> d16
+; V16 loc14 [V16,T35] ( 3,100 ) double -> d16
; V17 loc15 [V17,T01] ( 13,401.07) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T07] ( 9, 73.50) byref -> x7 "dup spill"
-; V20 tmp2 [V20,T27] ( 4, 0.50) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V21 tmp3 [V21,T00] ( 6,594.60) byref -> x2 "dup spill"
+; V19 tmp1 [V19,T07] ( 6, 73.50) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 0.50) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V21 tmp3 [V21,T00] ( 6,594.60) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T38] ( 6, 0.00) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T06] ( 9, 73.89) ref -> x6 "arr expr"
-; V25 tmp7 [V25,T25] ( 6, 0.75) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T26] ( 6, 0.75) ref -> x4 "arr expr"
-; V27 tmp9 [V27,T08] ( 9, 73.50) ref -> x6 "arr expr"
+; V23 tmp5 [V23,T33] ( 3, 0.00) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T06] ( 6, 73.89) ref -> x15 "arr expr"
+; V25 tmp7 [V25,T25] ( 3, 0.75) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T26] ( 3, 0.75) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T08] ( 6, 73.50) ref -> x1 "arr expr"
; V28 cse0 [V28,T28] ( 3, 0.37) ref -> x15 "CSE - conservative"
-; V29 cse1 [V29,T34] ( 3, 0.00) ref -> x15 "CSE - conservative"
-; V30 cse2 [V30,T36] ( 3, 0.00) ref -> x2 "CSE - conservative"
-; V31 cse3 [V31,T32] ( 3, 0.12) ref -> x2 "CSE - conservative"
-; V32 cse4 [V32,T02] ( 3,294.33) long -> x15 "CSE - aggressive"
-; V33 cse5 [V33,T14] ( 11, 24.81) long -> x28 "CSE - aggressive"
-; V34 cse6 [V34,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
-; V35 cse7 [V35,T23] ( 3, 2.70) long -> x14 "CSE - moderate"
-; V36 cse8 [V36,T29] ( 9, 0.25) long -> x28 "CSE - conservative"
-; V37 cse9 [V37,T04] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T05] ( 4,100.00) byref -> x0 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T12] ( 19, 27.64) byref -> x26 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T20] ( 15, 3.43) int -> x25 multi-def "CSE - moderate"
-; V41 cse13 [V41,T22] ( 4, 2.78) int -> xip0 hoist multi-def "CSE - moderate"
-; V42 cse14 [V42,T31] ( 4, 0.12) int -> [fp+0x14] "CSE - conservative"
-; V43 cse15 [V43,T35] ( 4, 0.00) int -> [fp+0x10] "CSE - conservative"
-; V44 cse16 [V44,T33] ( 3, 0.12) long -> x27 "CSE - conservative"
-; V45 cse17 [V45,T37] ( 3, 0.00) long -> x27 "CSE - conservative"
+; V29 cse1 [V29,T31] ( 3, 0.12) ref -> x2 "CSE - conservative"
+; V30 cse2 [V30,T02] ( 3,294.33) long -> x15 "CSE - aggressive"
+; V31 cse3 [V31,T14] ( 11, 25.06) long -> x28 "CSE - aggressive"
+; V32 cse4 [V32,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
+; V33 cse5 [V33,T23] ( 3, 2.70) long -> x14 "CSE - moderate"
+; V34 cse6 [V34,T04] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T05] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V36 cse8 [V36,T12] ( 12, 27.64) byref -> x26 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T20] ( 10, 3.19) int -> x25 multi-def "CSE - moderate"
+; V38 cse10 [V38,T22] ( 4, 2.78) int -> xip0 hoist multi-def "CSE - moderate"
+; V39 cse11 [V39,T30] ( 4, 0.12) int -> [fp+0x1C] "CSE - conservative"
+; V40 cse12 [V40,T32] ( 3, 0.12) long -> x27 "CSE - conservative"
;
-; Lcl frame size = 8
+; Lcl frame size = 16
G_M58112_IG01: ; bbWeight=0.90, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x70]!
+ stp x19, x20, [sp, #0x20]
+ stp x21, x22, [sp, #0x30]
+ stp x23, x24, [sp, #0x40]
+ stp x25, x26, [sp, #0x50]
+ stp x27, x28, [sp, #0x60]
mov fp, sp
ldp x20, x19, [fp, #0xD1FFAB1E]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w23, w21, [fp, #0xF8]
+ ldp w22, w24, [fp, #0xF0]
+ ldr w3, [fp, #0xB8]
+ ldp x12, x15, [fp, #0xA8]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=0.90 PerfScore 25.63
+ ldr d16, [fp, #0xA0]
+ ldr w14, [fp, #0x9C]
+ ;; size=56 bbWeight=0.90 PerfScore 20.23
G_M58112_IG02: ; bbWeight=0.90, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref, isz
cmp w14, w21
- bge G_M58112_IG48
+ bge G_M58112_IG31
;; size=8 bbWeight=0.90 PerfScore 1.35
G_M58112_IG03: ; bbWeight=0.89, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
- b G_M58112_IG38
+ b G_M58112_IG26
;; size=4 bbWeight=0.89 PerfScore 0.89
G_M58112_IG04: ; bbWeight=0.00, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x26]
sxtw w4, w22
+ ldr w25, [x19, #0x08]
+ cmp w4, w25
+ bhs G_M58112_IG32
mov w27, w4
lsl x28, x27, #3
ldr x2, [x26, x28]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG49
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w4, w15
+ bhs G_M58112_IG32
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x28]
- fabs d8, d16
- add w3, w4, #1
- str w3, [fp, #0x14] // [V42 cse14]
- sxtw w5, w3
- ; gcrRegs -[x5]
- cmp w5, w23
- blt G_M58112_IG13
- ;; size=64 bbWeight=0.00 PerfScore 0.00
-G_M58112_IG05: ; bbWeight=0.12, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ fabs d16, d16
+ add w5, w4, #1
+ sxtw w3, w5
+ str w3, [fp, #0x1C] // [V39 cse11]
+ sxtw w14, w3
; byrRegs -[x14]
+ cmp w14, w23
+ blt G_M58112_IG13
+ ;; size=80 bbWeight=0.00 PerfScore 0.00
+G_M58112_IG05: ; bbWeight=0.12, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ldr w14, [x20, #0x08]
+ cmp w22, w14
+ bhs G_M58112_IG32
add x14, x20, #16
; byrRegs +[x14]
lsl x15, x27, #2
str w4, [x14, x15]
cmp w4, w25
- bhs G_M58112_IG49
+ bhs G_M58112_IG32
ldr x15, [x26, w4, UXTW #3]
; gcrRegs +[x15]
- mov x7, x15
- ; gcrRegs +[x7]
- ldr w14, [x7, #0x08]
+ mov x14, x15
+ ; gcrRegs +[x14]
; byrRegs -[x14]
- cmp w22, w14
- bhs G_M58112_IG49
- add x14, x7, #16
+ ldr w12, [x14, #0x08]
+ cmp w22, w12
+ bhs G_M58112_IG32
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x28]
fcmp d16, #0.0
- beq G_M58112_IG53
+ beq G_M58112_IG36
cmp w4, w22
beq G_M58112_IG07
- ;; size=64 bbWeight=0.12 PerfScore 2.46
+ ;; size=76 bbWeight=0.12 PerfScore 3.05
G_M58112_IG06: ; bbWeight=0.12, gcrefRegs=188004 {x2 x15 x19 x20}, byrefRegs=4000000 {x26}, byref
- ; gcrRegs -[x7]
; byrRegs -[x14]
add x14, x26, x28
; byrRegs +[x14]
@@ -150,403 +148,222 @@ G_M58112_IG06: ; bbWeight=0.12, gcrefRegs=188004 {x2 x15 x19 x20}, byrefR
bl CORINFO_HELP_ARRADDR_ST
; gcrRegs -[x0 x2]
; gcr arg pop 0
- ;; size=20 bbWeight=0.12 PerfScore 0.43
+ ;; size=20 bbWeight=0.12 PerfScore 0.44
G_M58112_IG07: ; bbWeight=0.12, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
sub w0, w23, #1
cmp w22, w0
bge G_M58112_IG23
;; size=12 bbWeight=0.12 PerfScore 0.25
G_M58112_IG08: ; bbWeight=0.12, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
- ldr x4, [x26, x28]
- ; gcrRegs +[x4]
- ldr w0, [x4, #0x08]
- cmp w22, w0
- bhs G_M58112_IG49
- add x0, x4, #16
+ ldr x0, [x26, x28]
+ ; gcrRegs +[x0]
+ ldr w1, [x0, #0x08]
+ cmp w22, w1
+ bhs G_M58112_IG32
+ add x0, x0, #16
+ ; gcrRegs -[x0]
; byrRegs +[x0]
ldr d16, [x0, x28]
fmov d17, #1.0000
- fdiv d10, d17, d16
- ldr w3, [fp, #0x14] // [V42 cse14]
- sxtw w5, w3
- cmp w5, w23
- bge G_M58112_IG12
...
-476 (-32.25%) : 83048.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,140 +10,139 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 20, 5.12) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T17] ( 7, 2.01) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T06] ( 13, 5.11) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T17] ( 4, 2.02) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T03] ( 6,103.00) int -> x21
-; V03 loc1 [V03,T18] ( 19, 3.14) int -> x23
-; V04 loc2 [V04,T32] ( 7, 0.02) int -> x24
-; V05 loc3 [V05,T08] ( 30, 6.18) int -> x22
-; V06 loc4 [V06,T22] ( 22, 0.15) int -> x4
-; V07 loc5 [V07,T40] ( 8, 1.09) double -> d8
-; V08 loc6 [V08,T15] ( 22, 4.20) int -> x6
-; V09 loc7 [V09,T39] ( 9, 2.11) double -> d9
-; V10 loc8 [V10,T33] ( 4, 0.02) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T41] ( 5, 1.03) double -> d10
-; V12 loc10 [V12,T16] ( 19, 4.14) int -> x4
-; V13 loc11 [V13,T13] ( 9, 5.08) int -> x3
+; V03 loc1 [V03,T18] ( 13, 3.14) int -> x23
+; V04 loc2 [V04,T32] ( 2, 0.02) int -> x24
+; V05 loc3 [V05,T08] ( 18, 6.19) int -> x22
+; V06 loc4 [V06,T22] ( 12, 0.17) int -> x3
+; V07 loc5 [V07,T35] ( 5, 1.09) double -> d8
+; V08 loc6 [V08,T15] ( 14, 4.19) int -> x4
+; V09 loc7 [V09,T34] ( 6, 2.11) double -> d9
+; V10 loc8 [V10,T31] ( 2, 0.02) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T36] ( 3, 1.03) double -> d16
+; V12 loc10 [V12,T16] ( 12, 4.13) int -> x0
+; V13 loc11 [V13,T13] ( 7, 5.08) int -> x3
; V14 loc12 [V14,T07] ( 9, 7.05) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T14] ( 6, 5.01) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T38] ( 3,100 ) double -> d16
+; V16 loc14 [V16,T33] ( 3,100 ) double -> d16
; V17 loc15 [V17,T01] ( 13,400.96) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T09] ( 9, 6.13) byref -> x6 "dup spill"
-; V20 tmp2 [V20,T26] ( 4, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V19 tmp1 [V19,T09] ( 6, 6.13) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V21 tmp3 [V21,T00] ( 6,593.93) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T23] ( 6, 0.06) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T10] ( 9, 6.13) ref -> registers "arr expr"
-; V25 tmp7 [V25,T24] ( 6, 0.06) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T25] ( 6, 0.06) ref -> x3 "arr expr"
-; V27 tmp9 [V27,T11] ( 9, 6.13) ref -> x5 "arr expr"
+; V23 tmp5 [V23,T23] ( 3, 0.06) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T10] ( 6, 6.13) ref -> x14 "arr expr"
+; V25 tmp7 [V25,T24] ( 3, 0.06) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T25] ( 3, 0.06) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T11] ( 6, 6.13) ref -> x1 "arr expr"
; V28 cse0 [V28,T28] ( 3, 0.03) ref -> x15 "CSE - conservative"
-; V29 cse1 [V29,T35] ( 3, 0.00) ref -> x15 "CSE - conservative"
-; V30 cse2 [V30,T36] ( 3, 0.00) ref -> x2 "CSE - conservative"
-; V31 cse3 [V31,T29] ( 3, 0.03) ref -> x2 "CSE - conservative"
-; V32 cse4 [V32,T02] ( 3,294.00) long -> x15 "CSE - aggressive"
-; V33 cse5 [V33,T21] ( 11, 2.09) long -> x27 "CSE - aggressive"
-; V34 cse6 [V34,T19] ( 3, 3.03) long -> x14 "CSE - aggressive"
-; V35 cse7 [V35,T20] ( 3, 2.97) long -> x0 "CSE - moderate"
-; V36 cse8 [V36,T31] ( 9, 0.02) long -> x26 "CSE - conservative"
-; V37 cse9 [V37,T04] ( 4,100.00) byref -> xip0 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T05] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T12] ( 19, 5.12) byref -> x25 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T27] ( 4, 0.04) int -> x28 "CSE - conservative"
-; V41 cse13 [V41,T34] ( 4, 0.00) int -> x27 "CSE - conservative"
-; V42 cse14 [V42,T30] ( 3, 0.03) long -> x26 "CSE - conservative"
-; V43 cse15 [V43,T37] ( 3, 0.00) long -> x14 "CSE - conservative"
+; V29 cse1 [V29,T29] ( 3, 0.03) ref -> x2 "CSE - conservative"
+; V30 cse2 [V30,T02] ( 3,294.00) long -> x15 "CSE - aggressive"
+; V31 cse3 [V31,T21] ( 11, 2.12) long -> x27 "CSE - aggressive"
+; V32 cse4 [V32,T19] ( 3, 3.03) long -> x14 "CSE - aggressive"
+; V33 cse5 [V33,T20] ( 3, 2.97) long -> x0 "CSE - moderate"
+; V34 cse6 [V34,T04] ( 4,100.00) byref -> xip0 hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T05] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
+; V36 cse8 [V36,T12] ( 12, 5.12) byref -> x25 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T26] ( 4, 0.04) int -> x28 "CSE - conservative"
+; V38 cse10 [V38,T30] ( 3, 0.03) long -> x26 "CSE - conservative"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M58112_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x70]!
+ stp d8, d9, [sp, #0x10]
+ stp x19, x20, [sp, #0x20]
+ stp x21, x22, [sp, #0x30]
+ stp x23, x24, [sp, #0x40]
+ stp x25, x26, [sp, #0x50]
+ stp x27, x28, [sp, #0x60]
mov fp, sp
ldp x20, x19, [fp, #0xD1FFAB1E]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w23, w21, [fp, #0xF8]
+ ldp w22, w24, [fp, #0xF0]
+ ldr w3, [fp, #0xB8]
+ ldp x12, x15, [fp, #0xA8]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=1 PerfScore 28.50
+ ldr d16, [fp, #0xA0]
+ ldr w14, [fp, #0x9C]
+ ;; size=60 bbWeight=1 PerfScore 23.50
G_M58112_IG02: ; bbWeight=1, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
b G_M58112_IG14
;; size=4 bbWeight=1 PerfScore 1.00
G_M58112_IG03: ; bbWeight=0.01, gcrefRegs=180000 {x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x25]
- sxtw w4, w22
- mov w26, w4
+ sxtw w3, w22
+ ldr w14, [x19, #0x08]
+ cmp w3, w14
+ bhs G_M58112_IG34
+ mov w26, w3
lsl x27, x26, #3
ldr x2, [x25, x27]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG52
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w3, w15
+ bhs G_M58112_IG34
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fabs d8, d16
- add w28, w4, #1
- sxtw w6, w28
- cmp w6, w23
+ add w28, w3, #1
+ sxtw w4, w28
+ cmp w4, w23
blt G_M58112_IG05
- ;; size=60 bbWeight=0.01 PerfScore 0.18
+ ;; size=72 bbWeight=0.01 PerfScore 0.23
G_M58112_IG04: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x5]
; byrRegs -[x14]
+ ldr w14, [x20, #0x08]
+ cmp w22, w14
+ bhs G_M58112_IG34
add x14, x20, #16
; byrRegs +[x14]
lsl x15, x26, #2
- str w4, [x14, x15]
+ str w3, [x14, x15]
ldr w14, [x19, #0x08]
; byrRegs -[x14]
- cmp w4, w14
- bhs G_M58112_IG52
- ldr x15, [x25, w4, UXTW #3]
+ cmp w3, w14
+ bhs G_M58112_IG34
+ ldr x15, [x25, w3, UXTW #3]
; gcrRegs +[x15]
- mov x7, x15
- ; gcrRegs +[x7]
- ldr w14, [x7, #0x08]
- cmp w22, w14
- bhs G_M58112_IG52
- add x14, x7, #16
+ mov x14, x15
+ ; gcrRegs +[x14]
+ ldr w12, [x14, #0x08]
+ cmp w22, w12
+ bhs G_M58112_IG34
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fcmp d16, #0.0
- beq G_M58112_IG37
+ beq G_M58112_IG38
b G_M58112_IG21
- ;; size=64 bbWeight=0.01 PerfScore 0.23
+ ;; size=76 bbWeight=0.01 PerfScore 0.28
G_M58112_IG05: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x7 x15]
+ ; gcrRegs -[x15]
; byrRegs -[x14]
- orr w14, w6, w23
+ orr w14, w4, w23
tbz w14, #31, G_M58112_IG08
;; size=8 bbWeight=0.01 PerfScore 0.02
G_M58112_IG06: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
ldr w14, [x19, #0x08]
- cmp w6, w14
- bhs G_M58112_IG52
- ldr x14, [x25, w6, UXTW #3]
+ cmp w4, w14
+ bhs G_M58112_IG34
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG52
+ bhs G_M58112_IG34
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -161,12 +160,12 @@ G_M58112_IG08: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
cmp w14, w23
blt G_M58112_IG06
;; size=12 bbWeight=0.01 PerfScore 0.05
-G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ldr x14, [x25, w6, UXTW #3]
+G_M58112_IG09: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG52
+ bhs G_M58112_IG34
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -174,18 +173,18 @@ G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
fabs d9, d16
fcmp d9, d8
bgt G_M58112_IG12
- ;; size=36 bbWeight=1.00 PerfScore 15.02
-G_M58112_IG10: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ;; size=36 bbWeight=1.01 PerfScore 15.17
+G_M58112_IG10: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; byrRegs -[x14]
...
-156 (-21.67%) : 46277.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,213 +11,167 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.99) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.99) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.99) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,498.99) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.96) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.96) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.04) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.04) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.03) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.01) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.99) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T12] ( 6, 2.98) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.05) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T13] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.99) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.99) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.99) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.01) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.99) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T12] ( 6, 2.98) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.05) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T13] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.99) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.99) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.99) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG08
;; size=8 bbWeight=0.99 PerfScore 1.49
-G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG10
;; size=4 bbWeight=0.98 PerfScore 0.98
-G_M9806_IG05: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w6, [x0, #0x08]
- cmp w6, w22
+G_M9806_IG05: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG10
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG10
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG10
tbnz w2, #31, G_M9806_IG10
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG10
;; size=40 bbWeight=0.98 PerfScore 14.74
-G_M9806_IG06: ; bbWeight=0.98, gcrefRegs=1800AB {x0 x1 x3 x5 x7 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+G_M9806_IG06: ; bbWeight=0.98, gcrefRegs=18012B {x0 x1 x3 x5 x8 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG12
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=20 bbWeight=0.98 PerfScore 7.86
-G_M9806_IG07: ; bbWeight=98.02, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=20 bbWeight=0.98 PerfScore 7.86
+G_M9806_IG07: ; bbWeight=98.02, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG12
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG07
;; size=52 bbWeight=98.02 PerfScore 1323.23
-G_M9806_IG08: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG08: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG22
+ bge G_M9806_IG14
;; size=12 bbWeight=0.99 PerfScore 1.99
-G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.99 PerfScore 1.49
-G_M9806_IG10: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG10: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG12
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG12
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG12
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG11: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG11: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG12
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
...
-156 (-21.67%) : 46300.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,217 +11,171 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.94) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.94) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.94) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.04) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.83) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.83) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.17) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.17) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.12) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.10) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.94) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.91) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.12) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.97) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.94) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.94) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.10) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.94) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.91) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.12) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.97) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.94) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.94) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG08
;; size=8 bbWeight=0.97 PerfScore 1.46
-G_M9806_IG04: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG10
;; size=4 bbWeight=0.96 PerfScore 0.96
-G_M9806_IG05: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w6, [x0, #0x08]
- cmp w6, w22
+G_M9806_IG05: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG10
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG10
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG10
tbnz w2, #31, G_M9806_IG10
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG10
;; size=40 bbWeight=0.96 PerfScore 14.43
-G_M9806_IG06: ; bbWeight=0.96, gcrefRegs=1800AB {x0 x1 x3 x5 x7 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+G_M9806_IG06: ; bbWeight=0.96, gcrefRegs=18012B {x0 x1 x3 x5 x8 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG13
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=20 bbWeight=0.96 PerfScore 7.69
-G_M9806_IG07: ; bbWeight=98.04, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=20 bbWeight=0.96 PerfScore 7.69
+G_M9806_IG07: ; bbWeight=98.04, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG13
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG07
;; size=52 bbWeight=98.04 PerfScore 1323.52
-G_M9806_IG08: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG08: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG23
+ bge G_M9806_IG15
;; size=12 bbWeight=0.97 PerfScore 1.94
-G_M9806_IG09: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG09: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.97 PerfScore 1.46
-G_M9806_IG10: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG10: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG13
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG13
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG13
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG11: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG11: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG13
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
...
-56 (-6.64%) : 67945.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -10,16 +10,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 3 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T13] ( 15, 105.08) ref -> x0 class-hnd single-def <float[][]>
+; V00 arg0 [V00,T13] ( 12, 104.87) ref -> x0 class-hnd single-def <float[][]>
; V01 arg1 [V01,T22] ( 7, 4.62) ref -> x1 class-hnd single-def <int[][]>
; V02 arg2 [V02,T23] ( 3, 3 ) ref -> x2 class-hnd single-def <double[]>
; V03 arg3 [V03,T25] ( 4, 2.21) ref -> x3 class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T24] ( 5, 2.62) int -> x4 single-def
+; V04 arg4 [V04,T24] ( 4, 2.62) int -> x4 single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T05] ( 25,1699.36) int -> x5
-; V08 loc3 [V08,T28] ( 6, 0.63) ref -> x8 class-hnd <float[]>
-; V09 loc4 [V09,T12] ( 13, 108.54) int -> x7
+; V07 loc2 [V07,T05] ( 20,1699.35) int -> x5
+; V08 loc3 [V08,T28] ( 5, 0.63) ref -> x8 class-hnd <float[]>
+; V09 loc4 [V09,T12] ( 12, 108.54) int -> x7
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T07] ( 18,1200.13) int -> x6
; V12 loc7 [V12,T31] ( 4, 199.58) float -> d16
@@ -45,8 +45,8 @@
; V32 cse2 [V32,T17] ( 4, 100.00) long -> x13 hoist multi-def "CSE - aggressive"
; V33 cse3 [V33,T27] ( 5, 3.02) long -> x15 "CSE - moderate"
; V34 cse4 [V34,T10] ( 16, 304.52) int -> x12 hoist multi-def "CSE - aggressive"
-; V35 cse5 [V35,T15] ( 9, 101.83) int -> x2 hoist "CSE - aggressive"
-; V36 cse6 [V36,T14] ( 6, 102.23) byref -> x9 hoist "CSE - aggressive"
+; V35 cse5 [V35,T14] ( 6, 102.23) byref -> x9 hoist "CSE - aggressive"
+; V36 cse6 [V36,T15] ( 7, 101.63) int -> x2 hoist "CSE - aggressive"
; V37 cse7 [V37,T18] ( 4, 100.00) int -> x10 hoist multi-def "CSE - aggressive"
; V38 cse8 [V38,T16] ( 4, 100.00) byref -> x11 hoist multi-def "CSE - aggressive"
;
@@ -75,20 +75,20 @@ G_M56974_IG02: ; bbWeight=1, gcrefRegs=010F {x0 x1 x2 x3 x8}, byrefRegs=0
;; size=8 bbWeight=1 PerfScore 3.50
G_M56974_IG03: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
cmp w2, w6
- ble G_M56974_IG17
+ ble G_M56974_IG14
;; size=8 bbWeight=0.21 PerfScore 0.31
G_M56974_IG04: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
- cbz x1, G_M56974_IG27
+ cbz x1, G_M56974_IG24
;; size=4 bbWeight=0.21 PerfScore 0.21
G_M56974_IG05: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
- cbz x0, G_M56974_IG27
- tbnz w6, #31, G_M56974_IG27
+ cbz x0, G_M56974_IG24
+ tbnz w6, #31, G_M56974_IG24
ldr w10, [x1, #0x08]
cmp w10, w2
- blt G_M56974_IG27
+ blt G_M56974_IG24
ldr w10, [x0, #0x08]
cmp w10, w2
- blt G_M56974_IG27
+ blt G_M56974_IG24
;; size=32 bbWeight=0.21 PerfScore 2.29
G_M56974_IG06: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
ldr w10, [x8, #0x08]
@@ -101,7 +101,7 @@ G_M56974_IG06: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0
;; size=20 bbWeight=0.21 PerfScore 1.67
G_M56974_IG07: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
cmp w7, w10
- bhs G_M56974_IG38
+ bhs G_M56974_IG35
ldr s16, [x11, x13]
ldr w15, [x14, #0x08]
cmp w15, w5
@@ -109,35 +109,18 @@ G_M56974_IG07: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
;; size=24 bbWeight=98.79 PerfScore 889.14
G_M56974_IG08: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
cmp w5, w6
- bne G_M56974_IG20
+ bne G_M56974_IG17
;; size=8 bbWeight=395.17 PerfScore 592.76
G_M56974_IG09: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref
movi v17.16b, #0
- b G_M56974_IG21
+ b G_M56974_IG18
;; size=8 bbWeight=395.17 PerfScore 592.76
G_M56974_IG10: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs -[x8 x14]
; byrRegs -[x11]
- add x8, x0, #16
- ; byrRegs +[x8]
- ldr x8, [x8, w5, UXTW #3]
- ; gcrRegs +[x8]
- ; byrRegs -[x8]
- mov w7, wzr
- cmp w4, #0
- bgt G_M56974_IG13
- ;; size=20 bbWeight=0.21 PerfScore 1.14
-G_M56974_IG11: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
- ; gcrRegs -[x8]
- add w5, w5, #1
- cmp w2, w5
- ble G_M56974_IG39
- b G_M56974_IG10
- ;; size=16 bbWeight=0.21 PerfScore 0.62
-G_M56974_IG12: ; bbWeight=0.00, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
ldr w8, [x0, #0x08]
cmp w5, w8
- bhs G_M56974_IG38
+ bhs G_M56974_IG35
add x7, x0, #16
; byrRegs +[x7]
ldr x8, [x7, w5, UXTW #3]
@@ -145,58 +128,52 @@ G_M56974_IG12: ; bbWeight=0.00, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200
mov w7, wzr
; byrRegs -[x7]
cmp w4, #0
- ble G_M56974_IG16
- ;; size=32 bbWeight=0.00 PerfScore 0.02
-G_M56974_IG13: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
- ldr w6, [x1, #0x08]
- cmp w5, w6
- bhs G_M56974_IG38
- ldr x6, [x9, w5, UXTW #3]
- ; gcrRegs +[x6]
- tbnz w7, #31, G_M56974_IG17
- ;; size=20 bbWeight=0.21 PerfScore 1.78
-G_M56974_IG14: ; bbWeight=6.69, gcrefRegs=014B {x0 x1 x3 x6 x8}, byrefRegs=0200 {x9}, byref, isz
- ldr w6, [x6, #0x08]
- ; gcrRegs -[x6]
- cmp w6, w7
- ble G_M56974_IG17
- ;; size=12 bbWeight=6.69 PerfScore 30.10
-G_M56974_IG15: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
- add w6, w5, #1
- b G_M56974_IG03
- ;; size=8 bbWeight=0.21 PerfScore 0.31
-G_M56974_IG16: ; bbWeight=0.00, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
+ bgt G_M56974_IG12
+ ;; size=32 bbWeight=0.21 PerfScore 2.09
+G_M56974_IG11: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs -[x8]
add w5, w5, #1
cmp w2, w5
- ble G_M56974_IG39
- b G_M56974_IG12
- ;; size=16 bbWeight=0.00 PerfScore 0.01
-G_M56974_IG17: ; bbWeight=0.41, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
+ ble G_M56974_IG36
+ b G_M56974_IG10
+ ;; size=16 bbWeight=0.21 PerfScore 0.63
+G_M56974_IG12: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs +[x8]
+ ldr w6, [x1, #0x08]
+ cmp w5, w6
+ bhs G_M56974_IG35
+ ldr x6, [x9, w5, UXTW #3]
+ ; gcrRegs +[x6]
+ tbnz w7, #31, G_M56974_IG14
+ ;; size=20 bbWeight=0.21 PerfScore 1.78
+G_M56974_IG13: ; bbWeight=6.69, gcrefRegs=014B {x0 x1 x3 x6 x8}, byrefRegs=0200 {x9}, byref, isz
+ ldr w6, [x6, #0x08]
+ ; gcrRegs -[x6]
+ cmp w6, w7
+ bgt G_M56974_IG16
+ ;; size=12 bbWeight=6.69 PerfScore 30.10
+G_M56974_IG14: ; bbWeight=0.41, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
add w7, w7, #1
cmp w7, w4
- blt G_M56974_IG13
+ blt G_M56974_IG12
;; size=12 bbWeight=0.41 PerfScore 0.82
-G_M56974_IG18: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
+G_M56974_IG15: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref
; gcrRegs -[x8]
- cbz x0, G_M56974_IG16
- tbnz w5, #31, G_M56974_IG16
- ldr w8, [x0, #0x08]
- cmp w8, w2
- blt G_M56974_IG16
- ;; size=20 bbWeight=0.21 PerfScore 1.36
-G_M56974_IG19: ; bbWeight=0.64, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref
b G_M56974_IG11
- ;; size=4 bbWeight=0.64 PerfScore 0.64
-G_M56974_IG20: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
- ; gcrRegs +[x8 x14]
+ ;; size=4 bbWeight=0.21 PerfScore 0.21
+G_M56974_IG16: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
+ ; gcrRegs +[x8]
+ add w6, w5, #1
+ b G_M56974_IG03
+ ;; size=8 bbWeight=0.21 PerfScore 0.31
+G_M56974_IG17: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+ ; gcrRegs +[x14]
; byrRegs +[x11]
mov x15, x14
; gcrRegs +[x15]
ldr wip0, [x15, #0x08]
cmp w5, wip0
- bhs G_M56974_IG38
+ bhs G_M56974_IG35
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
@@ -207,14 +184,14 @@ G_M56974_IG20: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byref
sub wip0, wip0, #1
ldr w19, [x15, #0x08]
cmp wip0, w19
- bhs G_M56974_IG38
+ bhs G_M56974_IG35
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
ldr s17, [x15, wip0, UXTW #2]
fcvt d17, s17
;; size=56 bbWeight=395.17 PerfScore 8101.03
-G_M56974_IG21: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG18: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
; byrRegs -[x15]
fcvt d16, s16
fadd d16, d16, d17
@@ -222,15 +199,15 @@ G_M56974_IG21: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
ldr x15, [x9, xip0]
; gcrRegs +[x15]
sxtw w19, w12
- tbnz w19, #31, G_M56974_IG26
+ tbnz w19, #31, G_M56974_IG23
;; size=24 bbWeight=98.79 PerfScore 1136.12
-G_M56974_IG22: ; bbWeight=3161.38, gcrefRegs=C10B {x0 x1 x3 x8 x14 x15}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG19: ; bbWeight=3161.38, gcrefRegs=C10B {x0 x1 x3 x8 x14 x15}, byrefRegs=0A00 {x9 x11}, byref, isz
ldr w15, [x15, #0x08]
; gcrRegs -[x15]
cmp w15, w19
- ble G_M56974_IG26
+ ble G_M56974_IG23
;; size=12 bbWeight=3161.38 PerfScore 14226.20
-G_M56974_IG23: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG20: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
add x15, x0, #16
; byrRegs +[x15]
ldr x15, [x15, xip0]
@@ -238,27 +215,27 @@ G_M56974_IG23: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
; byrRegs -[x15]
ldr w19, [x15, #0x08]
cmp w12, w19
- bhs G_M56974_IG38
+ bhs G_M56974_IG35
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
ldr s17, [x15, w12, UXTW #2]
fcvt d17, s17
fcmp d17, d16
- bgt G_M56974_IG26
+ bgt G_M56974_IG23
...
-56 (-6.64%) : 67964.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -10,16 +10,16 @@
; 3 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T11] ( 15,109.21) ref -> x0 class-hnd single-def <float[][]>
+; V00 arg0 [V00,T12] ( 12,107.97) ref -> x0 class-hnd single-def <float[][]>
; V01 arg1 [V01,T19] ( 7, 7.88) ref -> x1 class-hnd single-def <int[][]>
; V02 arg2 [V02,T24] ( 3, 3 ) ref -> x2 class-hnd single-def <double[]>
; V03 arg3 [V03,T21] ( 4, 3.30) ref -> x3 class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T20] ( 5, 4.61) int -> x4 single-def
+; V04 arg4 [V04,T20] ( 4, 4.61) int -> x4 single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T06] ( 25,509.38) int -> x6
-; V08 loc3 [V08,T25] ( 6, 3.83) ref -> x8 class-hnd <float[]>
-; V09 loc4 [V09,T12] ( 13,110.43) int -> x7
+; V07 loc2 [V07,T06] ( 20,509.37) int -> x6
+; V08 loc3 [V08,T25] ( 5, 3.83) ref -> x8 class-hnd <float[]>
+; V09 loc4 [V09,T11] ( 12,110.43) int -> x7
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T00] ( 18,605.42) int -> x5
; V12 loc7 [V12,T31] ( 4,199.69) float -> d16
@@ -45,7 +45,7 @@
; V32 cse2 [V32,T09] ( 5,296.73) long -> xip0 "CSE - aggressive"
; V33 cse3 [V33,T26] ( 5, 3.00) long -> x15 "CSE - moderate"
; V34 cse4 [V34,T08] ( 16,301.22) int -> x12 hoist multi-def "CSE - aggressive"
-; V35 cse5 [V35,T13] ( 9,107.33) int -> x2 hoist "CSE - aggressive"
+; V35 cse5 [V35,T13] ( 7,106.11) int -> x2 hoist "CSE - aggressive"
; V36 cse6 [V36,T14] ( 6,102.25) byref -> x9 hoist "CSE - aggressive"
; V37 cse7 [V37,T17] ( 4,101.14) int -> x10 hoist multi-def "CSE - aggressive"
; V38 cse8 [V38,T15] ( 4,101.14) byref -> x11 hoist multi-def "CSE - aggressive"
@@ -72,30 +72,13 @@ G_M56974_IG02: ; bbWeight=1, gcrefRegs=010F {x0 x1 x2 x3 x8}, byrefRegs=0
; gcrRegs -[x2]
add x9, x1, #16
; byrRegs +[x9]
- b G_M56974_IG11
+ b G_M56974_IG09
;; size=12 bbWeight=1 PerfScore 4.50
-G_M56974_IG03: ; bbWeight=1.22, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
+G_M56974_IG03: ; bbWeight=1.23, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs -[x8]
- add x8, x0, #16
- ; byrRegs +[x8]
- ldr x8, [x8, w6, UXTW #3]
- ; gcrRegs +[x8]
- ; byrRegs -[x8]
- mov w7, wzr
- cmp w4, #0
- bgt G_M56974_IG07
- ;; size=20 bbWeight=1.22 PerfScore 6.69
-G_M56974_IG04: ; bbWeight=1.22, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
- ; gcrRegs -[x8]
- add w6, w6, #1
- cmp w2, w6
- ble G_M56974_IG27
- b G_M56974_IG03
- ;; size=16 bbWeight=1.22 PerfScore 3.65
-G_M56974_IG05: ; bbWeight=0.01, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
ldr w8, [x0, #0x08]
cmp w6, w8
- bhs G_M56974_IG26
+ bhs G_M56974_IG24
add x7, x0, #16
; byrRegs +[x7]
ldr x8, [x7, w6, UXTW #3]
@@ -103,60 +86,55 @@ G_M56974_IG05: ; bbWeight=0.01, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200
mov w7, wzr
; byrRegs -[x7]
cmp w4, #0
- bgt G_M56974_IG07
- ;; size=32 bbWeight=0.01 PerfScore 0.12
-G_M56974_IG06: ; bbWeight=0.01, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
+ bgt G_M56974_IG05
+ ;; size=32 bbWeight=1.23 PerfScore 12.28
+G_M56974_IG04: ; bbWeight=1.23, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs -[x8]
add w6, w6, #1
cmp w2, w6
- ble G_M56974_IG27
- b G_M56974_IG05
- ;; size=16 bbWeight=0.01 PerfScore 0.04
-G_M56974_IG07: ; bbWeight=1.30, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
+ ble G_M56974_IG25
+ b G_M56974_IG03
+ ;; size=16 bbWeight=1.23 PerfScore 3.69
+G_M56974_IG05: ; bbWeight=1.30, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs +[x8]
ldr w5, [x1, #0x08]
cmp w6, w5
- bhs G_M56974_IG26
+ bhs G_M56974_IG24
ldr x5, [x9, w6, UXTW #3]
; gcrRegs +[x5]
- tbnz w7, #31, G_M56974_IG08
+ tbnz w7, #31, G_M56974_IG06
ldr w5, [x5, #0x08]
; gcrRegs -[x5]
cmp w5, w7
- bgt G_M56974_IG10
+ bgt G_M56974_IG08
;; size=32 bbWeight=1.30 PerfScore 16.95
-G_M56974_IG08: ; bbWeight=1.38, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
+G_M56974_IG06: ; bbWeight=1.38, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
add w7, w7, #1
cmp w7, w4
- blt G_M56974_IG07
+ blt G_M56974_IG05
;; size=12 bbWeight=1.38 PerfScore 2.77
-G_M56974_IG09: ; bbWeight=1.23, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
+G_M56974_IG07: ; bbWeight=1.23, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref
; gcrRegs -[x8]
- cbz x0, G_M56974_IG06
- tbnz w6, #31, G_M56974_IG06
- ldr w8, [x0, #0x08]
- cmp w8, w2
- blt G_M56974_IG06
b G_M56974_IG04
- ;; size=24 bbWeight=1.23 PerfScore 9.21
-G_M56974_IG10: ; bbWeight=1.30, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
+ ;; size=4 bbWeight=1.23 PerfScore 1.23
+G_M56974_IG08: ; bbWeight=1.30, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
; gcrRegs +[x8]
add w5, w6, #1
;; size=4 bbWeight=1.30 PerfScore 0.65
-G_M56974_IG11: ; bbWeight=1.30, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
+G_M56974_IG09: ; bbWeight=1.30, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
cmp w2, w5
- ble G_M56974_IG08
+ ble G_M56974_IG06
;; size=8 bbWeight=1.30 PerfScore 1.96
-G_M56974_IG12: ; bbWeight=1.29, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
- cbz x1, G_M56974_IG19
- cbz x0, G_M56974_IG19
- tbnz w5, #31, G_M56974_IG19
+G_M56974_IG10: ; bbWeight=1.29, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
+ cbz x1, G_M56974_IG17
+ cbz x0, G_M56974_IG17
+ tbnz w5, #31, G_M56974_IG17
ldr w10, [x1, #0x08]
cmp w10, w2
- blt G_M56974_IG19
+ blt G_M56974_IG17
ldr w10, [x0, #0x08]
cmp w10, w2
- blt G_M56974_IG19
+ blt G_M56974_IG17
ldr w10, [x8, #0x08]
add x11, x8, #16
; byrRegs +[x11]
@@ -165,22 +143,22 @@ G_M56974_IG12: ; bbWeight=1.29, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0
; gcrRegs +[x14]
add w12, w7, #1
;; size=56 bbWeight=1.29 PerfScore 25.73
-G_M56974_IG13: ; bbWeight=98.84, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG11: ; bbWeight=98.84, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
cmp w7, w10
- bhs G_M56974_IG26
+ bhs G_M56974_IG24
ldr s16, [x11, x13]
ldr w15, [x14, #0x08]
cmp w15, w6
- ble G_M56974_IG28
+ ble G_M56974_IG26
;; size=24 bbWeight=98.84 PerfScore 889.60
-G_M56974_IG14: ; bbWeight=98.84, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG12: ; bbWeight=98.84, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
cmp w6, w5
- beq G_M56974_IG28
+ beq G_M56974_IG26
mov x15, x14
; gcrRegs +[x15]
ldr wip0, [x15, #0x08]
cmp w6, wip0
- bhs G_M56974_IG26
+ bhs G_M56974_IG24
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
@@ -191,14 +169,14 @@ G_M56974_IG14: ; bbWeight=98.84, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
sub wip0, wip0, #1
ldr w19, [x15, #0x08]
cmp wip0, w19
- bhs G_M56974_IG26
+ bhs G_M56974_IG24
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
ldr s17, [x15, wip0, UXTW #2]
fcvt d17, s17
;; size=64 bbWeight=98.84 PerfScore 2174.57
-G_M56974_IG15: ; bbWeight=98.84, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG13: ; bbWeight=98.84, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
; byrRegs -[x15]
fcvt d16, s16
fadd d16, d16, d17
@@ -206,11 +184,11 @@ G_M56974_IG15: ; bbWeight=98.84, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
ldr x15, [x9, xip0]
; gcrRegs +[x15]
sxtw w19, w12
- tbnz w19, #31, G_M56974_IG18
+ tbnz w19, #31, G_M56974_IG16
ldr w15, [x15, #0x08]
; gcrRegs -[x15]
cmp w15, w19
- ble G_M56974_IG18
+ ble G_M56974_IG16
add x15, x0, #16
; byrRegs +[x15]
ldr x15, [x15, xip0]
@@ -218,27 +196,27 @@ G_M56974_IG15: ; bbWeight=98.84, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
; byrRegs -[x15]
ldr w19, [x15, #0x08]
cmp w12, w19
- bhs G_M56974_IG26
+ bhs G_M56974_IG24
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
ldr s17, [x15, w12, UXTW #2]
fcvt d17, s17
fcmp d17, d16
- bgt G_M56974_IG18
+ bgt G_M56974_IG16
;; size=76 bbWeight=98.84 PerfScore 3212.44
-G_M56974_IG16: ; bbWeight=99, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG14: ; bbWeight=99, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
; byrRegs -[x15]
add w5, w5, #1
cmp w2, w5
- bgt G_M56974_IG13
+ bgt G_M56974_IG11
;; size=12 bbWeight=99 PerfScore 198.00
-G_M56974_IG17: ; bbWeight=1.29, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
+G_M56974_IG15: ; bbWeight=1.29, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
; gcrRegs -[x14]
; byrRegs -[x11]
- b G_M56974_IG08
+ b G_M56974_IG06
;; size=4 bbWeight=1.29 PerfScore 1.29
-G_M56974_IG18: ; bbWeight=0.10, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG16: ; bbWeight=0.10, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
; gcrRegs +[x14]
; byrRegs +[x11]
add x15, x0, #16
@@ -248,7 +226,7 @@ G_M56974_IG18: ; bbWeight=0.10, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRe
; byrRegs -[x15]
ldr w19, [x15, #0x08]
cmp w12, w19
- bhs G_M56974_IG26
+ bhs G_M56974_IG24
...
benchmarks.run_tiered.osx.arm64.checked.mch
-440 (-32.16%) : 47641.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -9,93 +9,90 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T20] ( 11, 11.04) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T25] ( 7, 6.02) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T20] ( 7, 11 ) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T25] ( 4, 6 ) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T12] ( 6, 36 ) int -> x23
-; V03 loc1 [V03,T08] ( 19, 55.92) int -> x22
-; V04 loc2 [V04,T21] ( 7, 13 ) int -> x24
-; V05 loc3 [V05,T04] ( 34, 79.06) int -> x21
-; V06 loc4 [V06,T14] ( 22, 26.02) int -> x4
-; V07 loc5 [V07,T37] ( 8, 26.00) double -> d8
-; V08 loc6 [V08,T06] ( 22, 78.30) int -> registers
-; V09 loc7 [V09,T36] ( 9, 40.00) double -> d9
-; V10 loc8 [V10,T31] ( 4, 4 ) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T38] ( 5, 18 ) double -> d10
-; V12 loc10 [V12,T07] ( 19, 70.30) int -> x4
-; V13 loc11 [V13,T13] ( 9, 32 ) int -> x3
+; V03 loc1 [V03,T08] ( 13, 56 ) int -> x22
+; V04 loc2 [V04,T24] ( 2, 10 ) int -> x24
+; V05 loc3 [V05,T04] ( 19, 80 ) int -> x21
+; V06 loc4 [V06,T14] ( 12, 28 ) int -> x1
+; V07 loc5 [V07,T34] ( 5, 26 ) double -> d16
+; V08 loc6 [V08,T06] ( 14, 78.16) int -> x14
+; V09 loc7 [V09,T33] ( 6, 40 ) double -> d17
+; V10 loc8 [V10,T31] ( 2, 4 ) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T35] ( 3, 18 ) double -> d16
+; V12 loc10 [V12,T07] ( 12, 70.16) int -> x0
+; V13 loc11 [V13,T13] ( 7, 32 ) int -> x3
; V14 loc12 [V14,T17] ( 9, 18.24) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T19] ( 6, 14.20) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T39] ( 3, 18 ) double -> d16
+; V16 loc14 [V16,T36] ( 3, 18 ) double -> d16
; V17 loc15 [V17,T05] ( 13, 78.32) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T00] ( 9, 96.00) byref -> x6 "dup spill"
-; V20 tmp2 [V20,T26] ( 4, 8 ) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V21 tmp3 [V21,T03] ( 6, 96 ) byref -> registers "dup spill"
+; V19 tmp1 [V19,T00] ( 6, 96 ) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 8 ) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V21 tmp3 [V21,T01] ( 6, 96 ) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T22] ( 6, 12 ) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T01] ( 9, 96.00) ref -> x6 "arr expr"
-; V25 tmp7 [V25,T23] ( 6, 12 ) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T24] ( 6, 12 ) ref -> x3 "arr expr"
-; V27 tmp9 [V27,T02] ( 9, 96.00) ref -> x5 "arr expr"
-; V28 cse0 [V28,T29] ( 3, 5.94) ref -> x15 "CSE - moderate"
-; V29 cse1 [V29,T34] ( 3, 0.06) ref -> x2 "CSE - conservative"
-; V30 cse2 [V30,T35] ( 3, 0.06) ref -> x15 "CSE - conservative"
-; V31 cse3 [V31,T30] ( 3, 5.94) ref -> x2 "CSE - moderate"
-; V32 cse4 [V32,T11] ( 11, 45.54) long -> x27 "CSE - aggressive"
-; V33 cse5 [V33,T09] ( 3, 47.52) long -> x15 "CSE - aggressive"
-; V34 cse6 [V34,T28] ( 3, 6 ) long -> x14 "CSE - moderate"
-; V35 cse7 [V35,T33] ( 9, 0.46) long -> x27 "CSE - conservative"
-; V36 cse8 [V36,T32] ( 3, 0.48) long -> x0 "CSE - conservative"
-; V37 cse9 [V37,T10] ( 19, 47.02) byref -> x26 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T15] ( 4, 20.04) byref -> xip0 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T16] ( 4, 20.04) byref -> x1 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T18] ( 15, 14.64) int -> x25 multi-def "CSE - moderate"
-; V41 cse13 [V41,T27] ( 4, 7.92) int -> x28 "CSE - moderate"
+; V23 tmp5 [V23,T21] ( 3, 12 ) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T02] ( 6, 96 ) ref -> x15 "arr expr"
+; V25 tmp7 [V25,T22] ( 3, 12 ) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T23] ( 3, 12 ) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T03] ( 6, 96 ) ref -> x1 "arr expr"
+; V28 cse0 [V28,T28] ( 3, 6 ) ref -> x2 "CSE - moderate"
+; V29 cse1 [V29,T29] ( 3, 6 ) ref -> x15 "CSE - moderate"
+; V30 cse2 [V30,T11] ( 11, 46 ) long -> x27 "CSE - aggressive"
+; V31 cse3 [V31,T09] ( 3, 47.52) long -> x15 "CSE - aggressive"
+; V32 cse4 [V32,T30] ( 3, 6 ) long -> x14 "CSE - moderate"
+; V33 cse5 [V33,T32] ( 3, 0.48) long -> x0 "CSE - conservative"
+; V34 cse6 [V34,T10] ( 12, 47 ) byref -> x26 hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T18] ( 10, 16.32) int -> x25 multi-def "CSE - aggressive"
+; V36 cse8 [V36,T15] ( 4, 20.04) byref -> xip0 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T16] ( 4, 20.04) byref -> x1 hoist multi-def "CSE - aggressive"
+; V38 cse10 [V38,T26] ( 4, 8 ) int -> x28 "CSE - moderate"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M58112_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x60]!
+ stp x19, x20, [sp, #0x10]
+ stp x21, x22, [sp, #0x20]
+ stp x23, x24, [sp, #0x30]
+ stp x25, x26, [sp, #0x40]
+ stp x27, x28, [sp, #0x50]
mov fp, sp
- ldp x20, x19, [fp, #0xD1FFAB1E]
+ ldp x20, x19, [fp, #0xF0]
; gcrRegs +[x19-x20]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w22, w23, [fp, #0xE8]
+ ldp w21, w24, [fp, #0xE0]
+ ldr w3, [fp, #0xA8]
+ ldp x12, x15, [fp, #0x98]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=0.01 PerfScore 0.28
+ ldr d16, [fp, #0x90]
+ ldr w14, [fp, #0x8C]
+ ;; size=56 bbWeight=0.01 PerfScore 0.22
G_M58112_IG02: ; bbWeight=0.01, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
- b G_M58112_IG31
+ b G_M58112_IG21
;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M58112_IG03: ; bbWeight=1.98, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+G_M58112_IG03: ; bbWeight=2, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x26]
- sxtw w4, w21
- ubfiz x27, x4, #3, #32
+ sxtw w1, w21
+ ldr w25, [x19, #0x08]
+ cmp w1, w25
+ bhs G_M58112_IG31
+ ubfiz x27, x1, #3, #32
ldr x2, [x26, x27]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG41
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w1, w15
+ bhs G_M58112_IG31
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
- fabs d8, d16
- add w28, w4, #1
+ fabs d16, d16
+ add w28, w1, #1
sxtw w14, w28
; byrRegs -[x14]
cmp w14, w22
@@ -104,87 +101,90 @@ G_M58112_IG03: ; bbWeight=1.98, gcrefRegs=180000 {x19 x20}, byrefRegs=400
cmp w15, #0
ccmp w25, w22, nc, ge
blt G_M58112_IG08
- ;; size=72 bbWeight=1.98 PerfScore 39.60
-G_M58112_IG04: ; bbWeight=15.68, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
- ; gcrRegs -[x5]
- ldr x6, [x26, w14, UXTW #3]
- ; gcrRegs +[x6]
- ldr w15, [x6, #0x08]
- cmp w21, w15
- bhs G_M58112_IG41
- add x6, x6, #16
- ; gcrRegs -[x6]
- ; byrRegs +[x6]
- ldr d16, [x6, x27]
- fabs d9, d16
- fcmp d9, d8
+ ;; size=84 bbWeight=2 PerfScore 49.00
+G_M58112_IG04: ; bbWeight=15.84, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ldr x15, [x26, w14, UXTW #3]
+ ; gcrRegs +[x15]
+ ldr w12, [x15, #0x08]
+ cmp w21, w12
+ bhs G_M58112_IG31
+ add x15, x15, #16
+ ; gcrRegs -[x15]
+ ; byrRegs +[x15]
+ ldr d17, [x15, x27]
+ fabs d17, d17
+ fcmp d17, d16
ble G_M58112_IG06
- ;; size=36 bbWeight=15.68 PerfScore 235.22
-G_M58112_IG05: ; bbWeight=7.84, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
- ; byrRegs -[x6]
- sxtw w4, w14
- fmov d8, d9
- ;; size=8 bbWeight=7.84 PerfScore 7.84
-G_M58112_IG06: ; bbWeight=15.68, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ;; size=36 bbWeight=15.84 PerfScore 237.60
+G_M58112_IG05: ; bbWeight=7.92, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
+ ; byrRegs -[x15]
+ sxtw w1, w14
+ fmov d16, d17
+ ;; size=8 bbWeight=7.92 PerfScore 7.92
+G_M58112_IG06: ; bbWeight=15.84, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
add w14, w14, #1
cmp w14, w22
blt G_M58112_IG04
- ;; size=12 bbWeight=15.68 PerfScore 31.36
-G_M58112_IG07: ; bbWeight=1.98, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
+ ;; size=12 bbWeight=15.84 PerfScore 31.68
+G_M58112_IG07: ; bbWeight=2, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
b G_M58112_IG11
- ;; size=4 bbWeight=1.98 PerfScore 1.98
+ ;; size=4 bbWeight=2 PerfScore 2.00
G_M58112_IG08: ; bbWeight=0.16, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
cmp w14, w25
- bhs G_M58112_IG41
- ldr x6, [x26, w14, UXTW #3]
- ; gcrRegs +[x6]
- ldr w15, [x6, #0x08]
- cmp w21, w15
- bhs G_M58112_IG41
- add x15, x6, #16
+ bhs G_M58112_IG31
+ ldr x15, [x26, w14, UXTW #3]
+ ; gcrRegs +[x15]
+ ldr w12, [x15, #0x08]
+ cmp w21, w12
+ bhs G_M58112_IG31
+ add x15, x15, #16
+ ; gcrRegs -[x15]
; byrRegs +[x15]
- ldr d16, [x15, x27]
- fabs d9, d16
- fcmp d9, d8
+ ldr d17, [x15, x27]
+ fabs d17, d17
+ fcmp d17, d16
ble G_M58112_IG10
- ;; size=44 bbWeight=0.16 PerfScore 2.61
+ ;; size=44 bbWeight=0.16 PerfScore 2.64
G_M58112_IG09: ; bbWeight=0.08, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
- ; gcrRegs -[x6]
; byrRegs -[x15]
- sxtw w4, w14
- fmov d8, d9
+ sxtw w1, w14
+ fmov d16, d17
;; size=8 bbWeight=0.08 PerfScore 0.08
G_M58112_IG10: ; bbWeight=0.16, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
...
-152 (-14.13%) : 32451.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -10,60 +10,56 @@
; Final local variable assignments
;
; V00 arg0 [V00,T16] ( 7, 10.09) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T13] ( 9, 14.33) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T18] ( 12, 9.10) ref -> x20 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T19] ( 12, 9.10) ref -> x21 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T08] ( 12, 20 ) int -> x19 single-def
-; V05 loc0 [V05,T10] ( 12, 20.08) ref -> x24 class-hnd <double[][]>
-; V06 loc1 [V06,T09] ( 13, 20.32) ref -> x23 class-hnd <double[]>
-; V07 loc2 [V07,T28] ( 2, 2 ) long -> x25
+; V01 arg1 [V01,T13] ( 7, 14.21) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T18] ( 9, 9.08) ref -> x20 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T19] ( 9, 9.08) ref -> x21 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T12] ( 8, 17 ) int -> x19 single-def
+; V05 loc0 [V05,T09] ( 11, 20.08) ref -> x24 class-hnd <double[][]>
+; V06 loc1 [V06,T08] ( 10, 20.20) ref -> x23 class-hnd <double[]>
+; V07 loc2 [V07,T28] ( 2, 2 ) long -> x27
; V08 loc3 [V08,T02] ( 14, 94.16) int -> x2
-; V09 loc4 [V09,T07] ( 11, 27.04) int -> x3
-; V10 loc5 [V10,T00] ( 40,127.84) int -> x22
+; V09 loc4 [V09,T06] ( 6, 30 ) int -> x3
+; V10 loc5 [V10,T00] ( 32,127.52) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T36] ( 6, 64.00) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T01] ( 6, 96 ) ref -> x9 class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V14 tmp3 [V14,T37] ( 4, 64 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V12 tmp1 [V12,T33] ( 4, 64 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T01] ( 6, 96 ) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V14 tmp3 [V14,T34] ( 4, 64 ) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
; V16 tmp5 [V16,T20] ( 6, 10 ) ref -> registers class-hnd exact "Inline stloc first use temp" <<unknown class>>
-; V17 tmp6 [V17 ] ( 4, 8 ) int -> [fp+0x10] do-not-enreg[X] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp"
+; V17 tmp6 [V17 ] ( 4, 8 ) int -> [fp+0x18] do-not-enreg[X] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp"
;* V18 tmp7 [V18 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V19 tmp8 [V19,T03] ( 5, 64.32) ref -> x10 "arr expr"
-; V20 cse0 [V20,T11] ( 4, 20.04) ref -> x8 hoist multi-def "CSE - aggressive"
-; V21 cse1 [V21,T33] ( 2, 0.20) ref -> x5 hoist "CSE - conservative"
-; V22 cse2 [V22,T06] ( 6, 27.92) ref -> x5 multi-def "CSE - aggressive"
-; V23 cse3 [V23,T15] ( 6, 12.12) long -> x4 hoist multi-def "CSE - aggressive"
-; V24 cse4 [V24,T04] ( 3, 47.52) long -> x7 "CSE - aggressive"
-; V25 cse5 [V25,T05] ( 3, 47.04) long -> x4 "CSE - aggressive"
+; V19 tmp8 [V19,T03] ( 5, 64.32) ref -> x13 "arr expr"
+; V20 cse0 [V20,T10] ( 4, 20.04) ref -> x10 hoist multi-def "CSE - aggressive"
+; V21 cse1 [V21,T31] ( 2, 0.20) ref -> x7 hoist "CSE - conservative"
+; V22 cse2 [V22,T07] ( 6, 27.92) ref -> x7 multi-def "CSE - aggressive"
+; V23 cse3 [V23,T15] ( 6, 12.12) long -> x6 hoist multi-def "CSE - aggressive"
+; V24 cse4 [V24,T04] ( 3, 47.52) long -> x6 "CSE - aggressive"
+; V25 cse5 [V25,T05] ( 3, 47.52) long -> x9 "CSE - aggressive"
; V26 cse6 [V26,T17] ( 3, 11.88) long -> x0 "CSE - aggressive"
-; V27 cse7 [V27,T25] ( 3, 5.94) long -> x2 "CSE - aggressive"
-; V28 cse8 [V28,T29] ( 3, 0.48) long -> x4 "CSE - conservative"
-; V29 cse9 [V29,T30] ( 3, 0.48) long -> x6 "CSE - conservative"
-; V30 cse10 [V30,T31] ( 3, 0.48) long -> x4 "CSE - conservative"
-; V31 cse11 [V31,T34] ( 3, 0.12) long -> x0 "CSE - conservative"
-; V32 cse12 [V32,T35] ( 3, 0.06) long -> x2 "CSE - conservative"
-; V33 cse13 [V33,T27] ( 3, 4.05) byref -> x26 hoist "CSE - aggressive"
-; V34 cse14 [V34,T14] ( 4, 16.01) byref -> x25 hoist "CSE - aggressive"
-; V35 cse15 [V35,T24] ( 4, 8.08) int -> x6 hoist multi-def "CSE - aggressive"
-; V36 cse16 [V36,T23] ( 4, 8.08) byref -> x7 hoist multi-def "CSE - aggressive"
-; V37 cse17 [V37,T12] ( 4, 19.84) byref -> x2 hoist multi-def "CSE - aggressive"
-; V38 cse18 [V38,T26] ( 4, 5.04) long -> x26 hoist multi-def "CSE - aggressive"
-; V39 cse19 [V39,T21] ( 8, 9.04) byref -> x27 hoist multi-def "CSE - aggressive"
-; V40 cse20 [V40,T22] ( 8, 9.04) byref -> x28 hoist multi-def "CSE - aggressive"
-; V41 cse21 [V41,T32] ( 2, 0.24) byref -> x2 hoist "CSE - conservative"
+; V27 cse7 [V27,T25] ( 3, 6 ) long -> x2 "CSE - aggressive"
+; V28 cse8 [V28,T29] ( 3, 0.48) long -> x6 "CSE - conservative"
+; V29 cse9 [V29,T30] ( 3, 0.48) long -> x8 "CSE - conservative"
+; V30 cse10 [V30,T32] ( 3, 0.12) long -> x0 "CSE - conservative"
+; V31 cse11 [V31,T27] ( 3, 4.05) byref -> x5 hoist "CSE - aggressive"
+; V32 cse12 [V32,T14] ( 3, 16.01) byref -> x4 hoist "CSE - aggressive"
+; V33 cse13 [V33,T24] ( 4, 8.08) int -> x8 hoist multi-def "CSE - aggressive"
+; V34 cse14 [V34,T23] ( 4, 8.08) byref -> x9 hoist multi-def "CSE - aggressive"
+; V35 cse15 [V35,T11] ( 4, 20.04) byref -> x2 hoist multi-def "CSE - aggressive"
+; V36 cse16 [V36,T26] ( 4, 5.04) long -> x28 hoist multi-def "CSE - aggressive"
+; V37 cse17 [V37,T21] ( 6, 9.04) byref -> x25 hoist multi-def "CSE - aggressive"
+; V38 cse18 [V38,T22] ( 6, 9.04) byref -> x26 hoist multi-def "CSE - aggressive"
;
-; Lcl frame size = 8
+; Lcl frame size = 16
G_M9806_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
stp fp, lr, [sp, #-0x70]!
- str d8, [sp, #0x18]
stp x19, x20, [sp, #0x20]
stp x21, x22, [sp, #0x30]
stp x23, x24, [sp, #0x40]
stp x25, x26, [sp, #0x50]
stp x27, x28, [sp, #0x60]
mov fp, sp
- str xzr, [fp, #0x10] // [V17 tmp6]
+ str xzr, [fp, #0x18] // [V17 tmp6]
ldp x1, x0, [fp, #0xE0]
; gcrRegs +[x0-x1]
ldp x21, x20, [fp, #0xD0]
@@ -73,35 +69,41 @@ G_M9806_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byre
; gcrRegs +[x23-x24]
ldp w3, w2, [fp, #0xA8]
ldr w22, [fp, #0xA4]
- ;; size=60 bbWeight=0.01 PerfScore 0.23
+ ;; size=56 bbWeight=0.01 PerfScore 0.22
G_M9806_IG02: ; bbWeight=0.01, gcrefRegs=1B00003 {x0 x1 x20 x21 x23 x24}, byrefRegs=0000 {}, byref
- add x25, x1, #16
- ; byrRegs +[x25]
- add x26, x0, #16
- ; byrRegs +[x26]
- b G_M9806_IG27
+ add x4, x1, #16
+ ; byrRegs +[x4]
+ add x5, x0, #16
+ ; byrRegs +[x5]
+ b G_M9806_IG22
;; size=12 bbWeight=0.01 PerfScore 0.02
-G_M9806_IG03: ; bbWeight=1.98, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref
+G_M9806_IG03: ; bbWeight=2, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0030 {x4 x5}, byref, isz
; gcrRegs -[x23-x24]
- add x27, x20, #16
- ; byrRegs +[x27]
+ ldr w2, [x20, #0x08]
+ cmp w3, w2
+ bhs G_M9806_IG30
+ add x25, x20, #16
+ ; byrRegs +[x25]
ubfiz x2, x3, #3, #32
- ldr x24, [x27, x2]
+ ldr x24, [x25, x2]
; gcrRegs +[x24]
- add x28, x21, #16
- ; byrRegs +[x28]
- ldr x23, [x28, x2]
+ ldr w6, [x21, #0x08]
+ cmp w3, w6
+ bhs G_M9806_IG30
+ add x26, x21, #16
+ ; byrRegs +[x26]
+ ldr x23, [x26, x2]
; gcrRegs +[x23]
mov w22, wzr
- b G_M9806_IG26
- ;; size=28 bbWeight=1.98 PerfScore 18.81
-G_M9806_IG04: ; bbWeight=7.92, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000000 {x25 x26}, byref, isz
+ b G_M9806_IG21
+ ;; size=52 bbWeight=2 PerfScore 37.00
+G_M9806_IG04: ; bbWeight=8, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0030 {x4 x5}, byref, isz
; gcrRegs -[x24]
- ; byrRegs -[x27-x28]
+ ; byrRegs -[x25-x26]
mov w22, wzr
cbz x1, G_M9806_IG08
- ;; size=8 bbWeight=7.92 PerfScore 11.88
-G_M9806_IG05: ; bbWeight=3.96, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000000 {x25 x26}, byref, isz
+ ;; size=8 bbWeight=8 PerfScore 12.00
+G_M9806_IG05: ; bbWeight=4, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0030 {x4 x5}, byref, isz
cbz x23, G_M9806_IG08
ldr w2, [x1, #0x08]
cmp w2, #101
@@ -111,143 +113,88 @@ G_M9806_IG05: ; bbWeight=3.96, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byre
blt G_M9806_IG08
add x2, x23, #16
; byrRegs +[x2]
- ;; size=32 bbWeight=3.96 PerfScore 41.58
-G_M9806_IG06: ; bbWeight=15.68, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000004 {x2 x25 x26}, byref, isz
+ ;; size=32 bbWeight=4 PerfScore 42.00
+G_M9806_IG06: ; bbWeight=15.84, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0034 {x2 x4 x5}, byref, isz
; gcrRegs -[x23]
- ubfiz x4, x22, #3, #32
- ldr d8, [x25, x4]
- str d8, [x2, x4]
+ ubfiz x6, x22, #3, #32
+ ldr d16, [x4, x6]
+ str d16, [x2, x6]
add w22, w22, #1
cmp w22, #101
blt G_M9806_IG06
- ;; size=24 bbWeight=15.68 PerfScore 109.77
-G_M9806_IG07: ; bbWeight=3.96, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref
+ ;; size=24 bbWeight=15.84 PerfScore 110.88
+G_M9806_IG07: ; bbWeight=4, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0030 {x4 x5}, byref
; byrRegs -[x2]
b G_M9806_IG10
- ;; size=4 bbWeight=3.96 PerfScore 3.96
-G_M9806_IG08: ; bbWeight=0.04, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000000 {x25 x26}, byref
+ ;; size=4 bbWeight=4 PerfScore 4.00
+G_M9806_IG08: ; bbWeight=0.04, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0030 {x4 x5}, byref
; gcrRegs +[x23]
ldr wzr, [x1, #0x08]
add x2, x23, #16
; byrRegs +[x2]
;; size=8 bbWeight=0.04 PerfScore 0.14
-G_M9806_IG09: ; bbWeight=0.16, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000004 {x2 x25 x26}, byref, isz
- ldr w4, [x1, #0x08]
- cmp w22, w4
- bhs G_M9806_IG35
- ubfiz x4, x22, #3, #32
- ldr d8, [x25, x4]
- ldr w5, [x23, #0x08]
- cmp w22, w5
- bhs G_M9806_IG35
- str d8, [x2, x4]
+G_M9806_IG09: ; bbWeight=0.16, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0034 {x2 x4 x5}, byref, isz
+ ldr w6, [x1, #0x08]
+ cmp w22, w6
+ bhs G_M9806_IG30
+ ubfiz x6, x22, #3, #32
+ ldr d16, [x4, x6]
+ ldr w7, [x23, #0x08]
+ cmp w22, w7
+ bhs G_M9806_IG30
+ str d16, [x2, x6]
add w22, w22, #1
cmp w22, #101
blt G_M9806_IG09
- ;; size=48 bbWeight=0.16 PerfScore 2.53
-G_M9806_IG10: ; bbWeight=7.92, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref, isz
+ ;; size=48 bbWeight=0.16 PerfScore 2.56
+G_M9806_IG10: ; bbWeight=8, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0030 {x4 x5}, byref, isz
; gcrRegs -[x23]
; byrRegs -[x2]
add w3, w3, #1
cmp w3, w19
blt G_M9806_IG03
- ;; size=12 bbWeight=7.92 PerfScore 15.84
-G_M9806_IG11: ; bbWeight=1, gcrefRegs=300000 {x20 x21}, byrefRegs=0000 {}, byref
+ ;; size=12 bbWeight=8 PerfScore 16.00
+G_M9806_IG11: ; bbWeight=1, gcrefRegs=300000 {x20 x21}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x0-x1]
- ; byrRegs -[x25-x26]
- b G_M9806_IG16
- ;; size=4 bbWeight=1 PerfScore 1.00
-G_M9806_IG12: ; bbWeight=0.02, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref, isz
- ; gcrRegs +[x0-x1]
- ; byrRegs +[x25-x26]
- ldr w2, [x20, #0x08]
- cmp w3, w2
- bhs G_M9806_IG35
- add x27, x20, #16
- ; byrRegs +[x27]
- ubfiz x2, x3, #3, #32
- ldr x24, [x27, x2]
- ; gcrRegs +[x24]
- ldr w4, [x21, #0x08]
- cmp w3, w4
- bhs G_M9806_IG35
- add x28, x21, #16
- ; byrRegs +[x28]
- ldr x23, [x28, x2]
- ; gcrRegs +[x23]
- mov w22, wzr
- b G_M9806_IG26
- ;; size=52 bbWeight=0.02 PerfScore 0.37
...
-56 (-6.97%) : 43024.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -9,16 +9,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T08] ( 15, 12.06) ref -> x19 class-hnd single-def <float[][]>
+; V00 arg0 [V00,T08] ( 12, 12.04) ref -> x19 class-hnd single-def <float[][]>
; V01 arg1 [V01,T09] ( 9, 12.04) ref -> x20 class-hnd single-def <int[][]>
; V02 arg2 [V02,T21] ( 3, 3 ) ref -> x23 class-hnd single-def <double[]>
; V03 arg3 [V03,T20] ( 4, 6 ) ref -> x22 class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T10] ( 5, 12 ) int -> x21 single-def
+; V04 arg4 [V04,T10] ( 4, 12 ) int -> x21 single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T03] ( 17, 37.52) int -> x25
-; V08 loc3 [V08,T16] ( 6, 10 ) ref -> x27 class-hnd <float[]>
-; V09 loc4 [V09,T00] ( 13, 56 ) int -> x24
+; V07 loc2 [V07,T03] ( 12, 38.50) int -> x25
+; V08 loc3 [V08,T16] ( 5, 10 ) ref -> x27 class-hnd <float[]>
+; V09 loc4 [V09,T00] ( 12, 56 ) int -> x24
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T05] ( 16, 22.58) int -> x26
;* V12 loc7 [V12 ] ( 0, 0 ) float -> zero-ref
@@ -40,7 +40,7 @@
; V28 cse2 [V28,T15] ( 10, 10 ) long -> x8 multi-def "CSE - moderate"
; V29 cse3 [V29,T14] ( 4, 11.88) long -> x1 "CSE - aggressive"
; V30 cse4 [V30,T22] ( 4, 0.12) long -> x1 "CSE - conservative"
-; V31 cse5 [V31,T07] ( 9, 17 ) int -> x28 "CSE - aggressive"
+; V31 cse5 [V31,T07] ( 7, 16 ) int -> x28 "CSE - aggressive"
; V32 cse6 [V32,T06] ( 14, 18 ) int -> x5 multi-def "CSE - aggressive"
; TEMP_01 double -> [fp+0x10]
;
@@ -67,50 +67,29 @@ G_M56974_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
ldr w26, [fp, #0x9C]
;; size=60 bbWeight=0.01 PerfScore 0.23
G_M56974_IG02: ; bbWeight=0.01, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
- b G_M56974_IG14
+ b G_M56974_IG11
;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M56974_IG03: ; bbWeight=1.98, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG03: ; bbWeight=2, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x27]
+ ldr w0, [x19, #0x08]
+ cmp w25, w0
+ bhs G_M56974_IG24
add x0, x19, #16
; byrRegs +[x0]
ldr x27, [x0, w25, UXTW #3]
; gcrRegs +[x27]
mov w24, wzr
cmp w21, #0
- bgt G_M56974_IG09
- ;; size=20 bbWeight=1.98 PerfScore 10.89
-G_M56974_IG04: ; bbWeight=7.92, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
+ bgt G_M56974_IG06
+ ;; size=32 bbWeight=2 PerfScore 20.00
+G_M56974_IG04: ; bbWeight=8, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x27]
; byrRegs -[x0]
add w25, w25, #1
cmp w28, w25
bgt G_M56974_IG03
- ;; size=12 bbWeight=7.92 PerfScore 15.84
-G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
- ; gcrRegs -[x19-x20 x22-x23]
- b G_M56974_IG08
- ;; size=4 bbWeight=1 PerfScore 1.00
-G_M56974_IG06: ; bbWeight=0.02, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[x19-x20 x22-x23]
- ldr w0, [x19, #0x08]
- cmp w25, w0
- bhs G_M56974_IG27
- add x0, x19, #16
- ; byrRegs +[x0]
- ldr x27, [x0, w25, UXTW #3]
- ; gcrRegs +[x27]
- mov w24, wzr
- cmp w21, #0
- bgt G_M56974_IG09
- ;; size=32 bbWeight=0.02 PerfScore 0.20
-G_M56974_IG07: ; bbWeight=0.08, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[x27]
- ; byrRegs -[x0]
- add w25, w25, #1
- cmp w28, w25
- bgt G_M56974_IG06
- ;; size=12 bbWeight=0.08 PerfScore 0.16
-G_M56974_IG08: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
+ ;; size=12 bbWeight=8 PerfScore 16.00
+G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
; gcrRegs -[x19-x20 x22-x23]
ldp x27, x28, [sp, #0x60]
ldp x25, x26, [sp, #0x50]
@@ -122,60 +101,55 @@ G_M56974_IG08: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
add sp, sp, #112
ret lr
;; size=36 bbWeight=1 PerfScore 9.50
-G_M56974_IG09: ; bbWeight=2, gcVars=0000000000000000 {}, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M56974_IG06: ; bbWeight=2, gcVars=0000000000000000 {}, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, gcvars, byref, isz
; gcrRegs +[x19-x20 x22-x23 x27]
ldr w0, [x20, #0x08]
cmp w25, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x20, #16
; byrRegs +[x0]
ldr x0, [x0, w25, UXTW #3]
; gcrRegs +[x0]
; byrRegs -[x0]
- tbnz w24, #31, G_M56974_IG11
+ tbnz w24, #31, G_M56974_IG08
;; size=24 bbWeight=2 PerfScore 18.00
-G_M56974_IG10: ; bbWeight=16, gcrefRegs=8D80001 {x0 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG07: ; bbWeight=16, gcrefRegs=8D80001 {x0 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x0, #0x08]
; gcrRegs -[x0]
cmp w0, w24
- bgt G_M56974_IG13
+ bgt G_M56974_IG10
;; size=12 bbWeight=16 PerfScore 72.00
-G_M56974_IG11: ; bbWeight=8, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG08: ; bbWeight=8, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
add w24, w24, #1
cmp w24, w21
- blt G_M56974_IG09
+ blt G_M56974_IG06
;; size=12 bbWeight=8 PerfScore 16.00
-G_M56974_IG12: ; bbWeight=1, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG09: ; bbWeight=1, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref
; gcrRegs -[x27]
- cbz x19, G_M56974_IG07
- tbnz w25, #31, G_M56974_IG07
- ldr w0, [x19, #0x08]
- cmp w0, w28
- blt G_M56974_IG07
b G_M56974_IG04
- ;; size=24 bbWeight=1 PerfScore 7.50
-G_M56974_IG13: ; bbWeight=0.50, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
+ ;; size=4 bbWeight=1 PerfScore 1.00
+G_M56974_IG10: ; bbWeight=0.50, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
; gcrRegs +[x27]
add w26, w25, #1
;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M56974_IG14: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG11: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w28, [x23, #0x08]
cmp w28, w26
- ble G_M56974_IG11
- cbz x20, G_M56974_IG21
- cbz x19, G_M56974_IG21
- tbnz w26, #31, G_M56974_IG21
+ ble G_M56974_IG08
+ cbz x20, G_M56974_IG18
+ cbz x19, G_M56974_IG18
+ tbnz w26, #31, G_M56974_IG18
ldr w0, [x20, #0x08]
cmp w0, w28
- blt G_M56974_IG21
+ blt G_M56974_IG18
ldr w0, [x19, #0x08]
cmp w0, w28
- blt G_M56974_IG21
+ blt G_M56974_IG18
;; size=48 bbWeight=1 PerfScore 16.50
-G_M56974_IG15: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG12: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x27, #0x08]
cmp w24, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x27, #16
; byrRegs +[x0]
ldr s16, [x0, w24, UXTW #2]
@@ -205,15 +179,15 @@ G_M56974_IG15: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27},
; gcrRegs +[x4]
add w5, w24, #1
sxtw w6, w5
- tbnz w6, #31, G_M56974_IG18
+ tbnz w6, #31, G_M56974_IG15
;; size=100 bbWeight=3.96 PerfScore 134.64
-G_M56974_IG16: ; bbWeight=15.84, gcrefRegs=8D80018 {x3 x4 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG13: ; bbWeight=15.84, gcrefRegs=8D80018 {x3 x4 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; byrRegs -[x0]
ldr w0, [x4, #0x08]
cmp w0, w6
- ble G_M56974_IG18
+ ble G_M56974_IG15
;; size=12 bbWeight=15.84 PerfScore 71.28
-G_M56974_IG17: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG14: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x4]
add x0, x19, #16
; byrRegs +[x0]
@@ -222,16 +196,16 @@ G_M56974_IG17: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27
ldr w0, [x7, #0x08]
; byrRegs -[x0]
cmp w5, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x7, #16
; byrRegs +[x0]
ubfiz x8, x5, #2, #32
ldr s16, [x0, x8]
fcvt d16, s16
fcmp d16, d8
- ble G_M56974_IG19
+ ble G_M56974_IG16
;; size=44 bbWeight=1.98 PerfScore 34.65
-G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG15: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x7]
; byrRegs -[x0]
add x8, x19, #16
@@ -241,7 +215,7 @@ G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27
; byrRegs -[x8]
ldr w0, [x8, #0x08]
cmp w5, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x8, #16
; byrRegs +[x0]
ubfiz x8, x5, #2, #32
@@ -251,25 +225,25 @@ G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27
ldr w0, [x3, #0x08]
; byrRegs -[x0]
cmp w5, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x3, #16
; byrRegs +[x0]
str w25, [x0, x8]
;; size=56 bbWeight=1.98 PerfScore 38.61
-G_M56974_IG19: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG16: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x3]
; byrRegs -[x0]
add w26, w26, #1
cmp w28, w26
- bgt G_M56974_IG15
+ bgt G_M56974_IG12
;; size=12 bbWeight=3.96 PerfScore 7.92
-G_M56974_IG20: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
- b G_M56974_IG11
+G_M56974_IG17: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
+ b G_M56974_IG08
;; size=4 bbWeight=1 PerfScore 1.00
-G_M56974_IG21: ; bbWeight=0.04, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG18: ; bbWeight=0.04, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x27, #0x08]
cmp w24, w0
- bhs G_M56974_IG27
...
coreclr_tests.run.osx.arm64.checked.mch
-172 (-32.58%) : 504858.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
@@ -10,178 +10,112 @@
; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 9, 5.63) ref -> x19 class-hnd single-def <System.Collections.Generic.List`1[NamedSet][]>
-; V01 loc0 [V01,T07] ( 10, 7.26) int -> x23
-; V02 loc1 [V02,T02] ( 14,123.41) ref -> x22 class-hnd <System.Collections.Generic.List`1[NamedSet]>
-; V03 loc2 [V03,T08] ( 4, 1.55) ubyte -> x20
-; V04 loc3 [V04,T03] ( 18, 74.62) int -> x24
-; V05 loc4 [V05,T01] ( 10,217.24) int -> x21
+; V00 arg0 [V00,T07] ( 5, 5.11) ref -> x19 class-hnd single-def <System.Collections.Generic.List`1[NamedSet][]>
+; V01 loc0 [V01,T06] ( 5, 7.25) int -> x23
+; V02 loc1 [V02,T02] ( 8,123.41) ref -> x22 class-hnd <System.Collections.Generic.List`1[NamedSet]>
+; V03 loc2 [V03,T09] ( 2, 1.55) ubyte -> x21
+; V04 loc3 [V04,T03] ( 9, 74.62) int -> x20
+; V05 loc4 [V05,T01] ( 8,217.24) int -> x21
; V06 loc5 [V06,T00] ( 6,380.63) int -> x20
;# V07 OutArgs [V07 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V08 tmp1 [V08,T04] ( 6, 63.07) ref -> x26 class-hnd "Inlining Arg" <<unknown class>>
-; V09 tmp2 [V09,T05] ( 6, 63.07) ref -> x25 "arr expr"
+; V08 tmp1 [V08,T04] ( 3, 63.07) ref -> x0 class-hnd "Inlining Arg" <<unknown class>>
+; V09 tmp2 [V09,T05] ( 3, 63.07) ref -> x0 "arr expr"
+; V10 cse0 [V10,T08] ( 3, 4.66) int -> x0 hoist multi-def "CSE - aggressive"
;
-; Lcl frame size = 0
+; Lcl frame size = 8
G_M3612_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- stp x19, x20, [sp, #0x10]
- stp x21, x22, [sp, #0x20]
- stp x23, x24, [sp, #0x30]
- stp x25, x26, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldr x19, [fp, #0x88]
+ ldr x19, [fp, #0x78]
; gcrRegs +[x19]
- ldr w23, [fp, #0x84]
- ldr x22, [fp, #0x78]
+ ldr w23, [fp, #0x74]
+ ldr x22, [fp, #0x68]
; gcrRegs +[x22]
- ldp w20, w21, [fp, #0x68]
- ;; size=40 bbWeight=1 PerfScore 13.50
+ ldp w20, w21, [fp, #0x58]
+ ;; size=36 bbWeight=1 PerfScore 12.50
G_M3612_IG02: ; bbWeight=1, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref
- b G_M3612_IG18
+ b G_M3612_IG11
;; size=4 bbWeight=1 PerfScore 1.00
-G_M3612_IG03: ; bbWeight=0.51, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
+G_M3612_IG03: ; bbWeight=0.52, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x22]
+ cmp w23, w0
+ bhs G_M3612_IG15
add x0, x19, #16
; byrRegs +[x0]
ldr x22, [x0, w23, UXTW #3]
; gcrRegs +[x22]
- ;; size=8 bbWeight=0.51 PerfScore 1.80
-G_M3612_IG04: ; bbWeight=0.51, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ ;; size=16 bbWeight=0.52 PerfScore 2.59
+G_M3612_IG04: ; bbWeight=0.52, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
; byrRegs -[x0]
- mov w20, wzr
+ mov w21, wzr
ldr w0, [x22, #0x10]
- sub w24, w0, #2
- tbnz w24, #31, G_M3612_IG06
- ;; size=16 bbWeight=0.51 PerfScore 2.56
-G_M3612_IG05: ; bbWeight=10.41, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ sub w20, w0, #2
+ tbnz w20, #31, G_M3612_IG06
+ ;; size=16 bbWeight=0.52 PerfScore 2.59
+G_M3612_IG05: ; bbWeight=10.51, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
ldr w0, [x22, #0x10]
- cmp w24, w0
- bhs G_M3612_IG25
- ldr x25, [x22, #0x08]
- ; gcrRegs +[x25]
- ldr w0, [x25, #0x08]
- cmp w24, w0
- bhs G_M3612_IG22
- add x0, x25, #16
+ cmp w20, w0
+ bhs G_M3612_IG18
+ ldr x0, [x22, #0x08]
+ ; gcrRegs +[x0]
+ ldr w1, [x0, #0x08]
+ cmp w20, w1
+ bhs G_M3612_IG15
+ add x0, x0, #16
+ ; gcrRegs -[x0]
; byrRegs +[x0]
- ldr x0, [x0, w24, UXTW #3]
+ ldr x0, [x0, w20, UXTW #3]
; gcrRegs +[x0]
; byrRegs -[x0]
- ldr x26, [x0, #0x08]
- ; gcrRegs +[x26]
- ldr w0, [x26, #0x28]
+ ldr x0, [x0, #0x08]
+ ldr w1, [x0, #0x28]
+ ldr w0, [x0, #0x30]
; gcrRegs -[x0]
- ldr w1, [x26, #0x30]
- sub w0, w0, w1
+ sub w0, w1, w0
cbz w0, G_M3612_IG04
mov x0, x22
; gcrRegs +[x0]
- mov w1, w24
+ mov w1, w20
movz x2, #0xD1FFAB1E // code for <unknown method>
movk x2, #0xD1FFAB1E LSL #16
movk x2, #1 LSL #32
ldr x2, [x2]
blr x2
- ; gcrRegs -[x0 x25-x26]
- ; gcr arg pop 0
- sub w24, w24, #1
- tbz w24, #31, G_M3612_IG05
- ;; size=92 bbWeight=10.41 PerfScore 353.85
-G_M3612_IG06: ; bbWeight=1.03, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- cbnz w20, G_M3612_IG04
- ;; size=4 bbWeight=1.03 PerfScore 1.03
-G_M3612_IG07: ; bbWeight=0.51, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- ldr w0, [x22, #0x10]
- sub w21, w0, #2
- tbz w21, #31, G_M3612_IG17
- ;; size=12 bbWeight=0.51 PerfScore 2.31
-G_M3612_IG08: ; bbWeight=2.05, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[x22]
- add w23, w23, #1
- ldr w0, [x19, #0x08]
- cmp w0, w23
- ble G_M3612_IG23
- ;; size=16 bbWeight=2.05 PerfScore 10.26
-G_M3612_IG09: ; bbWeight=0.51, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
- b G_M3612_IG03
- ;; size=4 bbWeight=0.51 PerfScore 0.51
-G_M3612_IG10: ; bbWeight=0.01, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
- ldr w0, [x19, #0x08]
- cmp w23, w0
- bhs G_M3612_IG22
- add x0, x19, #16
- ; byrRegs +[x0]
- ldr x22, [x0, w23, UXTW #3]
- ; gcrRegs +[x22]
- ;; size=20 bbWeight=0.01 PerfScore 0.04
-G_M3612_IG11: ; bbWeight=0.01, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- ; byrRegs -[x0]
- mov w20, wzr
- ldr w0, [x22, #0x10]
- sub w24, w0, #2
- tbnz w24, #31, G_M3612_IG13
- ;; size=16 bbWeight=0.01 PerfScore 0.03
-G_M3612_IG12: ; bbWeight=0.11, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- ldr w0, [x22, #0x10]
- cmp w24, w0
- bhs G_M3612_IG25
- ldr x25, [x22, #0x08]
- ; gcrRegs +[x25]
- ldr w0, [x25, #0x08]
- cmp w24, w0
- bhs G_M3612_IG22
- add x0, x25, #16
- ; byrRegs +[x0]
- ldr x0, [x0, w24, UXTW #3]
- ; gcrRegs +[x0]
- ; byrRegs -[x0]
- ldr x26, [x0, #0x08]
- ; gcrRegs +[x26]
- ldr w0, [x26, #0x28]
; gcrRegs -[x0]
- ldr w1, [x26, #0x30]
- sub w0, w0, w1
- cbz w0, G_M3612_IG11
- mov x0, x22
- ; gcrRegs +[x0]
- mov w1, w24
- movz x2, #0xD1FFAB1E // code for <unknown method>
- movk x2, #0xD1FFAB1E LSL #16
- movk x2, #1 LSL #32
- ldr x2, [x2]
- blr x2
- ; gcrRegs -[x0 x25-x26]
; gcr arg pop 0
- sub w24, w24, #1
- tbz w24, #31, G_M3612_IG12
- ;; size=92 bbWeight=0.11 PerfScore 3.57
-G_M3612_IG13: ; bbWeight=0.01, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- cbnz w20, G_M3612_IG11
- ;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M3612_IG14: ; bbWeight=0.01, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ sub w20, w20, #1
+ tbz w20, #31, G_M3612_IG05
+ ;; size=92 bbWeight=10.51 PerfScore 357.42
+G_M3612_IG06: ; bbWeight=1.04, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ cbnz w21, G_M3612_IG04
+ ;; size=4 bbWeight=1.04 PerfScore 1.04
+G_M3612_IG07: ; bbWeight=0.52, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
ldr w0, [x22, #0x10]
sub w21, w0, #2
- tbz w21, #31, G_M3612_IG17
- ;; size=12 bbWeight=0.01 PerfScore 0.02
-G_M3612_IG15: ; bbWeight=0.02, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
+ tbz w21, #31, G_M3612_IG10
+ ;; size=12 bbWeight=0.52 PerfScore 2.33
+G_M3612_IG08: ; bbWeight=2.07, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x22]
add w23, w23, #1
ldr w0, [x19, #0x08]
cmp w0, w23
- ble G_M3612_IG23
- ;; size=16 bbWeight=0.02 PerfScore 0.10
-G_M3612_IG16: ; bbWeight=0.01, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
- b G_M3612_IG10
- ;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M3612_IG17: ; bbWeight=9.68, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref
+ ble G_M3612_IG16
+ ;; size=16 bbWeight=2.07 PerfScore 10.36
+G_M3612_IG09: ; bbWeight=0.52, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
+ b G_M3612_IG03
+ ;; size=4 bbWeight=0.52 PerfScore 0.52
+G_M3612_IG10: ; bbWeight=9.68, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref
; gcrRegs +[x22]
sub w20, w21, #1
;; size=4 bbWeight=9.68 PerfScore 4.84
-G_M3612_IG18: ; bbWeight=9.68, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- tbnz w20, #31, G_M3612_IG20
+G_M3612_IG11: ; bbWeight=9.68, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ tbnz w20, #31, G_M3612_IG13
;; size=4 bbWeight=9.68 PerfScore 9.68
-G_M3612_IG19: ; bbWeight=90.32, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+G_M3612_IG12: ; bbWeight=90.32, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
mov x0, x22
; gcrRegs +[x0]
mov w1, w20
@@ -193,36 +127,33 @@ G_M3612_IG19: ; bbWeight=90.32, gcrefRegs=480000 {x19 x22}, byrefRegs=000
blr x3
; gcrRegs -[x0]
; gcr arg pop 0
- cbnz w0, G_M3612_IG24
+ cbnz w0, G_M3612_IG17
sub w20, w20, #1
...
-460 (-31.94%) : 464210.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,141 +10,140 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 20, 5.11) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T17] ( 7, 2.01) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T06] ( 13, 5.10) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T17] ( 4, 2.02) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T03] ( 6,102.99) int -> x21
-; V03 loc1 [V03,T18] ( 19, 3.13) int -> x23
-; V04 loc2 [V04,T33] ( 7, 0.02) int -> x24
-; V05 loc3 [V05,T07] ( 30, 6.16) int -> x22
-; V06 loc4 [V06,T23] ( 22, 0.17) int -> x4
-; V07 loc5 [V07,T41] ( 8, 1.11) double -> d8
-; V08 loc6 [V08,T15] ( 22, 4.21) int -> x6
-; V09 loc7 [V09,T40] ( 9, 2.12) double -> d9
-; V10 loc8 [V10,T34] ( 4, 0.02) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T42] ( 5, 1.03) double -> d10
-; V12 loc10 [V12,T16] ( 19, 4.13) int -> x4
-; V13 loc11 [V13,T13] ( 9, 5.06) int -> x3
+; V03 loc1 [V03,T18] ( 13, 3.13) int -> x23
+; V04 loc2 [V04,T33] ( 2, 0.02) int -> x24
+; V05 loc3 [V05,T07] ( 18, 6.17) int -> x22
+; V06 loc4 [V06,T23] ( 12, 0.19) int -> x3
+; V07 loc5 [V07,T36] ( 5, 1.11) double -> d8
+; V08 loc6 [V08,T15] ( 14, 4.20) int -> x4
+; V09 loc7 [V09,T35] ( 6, 2.12) double -> d9
+; V10 loc8 [V10,T32] ( 2, 0.02) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T37] ( 3, 1.03) double -> d16
+; V12 loc10 [V12,T16] ( 12, 4.12) int -> x0
+; V13 loc11 [V13,T13] ( 7, 5.06) int -> x3
; V14 loc12 [V14,T11] ( 8, 6.04) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T14] ( 6, 5.00) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T39] ( 3,100 ) double -> d16
+; V16 loc14 [V16,T34] ( 3,100 ) double -> d16
; V17 loc15 [V17,T01] ( 13,400.96) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T08] ( 9, 6.11) byref -> x6 "dup spill"
-; V20 tmp2 [V20,T27] ( 4, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V19 tmp1 [V19,T08] ( 6, 6.11) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T28] ( 2, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V21 tmp3 [V21,T00] ( 6,593.95) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T24] ( 6, 0.06) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T09] ( 9, 6.11) ref -> registers "arr expr"
-; V25 tmp7 [V25,T25] ( 6, 0.06) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T26] ( 6, 0.06) ref -> x3 "arr expr"
-; V27 tmp9 [V27,T10] ( 9, 6.11) ref -> x5 "arr expr"
+; V23 tmp5 [V23,T24] ( 3, 0.06) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T09] ( 6, 6.11) ref -> x14 "arr expr"
+; V25 tmp7 [V25,T25] ( 3, 0.06) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T26] ( 3, 0.06) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T10] ( 6, 6.11) ref -> x1 "arr expr"
; V28 cse0 [V28,T29] ( 3, 0.03) ref -> x15 "CSE - conservative"
-; V29 cse1 [V29,T36] ( 3, 0.00) ref -> x15 "CSE - conservative"
-; V30 cse2 [V30,T37] ( 3, 0.00) ref -> x2 "CSE - conservative"
-; V31 cse3 [V31,T30] ( 3, 0.03) ref -> x2 "CSE - conservative"
-; V32 cse4 [V32,T02] ( 3,294.01) long -> x15 "CSE - aggressive"
-; V33 cse5 [V33,T22] ( 11, 2.09) long -> x27 "CSE - aggressive"
-; V34 cse6 [V34,T19] ( 3, 3.02) long -> x14 "CSE - aggressive"
-; V35 cse7 [V35,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
-; V36 cse8 [V36,T32] ( 9, 0.02) long -> x26 "CSE - conservative"
-; V37 cse9 [V37,T04] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T05] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T12] ( 19, 5.10) byref -> x25 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T20] ( 4, 3.00) int -> xip0 hoist multi-def "CSE - moderate"
-; V41 cse13 [V41,T28] ( 4, 0.04) int -> x28 "CSE - conservative"
-; V42 cse14 [V42,T35] ( 4, 0.00) int -> x27 "CSE - conservative"
-; V43 cse15 [V43,T31] ( 3, 0.03) long -> x26 "CSE - conservative"
-; V44 cse16 [V44,T38] ( 3, 0.00) long -> x14 "CSE - conservative"
+; V29 cse1 [V29,T30] ( 3, 0.03) ref -> x2 "CSE - conservative"
+; V30 cse2 [V30,T02] ( 3,294.01) long -> x15 "CSE - aggressive"
+; V31 cse3 [V31,T22] ( 11, 2.11) long -> x27 "CSE - aggressive"
+; V32 cse4 [V32,T19] ( 3, 3.02) long -> x14 "CSE - aggressive"
+; V33 cse5 [V33,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
+; V34 cse6 [V34,T04] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T05] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V36 cse8 [V36,T12] ( 12, 5.10) byref -> x25 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T20] ( 4, 3.00) int -> xip0 hoist multi-def "CSE - moderate"
+; V38 cse10 [V38,T27] ( 4, 0.04) int -> x28 "CSE - conservative"
+; V39 cse11 [V39,T31] ( 3, 0.03) long -> x26 "CSE - conservative"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M58112_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x70]!
+ stp d8, d9, [sp, #0x10]
+ stp x19, x20, [sp, #0x20]
+ stp x21, x22, [sp, #0x30]
+ stp x23, x24, [sp, #0x40]
+ stp x25, x26, [sp, #0x50]
+ stp x27, x28, [sp, #0x60]
mov fp, sp
ldp x20, x19, [fp, #0xD1FFAB1E]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w23, w21, [fp, #0xF8]
+ ldp w22, w24, [fp, #0xF0]
+ ldr w3, [fp, #0xB8]
+ ldp x12, x15, [fp, #0xA8]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=1 PerfScore 28.50
+ ldr d16, [fp, #0xA0]
+ ldr w14, [fp, #0x9C]
+ ;; size=60 bbWeight=1 PerfScore 23.50
G_M58112_IG02: ; bbWeight=1, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
b G_M58112_IG14
;; size=4 bbWeight=1 PerfScore 1.00
G_M58112_IG03: ; bbWeight=0.01, gcrefRegs=180000 {x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x25]
- sxtw w4, w22
- mov w26, w4
+ sxtw w3, w22
+ ldr w14, [x19, #0x08]
+ cmp w3, w14
+ bhs G_M58112_IG35
+ mov w26, w3
lsl x27, x26, #3
ldr x2, [x25, x27]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG53
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w3, w15
+ bhs G_M58112_IG35
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fabs d8, d16
- add w28, w4, #1
- sxtw w6, w28
- cmp w6, w23
+ add w28, w3, #1
+ sxtw w4, w28
+ cmp w4, w23
blt G_M58112_IG05
- ;; size=60 bbWeight=0.01 PerfScore 0.18
+ ;; size=72 bbWeight=0.01 PerfScore 0.23
G_M58112_IG04: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x5]
; byrRegs -[x14]
+ ldr w14, [x20, #0x08]
+ cmp w22, w14
+ bhs G_M58112_IG35
add x14, x20, #16
; byrRegs +[x14]
lsl x15, x26, #2
- str w4, [x14, x15]
+ str w3, [x14, x15]
ldr w14, [x19, #0x08]
; byrRegs -[x14]
- cmp w4, w14
- bhs G_M58112_IG53
- ldr x15, [x25, w4, UXTW #3]
+ cmp w3, w14
+ bhs G_M58112_IG35
+ ldr x15, [x25, w3, UXTW #3]
; gcrRegs +[x15]
- mov x7, x15
- ; gcrRegs +[x7]
- ldr w14, [x7, #0x08]
- cmp w22, w14
- bhs G_M58112_IG53
- add x14, x7, #16
+ mov x14, x15
+ ; gcrRegs +[x14]
+ ldr w12, [x14, #0x08]
+ cmp w22, w12
+ bhs G_M58112_IG35
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fcmp d16, #0.0
- beq G_M58112_IG38
+ beq G_M58112_IG39
b G_M58112_IG22
- ;; size=64 bbWeight=0.01 PerfScore 0.23
+ ;; size=76 bbWeight=0.01 PerfScore 0.28
G_M58112_IG05: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x7 x15]
+ ; gcrRegs -[x15]
; byrRegs -[x14]
- orr w14, w6, w23
+ orr w14, w4, w23
tbz w14, #31, G_M58112_IG08
;; size=8 bbWeight=0.01 PerfScore 0.02
G_M58112_IG06: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
ldr w14, [x19, #0x08]
- cmp w6, w14
- bhs G_M58112_IG53
- ldr x14, [x25, w6, UXTW #3]
+ cmp w4, w14
+ bhs G_M58112_IG35
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG53
+ bhs G_M58112_IG35
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -162,12 +161,12 @@ G_M58112_IG08: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
cmp w14, w23
blt G_M58112_IG06
;; size=12 bbWeight=0.01 PerfScore 0.05
-G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ldr x14, [x25, w6, UXTW #3]
+G_M58112_IG09: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG53
+ bhs G_M58112_IG35
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -175,18 +174,18 @@ G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
fabs d9, d16
fcmp d9, d8
bgt G_M58112_IG12
- ;; size=36 bbWeight=1.00 PerfScore 14.97
-G_M58112_IG10: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ;; size=36 bbWeight=1.01 PerfScore 15.12
...
-156 (-21.67%) : 467494.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,215 +11,169 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.98) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.98) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.98) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.00) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.93) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.93) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.07) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.07) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.04) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.02) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.98) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.97) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.06) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.99) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.98) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.98) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.02) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.98) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.97) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.06) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.99) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.98) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.98) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG07
;; size=8 bbWeight=0.99 PerfScore 1.48
-G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG09
- ldr w6, [x0, #0x08]
- cmp w6, w22
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG09
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG09
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG09
tbnz w2, #31, G_M9806_IG09
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG09
;; size=44 bbWeight=0.98 PerfScore 15.67
-G_M9806_IG05: ; bbWeight=0.98, gcrefRegs=1800AB {x0 x1 x3 x5 x7 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+G_M9806_IG05: ; bbWeight=0.98, gcrefRegs=18012B {x0 x1 x3 x5 x8 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG12
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=20 bbWeight=0.98 PerfScore 7.83
-G_M9806_IG06: ; bbWeight=98.02, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=20 bbWeight=0.98 PerfScore 7.83
+G_M9806_IG06: ; bbWeight=98.02, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG12
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG06
;; size=52 bbWeight=98.02 PerfScore 1323.28
-G_M9806_IG07: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG07: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG22
+ bge G_M9806_IG14
;; size=12 bbWeight=0.99 PerfScore 1.98
-G_M9806_IG08: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG08: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.99 PerfScore 1.48
-G_M9806_IG09: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG09: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG12
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG12
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG12
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG10: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG10: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG12
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
bhs G_M9806_IG12
- add x6, x11, #16
- ; byrRegs +[x6]
...
-156 (-21.67%) : 467510.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,213 +11,167 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.92) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.92) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.92) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.06) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.77) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.77) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.23) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.23) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.15) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.13) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.92) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.89) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.14) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.96) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.92) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.92) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.13) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.92) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.89) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.14) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.96) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.92) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.92) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG06
;; size=8 bbWeight=0.96 PerfScore 1.44
-G_M9806_IG04: ; bbWeight=0.95, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.95, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG08
- ldr w6, [x0, #0x08]
- cmp w6, w22
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG08
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG08
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG08
tbnz w2, #31, G_M9806_IG08
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG08
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=64 bbWeight=0.95 PerfScore 22.86
-G_M9806_IG05: ; bbWeight=98.05, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=64 bbWeight=0.95 PerfScore 22.86
+G_M9806_IG05: ; bbWeight=98.05, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG05
;; size=52 bbWeight=98.05 PerfScore 1323.65
-G_M9806_IG06: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG06: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG21
+ bge G_M9806_IG13
;; size=12 bbWeight=0.96 PerfScore 1.92
-G_M9806_IG07: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG07: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.96 PerfScore 1.44
-G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG11
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG11
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x11, #16
- ; byrRegs +[x6]
- str d16, [x6, x8]
+ add x7, x13, #16
+ ; byrRegs +[x7]
...
libraries.pmi.osx.arm64.checked.mch
-16 (-12.90%) : 134564.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint
@@ -8,10 +8,10 @@
; Final local variable assignments
;
; V00 loc0 [V00,T03] ( 3, 3 ) ref -> x19 class-hnd exact single-def <uint[]>
-; V01 loc1 [V01,T00] ( 7, 49 ) int -> x20
-; V02 loc2 [V02,T01] ( 2, 16 ) int -> x0
+; V01 loc1 [V01,T00] ( 6, 40.60) int -> x20
+; V02 loc2 [V02,T01] ( 2, 15.84) int -> x0
;# V03 OutArgs [V03 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V04 cse0 [V04,T02] ( 2, 9 ) byref -> x21 hoist "CSE - aggressive"
+; V04 cse0 [V04,T02] ( 2, 8.92) byref -> x21 hoist "CSE - aggressive"
;
; Lcl frame size = 8
@@ -34,7 +34,7 @@ G_M39919_IG02: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
add x21, x19, #16
; byrRegs +[x21]
;; size=32 bbWeight=1 PerfScore 4.50
-G_M39919_IG03: ; bbWeight=8, gcrefRegs=80000 {x19}, byrefRegs=200000 {x21}, byref, isz
+G_M39919_IG03: ; bbWeight=7.92, gcrefRegs=80000 {x19}, byrefRegs=200000 {x21}, byref, isz
; gcrRegs -[x0]
mov w0, w20
movz x1, #0xD1FFAB1E // code for Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:CalcEntry(uint):uint
@@ -42,13 +42,11 @@ G_M39919_IG03: ; bbWeight=8, gcrefRegs=80000 {x19}, byrefRegs=200000 {x21
movk x1, #1 LSL #32
ldr x1, [x1]
blr x1
- cmp w20, #0xD1FFAB1E
- bhs G_M39919_IG06
str w0, [x21, w20, UXTW #2]
add w20, w20, #1
cmp w20, #255
bls G_M39919_IG03
- ;; size=48 bbWeight=8 PerfScore 84.00
+ ;; size=40 bbWeight=7.92 PerfScore 71.28
G_M39919_IG04: ; bbWeight=1, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
; byrRegs -[x21]
mov x0, x19
@@ -60,13 +58,8 @@ G_M39919_IG05: ; bbWeight=1, epilog, nogc, extend
ldp fp, lr, [sp], #0x30
ret lr
;; size=16 bbWeight=1 PerfScore 5.00
-G_M39919_IG06: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
- ; gcrRegs -[x0 x19]
- bl CORINFO_HELP_RNGCHKFAIL
- brk_unix #0
- ;; size=8 bbWeight=0 PerfScore 0.00
-; Total bytes of code 124, prolog size 16, PerfScore 97.50, instruction count 31, allocated bytes for code 124 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
+; Total bytes of code 108, prolog size 16, PerfScore 84.78, instruction count 27, allocated bytes for code 108 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
; ============================================================
Unwind Info:
@@ -77,7 +70,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 31 (0x0001f) Actual length = 124 (0x00007c)
+ Function Length : 27 (0x0001b) Actual length = 108 (0x00006c)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
libraries_tests.run.osx.arm64.Release.mch
-92 (-2.44%) : 269388.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
@@ -13,13 +13,13 @@
;* V00 this [V00 ] ( 0, 0 ) ref -> zero-ref this class-hnd single-def <System.Globalization.Tests.CompareInfoCompareTests>
;* V01 arg1 [V01 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def <int[]>
; V02 arg2 [V02,T124] ( 3, 2 ) ref -> [fp+0x278] class-hnd single-def tier0-frame <int[]>
-; V03 loc0 [V03,T82] ( 10, 302.43) ref -> [fp+0x270] class-hnd exact tier0-frame <System.Collections.Generic.List`1[ushort]>
+; V03 loc0 [V03,T82] ( 9, 302.43) ref -> [fp+0x270] class-hnd exact tier0-frame <System.Collections.Generic.List`1[ushort]>
;* V04 loc1 [V04 ] ( 0, 0 ) ushort -> zero-ref
;* V05 loc2 [V05 ] ( 0, 0 ) ushort -> zero-ref
-; V06 loc3 [V06,T126] ( 6, 0.15) ref -> [fp+0x260] class-hnd tier0-frame <int[]>
-; V07 loc4 [V07,T125] ( 10, 0.30) int -> x26
-; V08 loc5 [V08,T39] ( 23, 585.70) int -> x21
-; V09 loc6 [V09,T122] ( 9, 16.76) int -> x25
+; V06 loc3 [V06,T127] ( 2, 0.08) ref -> [fp+0x260] class-hnd tier0-frame <int[]>
+; V07 loc4 [V07,T125] ( 5, 0.19) int -> x26
+; V08 loc5 [V08,T39] ( 22, 585.70) int -> x21
+; V09 loc6 [V09,T122] ( 8, 16.76) int -> x25
; V10 loc7 [V10,T85] ( 4, 200 ) ushort -> x23
; V11 loc8 [V11,T86] ( 3, 197.61) ushort -> x24
; V12 loc9 [V12,T38] ( 8, 590.44) int -> x20
@@ -28,13 +28,13 @@
; V15 loc12 [V15,T99] ( 2, 195.22) int -> x19
; V16 loc13 [V16,T100] ( 2, 195.22) int -> x22
; V17 loc14 [V17 ] ( 73, 5856.25) struct (40) [fp+0x210] do-not-enreg[XS] addr-exposed ld-addr-op tier0-frame <System.Runtime.CompilerServices.DefaultInterpolatedStringHandler>
-; V18 loc15 [V18,T129] ( 3, 0 ) ref -> x19 class-hnd <int[]>
-; V19 loc16 [V19,T128] ( 5, 0 ) int -> x20
+; V18 loc15 [V18,T130] ( 3, 0 ) ref -> x19 class-hnd <int[]>
+; V19 loc16 [V19,T129] ( 5, 0 ) int -> x20
;* V20 loc17 [V20 ] ( 0, 0 ) ref -> zero-ref class-hnd exact <<unknown class>>
;# V21 OutArgs [V21 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V22 tmp1 [V22 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Collections.Generic.List`1[ushort]>
-; V23 tmp2 [V23,T127] ( 7, 0 ) ref -> x21 class-hnd exact "NewObj constructor temp" <<unknown class>>
-; V24 tmp3 [V24,T130] ( 3, 0 ) ref -> x23 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V23 tmp2 [V23,T128] ( 7, 0 ) ref -> x21 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V24 tmp3 [V24,T131] ( 3, 0 ) ref -> x23 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V25 tmp4 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
;* V26 tmp5 [V26 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V27 tmp6 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
@@ -45,8 +45,8 @@
; V32 tmp11 [V32,T41] ( 3, 585.66) ref -> [fp+0xA8] class-hnd exact spill-single-def "Inlining Arg" <System.Globalization.CompareInfo>
;* V33 tmp12 [V33 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt" <System.ReadOnlySpan`1[ushort]>
;* V34 tmp13 [V34 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.ReadOnlySpan`1[ushort]>
-; V35 tmp14 [V35,T131] ( 3, 0 ) int -> x4 "Inline stloc first use temp"
-; V36 tmp15 [V36,T132] ( 3, 0 ) int -> x4
+; V35 tmp14 [V35,T132] ( 3, 0 ) int -> x4 "Inline stloc first use temp"
+; V36 tmp15 [V36,T133] ( 3, 0 ) int -> x4
;* V37 tmp16 [V37 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.ReadOnlySpan`1[ushort]>
;* V38 tmp17 [V38 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline ldloca(s) first use temp" <System.ReadOnlySpan`1[ushort]>
; V39 tmp18 [V39,T09] ( 2, 6247.07) int -> x4 "Inlining Arg"
@@ -107,8 +107,8 @@
; V94 tmp73 [V94,T42] ( 3, 585.66) ref -> x22 class-hnd exact "Inlining Arg" <System.Globalization.CompareInfo>
;* V95 tmp74 [V95 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt" <System.ReadOnlySpan`1[ushort]>
;* V96 tmp75 [V96 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.ReadOnlySpan`1[ushort]>
-; V97 tmp76 [V97,T133] ( 3, 0 ) int -> x4 "Inline stloc first use temp"
-; V98 tmp77 [V98,T134] ( 3, 0 ) int -> x4
+; V97 tmp76 [V97,T134] ( 3, 0 ) int -> x4 "Inline stloc first use temp"
+; V98 tmp77 [V98,T135] ( 3, 0 ) int -> x4
;* V99 tmp78 [V99 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.ReadOnlySpan`1[ushort]>
;* V100 tmp79 [V100 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline ldloca(s) first use temp" <System.ReadOnlySpan`1[ushort]>
; V101 tmp80 [V101,T11] ( 2, 6247.07) int -> x27 "Inlining Arg"
@@ -855,8 +855,9 @@
;* V842 tmp821 [V842 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
; V843 tmp822 [V843,T65] ( 2, 390.44) ref -> x1 "argument with side effect"
; V844 cse0 [V844,T83] ( 9, 292.83) int -> [fp+0xBC] multi-def "CSE - conservative"
-; V845 cse1 [V845,T00] ( 30,103076.73) ref -> x0 multi-def "CSE - aggressive"
-; V846 cse2 [V846,T52] ( 10, 488.05) ref -> [fp+0x60] multi-def "CSE - moderate"
+; V845 cse1 [V845,T126] ( 3, 0.11) int -> x0 "CSE - conservative"
+; V846 cse2 [V846,T00] ( 30,103076.73) ref -> x0 multi-def "CSE - aggressive"
+; V847 cse3 [V847,T52] ( 10, 488.05) ref -> [fp+0x60] multi-def "CSE - moderate"
;
; Lcl frame size = 288
@@ -882,7 +883,7 @@ G_M28013_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
ldr w24, [fp, #0xD1FFAB1E]
ldr w20, [fp, #0xD1FFAB1E]
;; size=76 bbWeight=1 PerfScore 24.50
-G_M28013_IG02: ; bbWeight=1, gcVars=000000000000000050000000000000000000000000000000 {V02 V06}, gcrefRegs=400000 {x22}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG02: ; bbWeight=1, gcVars=000000000000000090000000000000000000000000000000 {V02 V06}, gcrefRegs=400000 {x22}, byrefRegs=0000 {}, gcvars, byref
; GC ptr vars +{V02 V06 V124}
add x0, fp, #32 // [V516 PInvokeFrame+0x08]
mov x1, x12
@@ -894,19 +895,19 @@ G_M28013_IG02: ; bbWeight=1, gcVars=0000000000000000500000000000000000000
str x0, [fp, #0x50] // [V516 PInvokeFrame+0x38]
b G_M28013_IG04
;; size=36 bbWeight=1 PerfScore 6.50
-G_M28013_IG03: ; bbWeight=2.39, gcVars=000000000000000050000000000400000000000000000000 {V02 V03 V06}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG03: ; bbWeight=2.39, gcVars=000000000000000090000000000400000000000000000000 {V02 V03 V06}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, isz
; gcrRegs -[x22]
; GC ptr vars -{V124} +{V03}
ldr x22, [fp, #0xD1FFAB1E] // [V03 loc0]
; gcrRegs +[x22]
ldr w0, [x22, #0x10]
cmp w25, w0
- bhs G_M28013_IG101
+ bhs G_M28013_IG70
ldr x0, [x22, #0x08]
; gcrRegs +[x0]
ldr w1, [x0, #0x08]
cmp w25, w1
- bhs G_M28013_IG73
+ bhs G_M28013_IG77
add x0, x0, #16
; gcrRegs -[x0]
; byrRegs +[x0]
@@ -916,7 +917,7 @@ G_M28013_IG03: ; bbWeight=2.39, gcVars=0000000000000000500000000004000000
uxth w24, w0
sxtw w20, w25
;; size=52 bbWeight=2.39 PerfScore 45.40
-G_M28013_IG04: ; bbWeight=2.39, gcVars=000000000000000050000000000000000000000000000000 {V02 V06}, gcrefRegs=400000 {x22}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG04: ; bbWeight=2.39, gcVars=000000000000000090000000000000000000000000000000 {V02 V06}, gcrefRegs=400000 {x22}, byrefRegs=0000 {}, gcvars, byref, isz
; GC ptr vars -{V03}
mov x0, x22
; gcrRegs +[x0]
@@ -929,19 +930,19 @@ G_M28013_IG04: ; bbWeight=2.39, gcVars=0000000000000000500000000000000000
; gcrRegs -[x0]
; gcr arg pop 0
cmp w0, w20
- ble G_M28013_IG62
+ ble G_M28013_IG60
;; size=36 bbWeight=2.39 PerfScore 25.09
G_M28013_IG05: ; bbWeight=97.61, gcrefRegs=400000 {x22}, byrefRegs=0000 {}, byref, isz
ldr w0, [x22, #0x10]
cmp w20, w0
- bhs G_M28013_IG101
+ bhs G_M28013_IG70
str x22, [fp, #0xD1FFAB1E] // [V03 loc0]
; GC ptr vars +{V03}
ldr x0, [x22, #0x08]
; gcrRegs +[x0]
ldr w1, [x0, #0x08]
cmp w20, w1
- bhs G_M28013_IG73
+ bhs G_M28013_IG77
add x0, x0, #16
; gcrRegs -[x0]
; byrRegs +[x0]
@@ -976,8 +977,8 @@ G_M28013_IG05: ; bbWeight=97.61, gcrefRegs=400000 {x22}, byrefRegs=0000 {
ldrsb wzr, [x2]
ldr x1, [fp, #0xB0] // [V30 tmp9]
; gcrRegs +[x1]
- cbz x1, G_M28013_IG74
- cbz x0, G_M28013_IG77
+ cbz x1, G_M28013_IG78
+ cbz x0, G_M28013_IG81
;; size=124 bbWeight=97.61 PerfScore 3953.23
G_M28013_IG06: ; bbWeight=1561.77, gcrefRegs=0003 {x0 x1}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x2]
@@ -999,16 +1000,16 @@ G_M28013_IG06: ; bbWeight=1561.77, gcrefRegs=0003 {x0 x1}, byrefRegs=0000
; GC ptr vars +{V525}
str w5, [fp, #0xC4] // [V526 tmp505]
cmp w3, w5
- beq G_M28013_IG65
+ beq G_M28013_IG63
;; size=48 bbWeight=1561.77 PerfScore 21083.88
-G_M28013_IG07: ; bbWeight=97.61, gcVars=000000000000000050000000000400000000020006000000 {V02 V03 V06 V32 V517 V525}, gcrefRegs=0000 {}, byrefRegs=0012 {x1 x4}, gcvars, byref, isz
+G_M28013_IG07: ; bbWeight=97.61, gcVars=000000000000000090000000000400000000020006000000 {V02 V03 V06 V32 V517 V525}, gcrefRegs=0000 {}, byrefRegs=0012 {x1 x4}, gcvars, byref, isz
; gcrRegs -[x0]
; GC ptr vars -{V03 V30}
movz w0, #0xD1FFAB1E
movk w0, #0xD1FFAB1E LSL #16
and w6, w21, w0
str w6, [fp, #0xBC] // [V844 cse0]
- cbnz w6, G_M28013_IG78
+ cbnz w6, G_M28013_IG82
mov w0, #0xD1FFAB1E
tst w21, w0
beq G_M28013_IG09
@@ -1052,7 +1053,7 @@ G_M28013_IG09: ; bbWeight=97.61, gcrefRegs=0000 {}, byrefRegs=0000 {}, by
str x6, [x28, #0x10]
strb wzr, [x28, #0x0C]
;; size=68 bbWeight=97.61 PerfScore 1952.21
-G_M28013_IG10: ; bbWeight=97.61, gcVars=000000000000000050000000000400000000000000000000 {V02 V03 V06}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG10: ; bbWeight=97.61, gcVars=000000000000000090000000000400000000000000000000 {V02 V03 V06}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[x1 x3 x6]
; GC ptr vars -{V32 V517 V525} +{V03}
movz x6, #0xD1FFAB1E
@@ -1103,8 +1104,8 @@ G_M28013_IG14: ; bbWeight=97.61, gcrefRegs=0000 {}, byrefRegs=0000 {}, by
; gcrRegs +[x0]
; gcr arg pop 0
ldrsb wzr, [x22]
- cbz x27, G_M28013_IG64
- cbz x0, G_M28013_IG91
+ cbz x27, G_M28013_IG62
+ cbz x0, G_M28013_IG95
;; size=56 bbWeight=97.61 PerfScore 1512.96
G_M28013_IG15: ; bbWeight=1561.77, gcrefRegs=8400001 {x0 x22 x27}, byrefRegs=0000 {}, byref, isz
add x2, x27, #12
@@ -1121,12 +1122,12 @@ G_M28013_IG15: ; bbWeight=1561.77, gcrefRegs=8400001 {x0 x22 x27}, byrefR
; GC ptr vars +{V583}
str w3, [fp, #0xC0] // [V584 tmp563]
cmp w27, w3
- beq G_M28013_IG63
+ beq G_M28013_IG61
;; size=40 bbWeight=1561.77 PerfScore 18741.22
-G_M28013_IG16: ; bbWeight=97.61, gcVars=000000000000000050000000000400000000000018000000 {V02 V03 V06 V575 V583}, gcrefRegs=400000 {x22}, byrefRegs=0006 {x1 x2}, gcvars, byref, isz
+G_M28013_IG16: ; bbWeight=97.61, gcVars=000000000000000090000000000400000000000018000000 {V02 V03 V06 V575 V583}, gcrefRegs=400000 {x22}, byrefRegs=0006 {x1 x2}, gcvars, byref, isz
; gcrRegs -[x0]
ldr w4, [fp, #0xBC] // [V844 cse0]
- cbnz w4, G_M28013_IG82
+ cbnz w4, G_M28013_IG86
mov w0, #0xD1FFAB1E
tst w21, w0
beq G_M28013_IG18
@@ -1168,7 +1169,7 @@ G_M28013_IG18: ; bbWeight=97.61, gcrefRegs=400000 {x22}, byrefRegs=0000 {
str x6, [x28, #0x10]
strb wzr, [x28, #0x0C]
;; size=68 bbWeight=97.61 PerfScore 1805.79
-G_M28013_IG19: ; bbWeight=97.61, gcVars=000000000000000050000000000400000000000000000000 {V02 V03 V06}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG19: ; bbWeight=97.61, gcVars=000000000000000090000000000400000000000000000000 {V02 V03 V06}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
; gcrRegs -[x22]
; byrRegs -[x1 x3 x6]
; GC ptr vars -{V575 V583}
@@ -1213,7 +1214,7 @@ G_M28013_IG23: ; bbWeight=97.61, gcrefRegs=0000 {}, byrefRegs=0000 {}, by
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG103
+ bhi G_M28013_IG72
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -1242,7 +1243,7 @@ G_M28013_IG24: ; bbWeight=1561.77, gcrefRegs=0000 {}, byrefRegs=8000000 {
G_M28013_IG25: ; bbWeight=97.61, gcrefRegs=0000 {}, byrefRegs=8000000 {x27}, byref, isz
ldr w0, [fp, #0xD1FFAB1E] // [V156 tmp135]
cmp w0, #15
- blo G_M28013_IG66
+ blo G_M28013_IG64
;; size=12 bbWeight=97.61 PerfScore 341.64
G_M28013_IG26: ; bbWeight=97.23, gcrefRegs=0000 {}, byrefRegs=8000000 {x27}, byref
movz x0, #0xD1FFAB1E
@@ -1260,13 +1261,13 @@ G_M28013_IG27: ; bbWeight=97.61, gcrefRegs=0000 {}, byrefRegs=0000 {}, by
; byrRegs -[x27]
sxtw w27, w23
ldrb w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x14]
- cbnz w0, G_M28013_IG84
+ cbnz w0, G_M28013_IG88
;; size=12 bbWeight=97.61 PerfScore 341.64
G_M28013_IG28: ; bbWeight=97.61, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG103
+ bhi G_M28013_IG72
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -1282,7 +1283,7 @@ G_M28013_IG28: ; bbWeight=97.61, gcrefRegs=0000 {}, byrefRegs=0000 {}, by
str w6, [fp, #0xFC] // [V171 tmp150]
tbz w6, #31, G_M28013_IG30
;; size=52 bbWeight=97.61 PerfScore 1464.16
-G_M28013_IG29: ; bbWeight=6247.07, gcVars=000000000000000050000000000400000200000000000000 {V02 V03 V06 V172}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
...
-56 (-1.69%) : 458233.dasm - System.Text.ValueStringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):this (Tier1)
@@ -14,26 +14,26 @@
; V02 arg2 [V02,T13] ( 5, 7.87) ref -> x20 class-hnd single-def <System.String>
;* V03 arg3 [V03 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def <System.ReadOnlySpan`1[System.Object]>
; V04 loc0 [V04,T50] ( 5, 2.69) ref -> x24 class-hnd single-def <System.ICustomFormatter>
-; V05 loc1 [V05,T00] ( 71, 37.36) int -> x25 ld-addr-op
-; V06 loc2 [V06,T10] ( 35, 10.61) ushort -> registers
+; V05 loc1 [V05,T00] ( 61, 37.36) int -> x25 ld-addr-op
+; V06 loc2 [V06,T10] ( 31, 10.61) ushort -> registers
; V07 loc3 [V07,T33] ( 12, 4.96) int -> [fp+0x7C]
; V08 loc4 [V08,T44] ( 5, 3.37) ubyte -> [fp+0x78]
;* V09 loc5 [V09 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op <System.ReadOnlySpan`1[ushort]>
; V10 loc6 [V10,T24] ( 7, 6.74) int -> x28
; V11 loc7 [V11,T14] ( 14, 9.85) ref -> registers class-hnd <System.String>
-; V12 loc8 [V12,T57] ( 8, 1.70) ref -> x27 class-hnd <System.String>
+; V12 loc8 [V12,T57] ( 8, 1.70) ref -> x26 class-hnd <System.String>
; V13 loc9 [V13,T17] ( 12, 9.74) ref -> x28 class-hnd <System.Object>
;* V14 loc10 [V14 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.ReadOnlySpan`1[ushort]>
; V15 loc11 [V15,T02] ( 10, 16.30) int -> [fp+0x74] spill-single-def
; V16 loc12 [V16,T31] ( 3, 5.10) ushort -> x0
-; V17 loc13 [V17,T65] ( 5, 0.15) int -> x3
+; V17 loc13 [V17,T65] ( 5, 0.15) int -> x2
; V18 loc14 [V18,T43] ( 5, 3.41) ref -> [fp+0x48] class-hnd spill-single-def <System.ISpanFormattable>
; V19 loc15 [V19 ] ( 6, 0.12) int -> [fp+0x68] do-not-enreg[X] addr-exposed ld-addr-op
; V20 loc16 [V20,T45] ( 5, 3.27) ref -> [fp+0x40] class-hnd spill-single-def <System.IFormattable>
;# V21 OutArgs [V21 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
; V22 tmp1 [V22,T51] ( 4, 2.01) ref -> x1
;* V23 tmp2 [V23 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.ReadOnlySpan`1[ushort]>
-; V24 tmp3 [V24,T47] ( 3, 3.19) ref -> x27
+; V24 tmp3 [V24,T47] ( 3, 3.19) ref -> x26
;* V25 tmp4 [V25 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Span`1[ushort]>
; V26 tmp5 [V26,T52] ( 3, 1.88) ref -> x1 "guarded devirt return temp"
;* V27 tmp6 [V27 ] ( 0, 0 ) ref -> zero-ref single-def "guarded devirt arg temp"
@@ -44,7 +44,7 @@
;* V32 tmp11 [V32 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "guarded devirt this exact temp" <System.Char>
; V33 tmp12 [V33,T81] ( 3, 0.04) ref -> x0 "guarded devirt return temp"
;* V34 tmp13 [V34 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "guarded devirt this exact temp" <System.Int32>
-; V35 tmp14 [V35,T46] ( 3, 3.19) ref -> x27 "guarded devirt return temp"
+; V35 tmp14 [V35,T46] ( 3, 3.19) ref -> x26 "guarded devirt return temp"
;* V36 tmp15 [V36 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "guarded devirt this exact temp" <System.String>
;* V37 tmp16 [V37 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp" <System.ReadOnlySpan`1[ushort]>
;* V38 tmp17 [V38 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
@@ -68,8 +68,8 @@
; V56 tmp35 [V56,T42] ( 4, 3.60) int -> x1 "Inlining Arg"
; V57 tmp36 [V57,T48] ( 3, 2.70) byref -> x0 single-def "Inlining Arg"
;* V58 tmp37 [V58 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Span`1[ushort]>
-; V59 tmp38 [V59,T49] ( 3, 2.70) int -> x26 "Inlining Arg"
-; V60 tmp39 [V60,T53] ( 2, 1.80) byref -> x27 single-def "Inlining Arg"
+; V59 tmp38 [V59,T49] ( 3, 2.70) int -> x27 "Inlining Arg"
+; V60 tmp39 [V60,T53] ( 2, 1.80) byref -> x26 single-def "Inlining Arg"
;* V61 tmp40 [V61 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" <System.Span`1[ushort]>
;* V62 tmp41 [V62 ] ( 0, 0 ) byref -> zero-ref single-def "Inlining Arg"
;* V63 tmp42 [V63 ] ( 0, 0 ) byref -> zero-ref single-def "Inlining Arg"
@@ -164,10 +164,10 @@
;* V152 tmp131 [V152 ] ( 0, 0 ) int -> zero-ref "field V76._length (fldOffset=0x8)" P-INDEP
; V153 tmp132 [V153,T75] ( 2, 0.06) byref -> x1 "field V82._reference (fldOffset=0x0)" P-INDEP
; V154 tmp133 [V154,T76] ( 2, 0.06) int -> x2 "field V82._length (fldOffset=0x8)" P-INDEP
-; V155 tmp134 [V155,T77] ( 2, 0.06) byref -> x3 "field V83._reference (fldOffset=0x0)" P-INDEP
-; V156 tmp135 [V156,T79] ( 2, 0.06) int -> x4 "field V83._length (fldOffset=0x8)" P-INDEP
-; V157 tmp136 [V157,T78] ( 2, 0.06) byref -> x3 "field V85._reference (fldOffset=0x0)" P-INDEP
-; V158 tmp137 [V158,T80] ( 2, 0.06) int -> x4 "field V85._length (fldOffset=0x8)" P-INDEP
+; V155 tmp134 [V155,T77] ( 2, 0.06) byref -> x0 "field V83._reference (fldOffset=0x0)" P-INDEP
+; V156 tmp135 [V156,T79] ( 2, 0.06) int -> x2 "field V83._length (fldOffset=0x8)" P-INDEP
+; V157 tmp136 [V157,T78] ( 2, 0.06) byref -> x0 "field V85._reference (fldOffset=0x0)" P-INDEP
+; V158 tmp137 [V158,T80] ( 2, 0.06) int -> x2 "field V85._length (fldOffset=0x8)" P-INDEP
;* V159 tmp138 [V159 ] ( 0, 0 ) byref -> zero-ref "field V86._reference (fldOffset=0x0)" P-INDEP
;* V160 tmp139 [V160 ] ( 0, 0 ) int -> zero-ref "field V86._length (fldOffset=0x8)" P-INDEP
; V161 tmp140 [V161,T72] ( 2, 0.08) byref -> x1 "field V90._reference (fldOffset=0x0)" P-INDEP
@@ -186,9 +186,9 @@
; V174 cse3 [V174,T34] ( 5, 4.90) int -> x28 multi-def "CSE - moderate"
; V175 cse4 [V175,T59] ( 3, 1.35) int -> x2 "CSE - conservative"
; V176 cse5 [V176,T71] ( 3, 0.09) long -> x0 "CSE - conservative"
-; V177 cse6 [V177,T03] ( 20, 16.16) int -> x26 "CSE - aggressive"
-; V178 cse7 [V178,T08] ( 17, 12.93) byref -> x27 "CSE - moderate"
-; V179 cse8 [V179,T09] ( 12, 11.43) int -> x27 "CSE - moderate"
+; V177 cse6 [V177,T03] ( 18, 16.16) int -> x26 "CSE - aggressive"
+; V178 cse7 [V178,T08] ( 15, 12.93) byref -> x27 "CSE - moderate"
+; V179 cse8 [V179,T09] ( 12, 11.43) int -> x26 "CSE - moderate"
; V180 cse9 [V180,T32] ( 3, 5.03) int -> x0 "CSE - moderate"
; V181 rat0 [V181,T21] ( 5, 7.05) ref -> x24 class-hnd "replacement local" <System.ICustomFormatter>
; V182 rat1 [V182,T05] ( 6, 13.24) ref -> registers class-hnd "replacement local" <System.ISpanFormattable>
@@ -215,8 +215,8 @@ G_M36935_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov w23, w4
;; size=48 bbWeight=1 PerfScore 9.00
G_M36935_IG02: ; bbWeight=1, gcrefRegs=300000 {x20 x21}, byrefRegs=480000 {x19 x22}, byref, isz
- cbz x20, G_M36935_IG110
- cbz x21, G_M36935_IG63
+ cbz x20, G_M36935_IG105
+ cbz x21, G_M36935_IG61
;; size=8 bbWeight=1 PerfScore 2.00
G_M36935_IG03: ; bbWeight=0.94, gcrefRegs=300000 {x20 x21}, byrefRegs=480000 {x19 x22}, byref, isz
ldr x1, [x21]
@@ -224,7 +224,7 @@ G_M36935_IG03: ; bbWeight=0.94, gcrefRegs=300000 {x20 x21}, byrefRegs=480
movk x0, #0xD1FFAB1E LSL #16
movk x0, #1 LSL #32
cmp x1, x0
- bne G_M36935_IG111
+ bne G_M36935_IG106
mov x1, xzr
; gcrRegs +[x1]
;; size=28 bbWeight=0.94 PerfScore 6.12
@@ -239,7 +239,7 @@ G_M36935_IG05: ; bbWeight=0.50, gcrefRegs=1300002 {x1 x20 x21 x24}, byref
movk x2, #0xD1FFAB1E LSL #16
movk x2, #1 LSL #32
cmp x0, x2
- bne G_M36935_IG112
+ bne G_M36935_IG107
;; size=24 bbWeight=0.50 PerfScore 3.02
G_M36935_IG06: ; bbWeight=1.01, gcrefRegs=1300000 {x20 x21 x24}, byrefRegs=480000 {x19 x22}, byref
; gcrRegs -[x1]
@@ -248,7 +248,7 @@ G_M36935_IG06: ; bbWeight=1.01, gcrefRegs=1300000 {x20 x21 x24}, byrefReg
G_M36935_IG07: ; bbWeight=2.71, gcrefRegs=1300000 {x20 x21 x24}, byrefRegs=480000 {x19 x22}, byref, isz
ldr w26, [x20, #0x08]
cmp w26, w25
- bls G_M36935_IG31
+ bls G_M36935_IG32
;; size=12 bbWeight=2.71 PerfScore 12.19
G_M36935_IG08: ; bbWeight=2.16, gcrefRegs=1300000 {x20 x21 x24}, byrefRegs=480000 {x19 x22}, byref, isz
add x27, x20, #12
@@ -282,12 +282,12 @@ G_M36935_IG08: ; bbWeight=2.16, gcrefRegs=1300000 {x20 x21 x24}, byrefReg
; gcr arg pop 0
sxtw w1, w0
str w1, [fp, #0x74] // [V15 loc11]
- tbnz w1, #31, G_M36935_IG32
+ tbnz w1, #31, G_M36935_IG33
;; size=104 bbWeight=2.16 PerfScore 49.64
G_M36935_IG09: ; bbWeight=1.71, gcrefRegs=1300000 {x20 x21 x24}, byrefRegs=18480000 {x19 x22 x27 x28}, byref, isz
ldr w2, [fp, #0x50] // [V124 tmp103]
cmp w1, w2
- bhi G_M36935_IG107
+ bhi G_M36935_IG102
cmp w1, #0
cset x0, ge
movz x2, #0xD1FFAB1E // code for <unknown method>
@@ -301,7 +301,7 @@ G_M36935_IG09: ; bbWeight=1.71, gcrefRegs=1300000 {x20 x21 x24}, byrefReg
ldr w2, [fp, #0x74] // [V15 loc11]
sub w1, w1, w2
cmp w0, w1
- bgt G_M36935_IG83
+ bgt G_M36935_IG78
;; size=64 bbWeight=1.71 PerfScore 34.18
G_M36935_IG10: ; bbWeight=1.71, gcrefRegs=1300000 {x20 x21 x24}, byrefRegs=18480000 {x19 x22 x27 x28}, byref, isz
add x0, x19, #16
@@ -309,7 +309,7 @@ G_M36935_IG10: ; bbWeight=1.71, gcrefRegs=1300000 {x20 x21 x24}, byrefReg
ldr w1, [x19, #0x08]
ldr w3, [x0, #0x08]
cmp w1, w3
- bhi G_M36935_IG107
+ bhi G_M36935_IG102
ldr x0, [x0]
ubfiz x4, x1, #1, #32
add x4, x0, x4
@@ -331,7 +331,7 @@ G_M36935_IG10: ; bbWeight=1.71, gcrefRegs=1300000 {x20 x21 x24}, byrefReg
ldr w3, [fp, #0x74] // [V15 loc11]
ldr w2, [fp, #0x60] // [V74 tmp53]
cmp w3, w2
- bhi G_M36935_IG108
+ bhi G_M36935_IG103
mov w2, w3
lsl x2, x2, #1
ldr x0, [fp, #0x38] // [V75 tmp54]
@@ -352,25 +352,25 @@ G_M36935_IG10: ; bbWeight=1.71, gcrefRegs=1300000 {x20 x21 x24}, byrefReg
str w0, [x19, #0x08]
add w25, w25, w28
cmp w25, w26
- bhs G_M36935_IG109
+ bhs G_M36935_IG104
ldrh w0, [x27, w25, UXTW #2]
add w25, w25, #1
cmp w26, w25
- bls G_M36935_IG103
+ bls G_M36935_IG98
ldrh w28, [x27, w25, UXTW #2]
cmp w0, w28
- beq G_M36935_IG68
+ beq G_M36935_IG66
;; size=180 bbWeight=1.71 PerfScore 93.14
G_M36935_IG11: ; bbWeight=1.68, gcrefRegs=1300000 {x20 x21 x24}, byrefRegs=8480000 {x19 x22 x27}, byref, isz
cmp w0, #123
- bne G_M36935_IG101
+ bne G_M36935_IG96
str xzr, [fp, #0x78]
str xzr, [fp, #0x18] // [V115 tmp94]
; GC ptr vars +{V115}
str wzr, [fp, #0x54] // [V116 tmp95]
sub w0, w25, #1
cmp w0, w26
- bhs G_M36935_IG109
+ bhs G_M36935_IG104
ldrh w0, [x27, w0, UXTW #2]
cmp w0, #123
cset x0, eq
@@ -390,91 +390,91 @@ G_M36935_IG11: ; bbWeight=1.68, gcrefRegs=1300000 {x20 x21 x24}, byrefReg
; gcr arg pop 0
sub w28, w28, #48
cmp w28, #10
- bhs G_M36935_IG102
+ bhs G_M36935_IG97
add w25, w25, #1
cmp w26, w25
- bls G_M36935_IG103
+ bls G_M36935_IG98
ldrh w0, [x27, w25, UXTW #2]
sxtw w1, w0
cmp w1, #125
- bne G_M36935_IG70
+ bne G_M36935_IG69
;; size=132 bbWeight=1.68 PerfScore 52.86
G_M36935_IG12: ; bbWeight=1.68, gcrefRegs=1300000 {x20 x21 x24}, byrefRegs=8480000 {x19 x22 x27}, byref, isz
cmp w25, w26
- bhs G_M36935_IG109
+ bhs G_M36935_IG104
ldrh w0, [x27, w25, UXTW #2]
cmp w0, #125
cset x0, eq
- movz x3, #0xD1FFAB1E // code for <unknown method>
- movk x3, #0xD1FFAB1E LSL #16
- movk x3, #1 LSL #32
- ldr x3, [x3]
- blr x3
+ movz x1, #0xD1FFAB1E // code for <unknown method>
+ movk x1, #0xD1FFAB1E LSL #16
+ movk x1, #1 LSL #32
+ ldr x1, [x1]
+ blr x1
; byrRegs -[x27]
; gcr arg pop 0
add w25, w25, #1
- mov x26, xzr
- ; gcrRegs +[x26]
mov x27, xzr
; gcrRegs +[x27]
+ mov x26, xzr
+ ; gcrRegs +[x26]
cmp w28, w23
- bhs G_M36935_IG106
+ bhs G_M36935_IG101
ldr x28, [x22, w28, UXTW #3]
; gcrRegs +[x28]
- cbnz x24, G_M36935_IG59
+ cbnz x24, G_M36935_IG57
;; size=68 bbWeight=1.68 PerfScore 30.21
G_M36935_IG13: ; bbWeight=1.68, gcrefRegs=1D300000 {x20 x21 x24 x26 x27 x28}, byrefRegs=480000 {x19 x22}, byref, isz
- cbnz x26, G_M36935_IG26
+ cbnz x27, G_M36935_IG27
;; size=4 bbWeight=1.68 PerfScore 1.68
-G_M36935_IG14: ; bbWeight=1.65, gcrefRegs=19300000 {x20 x21 x24 x27 x28}, byrefRegs=480000 {x19 x22}, byref, isz
- ; gcrRegs -[x26]
- ldr w26, [fp, #0x78] // [V08 loc4]
- cbnz w26, G_M36935_IG16
+G_M36935_IG14: ; bbWeight=1.65, gcrefRegs=15300000 {x20 x21 x24 x26 x28}, byrefRegs=480000 {x19 x22}, byref, isz
...
librariestestsnotieredcompilation.run.osx.arm64.Release.mch
+12 (+0.83%) : 130052.dasm - System.IO.Tests.UmaReadWriteStructArray:UmaReadWriteStructArrayMultiples() (FullOpts)
@@ -8,54 +8,54 @@
; 14 inlinees with PGO data; 44 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 loc0 [V00,T33] ( 3, 5.96) ref -> x19 class-hnd exact single-def <<unknown class>>
-; V01 loc1 [V01,T25] ( 4, 10.01) ref -> x20 class-hnd exact single-def <<unknown class>>
+; V00 loc0 [V00,T32] ( 3, 5.96) ref -> x19 class-hnd exact single-def <<unknown class>>
+; V01 loc1 [V01,T14] ( 7, 21.83) ref -> x20 class-hnd exact single-def <<unknown class>>
; V02 loc2 [V02,T09] ( 7, 24.76) int -> x0
;* V03 loc3 [V03 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SF] ld-addr-op <System.IO.Tests.Uma_TestStructs+UmaTestStruct>
-; V04 loc4 [V04,T39] ( 3, 1 ) ref -> [fp+0x38] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
-; V05 loc5 [V05,T38] ( 5, 2 ) ref -> [fp+0x30] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
-; V06 loc6 [V06,T07] ( 8, 29.03) int -> x19
+; V04 loc4 [V04,T38] ( 3, 1 ) ref -> [fp+0x38] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
+; V05 loc5 [V05,T37] ( 5, 2 ) ref -> [fp+0x30] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
+; V06 loc6 [V06,T07] ( 8, 28.75) int -> x19
;# V07 OutArgs [V07 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V08 tmp1 [V08,T31] ( 4, 8 ) ref -> x21 class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
-; V09 tmp2 [V09,T26] ( 5, 10.01) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
-; V10 tmp3 [V10,T34] ( 2, 4.01) int -> x19 "Inlining Arg"
-; V11 tmp4 [V11,T32] ( 3, 6.01) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V08 tmp1 [V08,T28] ( 4, 8 ) ref -> x21 class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
+; V09 tmp2 [V09,T22] ( 5, 10.01) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
+; V10 tmp3 [V10,T33] ( 2, 4.01) int -> x19 "Inlining Arg"
+; V11 tmp4 [V11,T31] ( 3, 6.01) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V12 tmp5 [V12 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V13 tmp6 [V13,T37] ( 3, 3.00) ref -> x24 class-hnd exact single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V14 tmp7 [V14,T27] ( 4, 8.01) ref -> x26 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V15 tmp8 [V15,T28] ( 4, 8.01) ref -> x27 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V16 tmp9 [V16,T14] ( 2, 16.02) int -> x26 "Inlining Arg"
-; V17 tmp10 [V17,T10] ( 3, 24.04) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V13 tmp6 [V13,T36] ( 3, 3.00) ref -> x24 class-hnd exact single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V14 tmp7 [V14,T26] ( 4, 8.01) ref -> x26 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V15 tmp8 [V15,T27] ( 4, 8.01) ref -> x27 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V16 tmp9 [V16,T15] ( 2, 15.86) int -> x26 "Inlining Arg"
+; V17 tmp10 [V17,T11] ( 3, 23.80) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V18 tmp11 [V18 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V19 tmp12 [V19,T17] ( 3, 12.02) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V20 tmp13 [V20,T01] ( 4, 32.05) ref -> [fp+0x28] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V21 tmp14 [V21,T02] ( 4, 32.05) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V19 tmp12 [V19,T18] ( 3, 11.90) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V20 tmp13 [V20,T01] ( 4, 31.73) ref -> [fp+0x28] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V21 tmp14 [V21,T02] ( 4, 31.73) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V22 tmp15 [V22 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
-; V23 tmp16 [V23,T15] ( 2, 16.02) int -> x26 "Inlining Arg"
-; V24 tmp17 [V24,T11] ( 3, 24.04) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V23 tmp16 [V23,T16] ( 2, 15.86) int -> x26 "Inlining Arg"
+; V24 tmp17 [V24,T12] ( 3, 23.80) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V25 tmp18 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V26 tmp19 [V26,T18] ( 3, 12.02) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V27 tmp20 [V27,T03] ( 4, 32.05) ref -> [fp+0x20] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V28 tmp21 [V28,T04] ( 4, 32.05) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V26 tmp19 [V26,T19] ( 3, 11.90) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V27 tmp20 [V27,T03] ( 4, 31.73) ref -> [fp+0x20] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V28 tmp21 [V28,T04] ( 4, 31.73) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V29 tmp22 [V29 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V30 tmp23 [V30 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V31 tmp24 [V31 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
;* V32 tmp25 [V32 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V33 tmp26 [V33,T16] ( 2, 16.02) ushort -> x26 "Inlining Arg"
-; V34 tmp27 [V34,T12] ( 3, 24.04) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
+; V33 tmp26 [V33,T17] ( 2, 15.86) ushort -> x26 "Inlining Arg"
+; V34 tmp27 [V34,T13] ( 3, 23.80) ref -> x27 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
;* V35 tmp28 [V35 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V36 tmp29 [V36,T19] ( 3, 12.02) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V37 tmp30 [V37,T05] ( 4, 32.05) ref -> [fp+0x18] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V38 tmp31 [V38,T06] ( 4, 32.05) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V36 tmp29 [V36,T20] ( 3, 11.90) ref -> x28 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
+; V37 tmp30 [V37,T05] ( 4, 31.73) ref -> [fp+0x18] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V38 tmp31 [V38,T06] ( 4, 31.73) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V39 tmp32 [V39 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V40 tmp33 [V40 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V41 tmp34 [V41 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
-;* V42 tmp35 [V42,T35] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
-; V43 tmp36 [V43,T29] ( 3, 8.01) ubyte -> x26 "field V30.value (fldOffset=0x1)" P-INDEP
+;* V42 tmp35 [V42,T34] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
+; V43 tmp36 [V43,T29] ( 3, 7.93) ubyte -> x26 "field V30.value (fldOffset=0x1)" P-INDEP
;* V44 tmp37 [V44 ] ( 0, 0 ) ubyte -> zero-ref "field V31.hasValue (fldOffset=0x0)" P-INDEP
;* V45 tmp38 [V45 ] ( 0, 0 ) ubyte -> zero-ref "field V31.value (fldOffset=0x1)" P-INDEP
-;* V46 tmp39 [V46,T36] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
-; V47 tmp40 [V47,T30] ( 2, 8.01) ubyte -> x0 "field V40.value (fldOffset=0x1)" P-INDEP
+;* V46 tmp39 [V46,T35] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
+; V47 tmp40 [V47,T30] ( 3, 7.93) ubyte -> x22 "field V40.value (fldOffset=0x1)" P-INDEP
;* V48 tmp41 [V48 ] ( 0, 0 ) ubyte -> zero-ref "field V41.hasValue (fldOffset=0x0)" P-INDEP
;* V49 tmp42 [V49 ] ( 0, 0 ) ubyte -> zero-ref "field V41.value (fldOffset=0x1)" P-INDEP
;* V50 tmp43 [V50 ] ( 0, 0 ) int -> zero-ref "V03.[000..004)"
@@ -64,15 +64,14 @@
;* V53 tmp46 [V53 ] ( 0, 0 ) ushort -> zero-ref "V03.[012..014)"
;* V54 tmp47 [V54 ] ( 0, 0 ) ubyte -> zero-ref "V03.[014..015)"
; V55 tmp48 [V55,T00] ( 6, 47.52) byref -> x1 "Spilling address for field-by-field copy"
-; V56 tmp49 [V56,T41] ( 6, 0 ) struct ( 8) [fp+0x40] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
-; V57 PSPSym [V57,T40] ( 1, 1 ) long -> [fp+0x48] do-not-enreg[V] "PSPSym"
-; V58 cse0 [V58,T13] ( 5, 20.03) byref -> x22 "CSE - aggressive"
-; V59 cse1 [V59,T20] ( 3, 12.02) long -> x22 "CSE - moderate"
-; V60 cse2 [V60,T08] ( 9, 27.04) long -> x25 "CSE - aggressive"
-; V61 cse3 [V61,T22] ( 4, 10.02) long -> x21 "CSE - moderate"
-; V62 cse4 [V62,T23] ( 4, 10.02) long -> x23 "CSE - moderate"
-; V63 cse5 [V63,T24] ( 4, 10.02) long -> x24 "CSE - moderate"
-; V64 cse6 [V64,T21] ( 3, 11.88) int -> x2 "CSE - moderate"
+; V56 tmp49 [V56,T40] ( 6, 0 ) struct ( 8) [fp+0x40] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
+; V57 PSPSym [V57,T39] ( 1, 1 ) long -> [fp+0x48] do-not-enreg[V] "PSPSym"
+; V58 cse0 [V58,T10] ( 6, 23.80) long -> x22 "CSE - aggressive"
+; V59 cse1 [V59,T08] ( 9, 26.80) long -> x25 "CSE - aggressive"
+; V60 cse2 [V60,T23] ( 4, 9.94) long -> x21 "CSE - moderate"
+; V61 cse3 [V61,T24] ( 4, 9.94) long -> x23 "CSE - moderate"
+; V62 cse4 [V62,T25] ( 4, 9.94) long -> x24 "CSE - moderate"
+; V63 cse5 [V63,T21] ( 3, 11.88) int -> x2 "CSE - moderate"
;
; Lcl frame size = 64
@@ -147,7 +146,7 @@ G_M53770_IG04: ; bbWeight=1, gcrefRegs=180000 {x19 x20}, byrefRegs=0000 {
str x21, [fp, #0x38] // [V04 loc4]
; GC ptr vars +{V04}
;; size=48 bbWeight=1 PerfScore 10.00
-G_M53770_IG05: ; bbWeight=1, gcVars=0000008000000000 {V04}, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG05: ; bbWeight=1, gcVars=0000004000000000 {V04}, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, gcvars, byref
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #1 LSL #32
@@ -171,7 +170,7 @@ G_M53770_IG05: ; bbWeight=1, gcVars=0000008000000000 {V04}, gcrefRegs=380
str x22, [fp, #0x30] // [V05 loc5]
; GC ptr vars +{V05}
;; size=60 bbWeight=1 PerfScore 11.50
-G_M53770_IG06: ; bbWeight=1.00, gcVars=000000C000000000 {V04 V05}, gcrefRegs=580000 {x19 x20 x22}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG06: ; bbWeight=1.00, gcVars=0000006000000000 {V04 V05}, gcrefRegs=580000 {x19 x20 x22}, byrefRegs=0000 {}, gcvars, byref
mov x0, x22
; gcrRegs +[x0]
mov x2, x19
@@ -291,7 +290,7 @@ G_M53770_IG06: ; bbWeight=1.00, gcVars=000000C000000000 {V04 V05}, gcrefR
; gcr arg pop 0
mov w19, wzr
;; size=300 bbWeight=1.00 PerfScore 54.58
-G_M53770_IG07: ; bbWeight=4.01, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
+G_M53770_IG07: ; bbWeight=3.97, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
ubfiz x0, x19, #4, #32
add x22, x0, #16
ldr w26, [x20, x22]
@@ -374,10 +373,11 @@ G_M53770_IG07: ; bbWeight=4.01, gcrefRegs=100000 {x20}, byrefRegs=0000 {}
blr x3
; gcrRegs -[x2 x27]
; gcr arg pop 0
- add x22, x20, x22
- ; byrRegs +[x22]
- ldr w26, [x22, #0x08]
+ add x0, x20, x22
+ ; byrRegs +[x0]
+ ldr w26, [x0, #0x08]
mov x0, x21
+ ; byrRegs -[x0]
bl CORINFO_HELP_NEWSFAST
; gcrRegs +[x0]
; gcr arg pop 0
@@ -456,10 +456,14 @@ G_M53770_IG07: ; bbWeight=4.01, gcrefRegs=100000 {x20}, byrefRegs=0000 {}
blr x3
; gcrRegs -[x2 x27]
; gcr arg pop 0
- ldrb w26, [x22, #0x04]
+ add x0, x20, x22
+ ; byrRegs +[x0]
+ ldrb w26, [x0, #0x04]
cbnz w26, G_M53770_IG10
- ldrh w26, [x22, #0x0C]
+ add x0, x20, x22
+ ldrh w26, [x0, #0x0C]
movz x0, #0xD1FFAB1E
+ ; byrRegs -[x0]
movk x0, #0xD1FFAB1E LSL #16
movk x0, #1 LSL #32
bl CORINFO_HELP_NEWSFAST
@@ -545,19 +549,21 @@ G_M53770_IG07: ; bbWeight=4.01, gcrefRegs=100000 {x20}, byrefRegs=0000 {}
blr x3
; gcrRegs -[x2 x27]
; gcr arg pop 0
- ldrb w0, [x22, #0x0E]
- cbz w0, G_M53770_IG11
- ;; size=572 bbWeight=4.01 PerfScore 498.77
-G_M53770_IG08: ; bbWeight=4, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
- ; byrRegs -[x22]
+ add x0, x20, x22
+ ; byrRegs +[x0]
+ ldrb w22, [x0, #0x0E]
+ cbz w22, G_M53770_IG11
+ ;; size=584 bbWeight=3.97 PerfScore 499.73
+G_M53770_IG08: ; bbWeight=3.96, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
+ ; byrRegs -[x0]
add w19, w19, #1
cmp w19, #12
blt G_M53770_IG07
- ;; size=12 bbWeight=4 PerfScore 8.00
-G_M53770_IG09: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ ;; size=12 bbWeight=3.96 PerfScore 7.92
+G_M53770_IG09: ; bbWeight=1.00, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
; gcrRegs -[x20]
b G_M53770_IG12
- ;; size=4 bbWeight=0.50 PerfScore 0.50
+ ;; size=4 bbWeight=1.00 PerfScore 1.00
G_M53770_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov w1, #1
strb w1, [fp, #0x40] // [V56 tmp49]
@@ -578,7 +584,7 @@ G_M53770_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
G_M53770_IG11: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov w1, #1
strb w1, [fp, #0x40] // [V56 tmp49]
- strb wzr, [fp, #0x41] // [V56 tmp49+0x01]
+ strb w22, [fp, #0x41] // [V56 tmp49+0x01]
ldrh w1, [fp, #0x40] // [V56 tmp49]
mov x0, xzr
movz x2, #0xD1FFAB1E // code for <unknown method>
@@ -622,8 +628,8 @@ G_M53770_IG14: ; bbWeight=1, epilog, nogc, extend
ldp fp, lr, [sp], #0xA0
ret lr
;; size=28 bbWeight=1 PerfScore 7.00
-G_M53770_IG15: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
- ; GC ptr vars +{V04 V05 V38}
+G_M53770_IG15: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
+ ; GC ptr vars +{V04 V05 V37 V38}
stp fp, lr, [sp, #-0x70]!
stp x19, x20, [sp, #0x20]
stp x21, x22, [sp, #0x30]
@@ -633,11 +639,11 @@ G_M53770_IG15: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs
add x3, fp, #160
str x3, [sp, #0x18]
;; size=32 bbWeight=0 PerfScore 0.00
-G_M53770_IG16: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG16: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
ldr x0, [fp, #0x30] // [V05 loc5]
; gcrRegs +[x0]
strb wzr, [x0, #0x24]
- ; GC ptr vars -{V05 V38}
+ ; GC ptr vars -{V05 V37 V38}
bl <unknown method>
; gcrRegs -[x0]
; gcr arg pop 0
@@ -661,7 +667,7 @@ G_M53770_IG18: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
add x3, fp, #160
str x3, [sp, #0x18]
;; size=32 bbWeight=0 PerfScore 0.00
-G_M53770_IG19: ; bbWeight=0, gcVars=0000008000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG19: ; bbWeight=0, gcVars=0000004000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
ldr x0, [fp, #0x38] // [V04 loc4]
; gcrRegs +[x0]
movz x1, #0xD1FFAB1E // code for <unknown method>
@@ -683,7 +689,7 @@ G_M53770_IG20: ; bbWeight=0, funclet epilog, nogc, extend
ret lr
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 1448, prolog size 36, PerfScore 656.96, instruction count 362, allocated bytes for code 1448 (MethodHash=942a2df5) for method System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
+; Total bytes of code 1460, prolog size 36, PerfScore 658.34, instruction count 365, allocated bytes for code 1460 (MethodHash=942a2df5) for method System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
; ============================================================
...
Details
Improvements/regressions per collection
| Collection |
Contexts with diffs |
Improvements |
Regressions |
Same size |
Improvements (bytes) |
Regressions (bytes) |
| benchmarks.run.osx.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_pgo.osx.arm64.checked.mch |
6 |
6 |
0 |
0 |
-1,376 |
+0 |
| benchmarks.run_tiered.osx.arm64.checked.mch |
3 |
3 |
0 |
0 |
-648 |
+0 |
| coreclr_tests.run.osx.arm64.checked.mch |
4 |
4 |
0 |
0 |
-944 |
+0 |
| libraries.crossgen2.osx.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries.pmi.osx.arm64.checked.mch |
2 |
1 |
1 |
0 |
-16 |
+268 |
| libraries_tests.run.osx.arm64.Release.mch |
2 |
2 |
0 |
0 |
-148 |
+0 |
| librariestestsnotieredcompilation.run.osx.arm64.Release.mch |
1 |
0 |
1 |
0 |
-0 |
+12 |
| realworld.run.osx.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
|
18 |
16 |
2 |
0 |
-3,132 |
+280 |
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| benchmarks.run.osx.arm64.checked.mch |
24,861 |
5 |
24,856 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_pgo.osx.arm64.checked.mch |
84,176 |
48,254 |
35,922 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_tiered.osx.arm64.checked.mch |
48,057 |
37,339 |
10,718 |
0 (0.00%) |
0 (0.00%) |
| coreclr_tests.run.osx.arm64.checked.mch |
584,887 |
356,502 |
228,385 |
0 (0.00%) |
1 (0.00%) |
| libraries.crossgen2.osx.arm64.checked.mch |
1,881 |
0 |
1,881 |
0 (0.00%) |
0 (0.00%) |
| libraries.pmi.osx.arm64.checked.mch |
316,294 |
18 |
316,276 |
0 (0.00%) |
0 (0.00%) |
| libraries_tests.run.osx.arm64.Release.mch |
634,649 |
463,650 |
170,999 |
0 (0.00%) |
0 (0.00%) |
| librariestestsnotieredcompilation.run.osx.arm64.Release.mch |
303,146 |
21,597 |
281,549 |
0 (0.00%) |
0 (0.00%) |
| realworld.run.osx.arm64.checked.mch |
31,543 |
3 |
31,540 |
0 (0.00%) |
0 (0.00%) |
|
2,029,494 |
927,368 |
1,102,126 |
0 (0.00%) |
1 (0.00%) |
jit-analyze output
benchmarks.run_pgo.osx.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os osx -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 34557412 (overridden on cmd)
Total bytes of diff: 34556036 (overridden on cmd)
Total bytes of delta: -1376 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-476 : 83048.dasm (-32.25 % of base)
-476 : 83057.dasm (-33.06 % of base)
-156 : 46300.dasm (-21.67 % of base)
-156 : 46277.dasm (-21.67 % of base)
-56 : 67945.dasm (-6.64 % of base)
-56 : 67964.dasm (-6.64 % of base)
6 total files with Code Size differences (6 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-476 (-32.25 % of base) : 83048.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-476 (-33.06 % of base) : 83057.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-156 (-21.67 % of base) : 46300.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 46277.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.64 % of base) : 67945.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
-56 (-6.64 % of base) : 67964.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method improvements (percentages):
-476 (-33.06 % of base) : 83057.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-476 (-32.25 % of base) : 83048.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-156 (-21.67 % of base) : 46300.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 46277.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.64 % of base) : 67945.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
-56 (-6.64 % of base) : 67964.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
6 total methods with Code Size differences (6 improved, 0 regressed).
benchmarks.run_tiered.osx.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os osx -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 15509064 (overridden on cmd)
Total bytes of diff: 15508416 (overridden on cmd)
Total bytes of delta: -648 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-440 : 47641.dasm (-32.16 % of base)
-152 : 32451.dasm (-14.13 % of base)
-56 : 43024.dasm (-6.97 % of base)
3 total files with Code Size differences (3 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-440 (-32.16 % of base) : 47641.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-152 (-14.13 % of base) : 32451.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.97 % of base) : 43024.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method improvements (percentages):
-440 (-32.16 % of base) : 47641.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-152 (-14.13 % of base) : 32451.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.97 % of base) : 43024.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
3 total methods with Code Size differences (3 improved, 0 regressed).
coreclr_tests.run.osx.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os osx -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 483595744 (overridden on cmd)
Total bytes of diff: 483594800 (overridden on cmd)
Total bytes of delta: -944 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-460 : 464210.dasm (-31.94 % of base)
-172 : 504858.dasm (-32.58 % of base)
-156 : 467494.dasm (-21.67 % of base)
-156 : 467510.dasm (-21.67 % of base)
4 total files with Code Size differences (4 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-460 (-31.94 % of base) : 464210.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-172 (-32.58 % of base) : 504858.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
-156 (-21.67 % of base) : 467494.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 467510.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
Top method improvements (percentages):
-172 (-32.58 % of base) : 504858.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
-460 (-31.94 % of base) : 464210.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-156 (-21.67 % of base) : 467494.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 467510.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
4 total methods with Code Size differences (4 improved, 0 regressed).
libraries.pmi.osx.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os osx -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 80212804 (overridden on cmd)
Total bytes of diff: 80213056 (overridden on cmd)
Total bytes of delta: 252 (0.00 % of base)
diff is a regression.
relative diff is a regression.
Detail diffs
Top file regressions (bytes):
268 : 137954.dasm (36.41 % of base)
Top file improvements (bytes):
-16 : 134564.dasm (-12.90 % of base)
2 total files with Code Size differences (1 improved, 1 regressed), 0 unchanged.
Top method regressions (bytes):
268 (36.41 % of base) : 137954.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
Top method improvements (bytes):
-16 (-12.90 % of base) : 134564.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
Top method regressions (percentages):
268 (36.41 % of base) : 137954.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
Top method improvements (percentages):
-16 (-12.90 % of base) : 134564.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
2 total methods with Code Size differences (1 improved, 1 regressed).
libraries_tests.run.osx.arm64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os osx -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 314052980 (overridden on cmd)
Total bytes of diff: 314052832 (overridden on cmd)
Total bytes of delta: -148 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-92 : 269388.dasm (-2.44 % of base)
-56 : 458233.dasm (-1.69 % of base)
2 total files with Code Size differences (2 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-92 (-2.44 % of base) : 269388.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-56 (-1.69 % of base) : 458233.dasm - System.Text.ValueStringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):this (Tier1)
Top method improvements (percentages):
-92 (-2.44 % of base) : 269388.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-56 (-1.69 % of base) : 458233.dasm - System.Text.ValueStringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):this (Tier1)
2 total methods with Code Size differences (2 improved, 0 regressed).
librariestestsnotieredcompilation.run.osx.arm64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os osx -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 163157008 (overridden on cmd)
Total bytes of diff: 163157020 (overridden on cmd)
Total bytes of delta: 12 (0.00 % of base)
diff is a regression.
relative diff is a regression.
Detail diffs
Top file regressions (bytes):
12 : 130052.dasm (0.83 % of base)
1 total files with Code Size differences (0 improved, 1 regressed), 0 unchanged.
Top method regressions (bytes):
12 (0.83 % of base) : 130052.dasm - System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
Top method regressions (percentages):
12 (0.83 % of base) : 130052.dasm - System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
1 total methods with Code Size differences (0 improved, 1 regressed).
windows arm64
Diffs are based on 2,070,984 contexts (937,853 MinOpts, 1,133,131 FullOpts).
MISSED contexts: base: 1 (0.00%), diff: 5 (0.00%)
Overall (-2,836 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.windows.arm64.checked.mch |
46,635,420 |
-1,304 |
| benchmarks.run_tiered.windows.arm64.checked.mch |
15,506,668 |
-632 |
| coreclr_tests.run.windows.arm64.checked.mch |
496,311,484 |
-944 |
| libraries.pmi.windows.arm64.checked.mch |
79,839,104 |
+252 |
| libraries_tests.run.windows.arm64.Release.mch |
327,035,492 |
-220 |
| librariestestsnotieredcompilation.run.windows.arm64.Release.mch |
171,570,108 |
+12 |
FullOpts (-2,836 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.windows.arm64.checked.mch |
30,377,228 |
-1,304 |
| benchmarks.run_tiered.windows.arm64.checked.mch |
4,328,920 |
-632 |
| coreclr_tests.run.windows.arm64.checked.mch |
156,637,080 |
-944 |
| libraries.pmi.windows.arm64.checked.mch |
79,719,120 |
+252 |
| libraries_tests.run.windows.arm64.Release.mch |
123,561,644 |
-220 |
| librariestestsnotieredcompilation.run.windows.arm64.Release.mch |
158,416,396 |
+12 |
Example diffs
benchmarks.run_pgo.windows.arm64.checked.mch
-476 (-33.06%) : 94817.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,134 +10,132 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T15] ( 11, 3.89) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T19] ( 7, 2.13) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T15] ( 7, 3.89) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T19] ( 4, 2.25) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T03] ( 6,102.63) int -> x21
-; V03 loc1 [V03,T13] ( 19, 26.31) int -> x23
-; V04 loc2 [V04,T39] ( 7, 0.00) int -> x24
-; V05 loc3 [V05,T11] ( 30, 28.96) int -> x22
-; V06 loc4 [V06,T24] ( 22, 1.38) int -> x4
-; V07 loc5 [V07,T42] ( 8, 13.18) double -> d8
-; V08 loc6 [V08,T09] ( 22, 50.68) int -> x5
-; V09 loc7 [V09,T41] ( 9, 25.60) double -> d9
-; V10 loc8 [V10,T30] ( 4, 0.25) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T43] ( 5, 12.63) double -> d10
-; V12 loc10 [V12,T10] ( 19, 50.66) int -> x5
-; V13 loc11 [V13,T18] ( 9, 4.42) int -> x3
+; V03 loc1 [V03,T13] ( 13, 26.31) int -> x23
+; V04 loc2 [V04,T34] ( 2, 0.00) int -> x24
+; V05 loc3 [V05,T11] ( 18, 29.09) int -> x22
+; V06 loc4 [V06,T24] ( 12, 1.38) int -> x4
+; V07 loc5 [V07,T37] ( 5, 13.18) double -> d16
+; V08 loc6 [V08,T09] ( 14, 50.56) int -> x14
+; V09 loc7 [V09,T36] ( 6, 25.60) double -> d17
+; V10 loc8 [V10,T29] ( 2, 0.25) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T38] ( 3, 12.63) double -> d16
+; V12 loc10 [V12,T10] ( 12, 50.53) int -> x0
+; V13 loc11 [V13,T18] ( 7, 4.42) int -> x3
; V14 loc12 [V14,T16] ( 8, 5.29) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T17] ( 6, 4.51) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T40] ( 3,100 ) double -> d16
+; V16 loc14 [V16,T35] ( 3,100 ) double -> d16
; V17 loc15 [V17,T01] ( 13,401.09) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T06] ( 9, 75.05) byref -> x7 "dup spill"
-; V20 tmp2 [V20,T27] ( 4, 0.50) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V21 tmp3 [V21,T00] ( 6,594.70) byref -> x2 "dup spill"
+; V19 tmp1 [V19,T06] ( 6, 75.05) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 0.50) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V21 tmp3 [V21,T00] ( 6,594.70) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T38] ( 6, 0.00) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T08] ( 9, 74.52) ref -> x6 "arr expr"
-; V25 tmp7 [V25,T25] ( 6, 0.75) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T26] ( 6, 0.75) ref -> x4 "arr expr"
-; V27 tmp9 [V27,T07] ( 9, 75.05) ref -> x6 "arr expr"
-; V28 cse0 [V28,T28] ( 3, 0.37) ref -> x15 "CSE - conservative"
-; V29 cse1 [V29,T34] ( 3, 0.00) ref -> x15 "CSE - conservative"
-; V30 cse2 [V30,T36] ( 3, 0.00) ref -> x2 "CSE - conservative"
-; V31 cse3 [V31,T32] ( 3, 0.12) ref -> x2 "CSE - conservative"
-; V32 cse4 [V32,T02] ( 3,294.38) long -> x15 "CSE - aggressive"
-; V33 cse5 [V33,T14] ( 11, 25.18) long -> x28 "CSE - aggressive"
-; V34 cse6 [V34,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
-; V35 cse7 [V35,T23] ( 3, 2.65) long -> x14 "CSE - moderate"
-; V36 cse8 [V36,T29] ( 9, 0.25) long -> x28 "CSE - conservative"
-; V37 cse9 [V37,T04] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T05] ( 4,100.00) byref -> x0 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T12] ( 19, 27.95) byref -> x26 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T20] ( 15, 3.39) int -> x25 multi-def "CSE - moderate"
-; V41 cse13 [V41,T22] ( 4, 2.75) int -> xip0 hoist multi-def "CSE - moderate"
-; V42 cse14 [V42,T31] ( 4, 0.12) int -> [fp+0x14] "CSE - conservative"
-; V43 cse15 [V43,T35] ( 4, 0.00) int -> [fp+0x10] "CSE - conservative"
-; V44 cse16 [V44,T33] ( 3, 0.12) long -> x27 "CSE - conservative"
-; V45 cse17 [V45,T37] ( 3, 0.00) long -> x27 "CSE - conservative"
+; V23 tmp5 [V23,T33] ( 3, 0.00) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T08] ( 6, 74.52) ref -> x15 "arr expr"
+; V25 tmp7 [V25,T25] ( 3, 0.75) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T26] ( 3, 0.75) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T07] ( 6, 75.05) ref -> x1 "arr expr"
+; V28 cse0 [V28,T28] ( 3, 0.38) ref -> x15 "CSE - conservative"
+; V29 cse1 [V29,T31] ( 3, 0.13) ref -> x2 "CSE - conservative"
+; V30 cse2 [V30,T02] ( 3,294.38) long -> x15 "CSE - aggressive"
+; V31 cse3 [V31,T14] ( 11, 25.43) long -> x28 "CSE - aggressive"
+; V32 cse4 [V32,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
+; V33 cse5 [V33,T23] ( 3, 2.65) long -> x14 "CSE - moderate"
+; V34 cse6 [V34,T04] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T05] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V36 cse8 [V36,T12] ( 12, 27.95) byref -> x26 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T20] ( 10, 3.15) int -> x25 multi-def "CSE - moderate"
+; V38 cse10 [V38,T22] ( 4, 2.75) int -> xip0 hoist multi-def "CSE - moderate"
+; V39 cse11 [V39,T30] ( 4, 0.13) int -> [fp+0x1C] "CSE - conservative"
+; V40 cse12 [V40,T32] ( 3, 0.13) long -> x27 "CSE - conservative"
;
-; Lcl frame size = 8
+; Lcl frame size = 16
G_M58112_IG01: ; bbWeight=0.88, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x70]!
+ stp x19, x20, [sp, #0x20]
+ stp x21, x22, [sp, #0x30]
+ stp x23, x24, [sp, #0x40]
+ stp x25, x26, [sp, #0x50]
+ stp x27, x28, [sp, #0x60]
mov fp, sp
ldp x20, x19, [fp, #0xD1FFAB1E]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w23, w21, [fp, #0xF8]
+ ldp w22, w24, [fp, #0xF0]
+ ldr w3, [fp, #0xB8]
+ ldp x12, x15, [fp, #0xA8]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=0.88 PerfScore 25.17
+ ldr d16, [fp, #0xA0]
+ ldr w14, [fp, #0x9C]
+ ;; size=56 bbWeight=0.88 PerfScore 19.87
G_M58112_IG02: ; bbWeight=0.88, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref, isz
cmp w14, w21
- bge G_M58112_IG48
+ bge G_M58112_IG31
;; size=8 bbWeight=0.88 PerfScore 1.32
G_M58112_IG03: ; bbWeight=0.88, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
- b G_M58112_IG38
+ b G_M58112_IG26
;; size=4 bbWeight=0.88 PerfScore 0.88
G_M58112_IG04: ; bbWeight=0.00, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x26]
sxtw w4, w22
+ ldr w25, [x19, #0x08]
+ cmp w4, w25
+ bhs G_M58112_IG32
mov w27, w4
lsl x28, x27, #3
ldr x2, [x26, x28]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG49
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w4, w15
+ bhs G_M58112_IG32
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x28]
- fabs d8, d16
- add w3, w4, #1
- str w3, [fp, #0x14] // [V42 cse14]
- sxtw w5, w3
- ; gcrRegs -[x5]
- cmp w5, w23
- blt G_M58112_IG13
- ;; size=64 bbWeight=0.00 PerfScore 0.00
-G_M58112_IG05: ; bbWeight=0.12, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ fabs d16, d16
+ add w5, w4, #1
+ sxtw w3, w5
+ str w3, [fp, #0x1C] // [V39 cse11]
+ sxtw w14, w3
; byrRegs -[x14]
+ cmp w14, w23
+ blt G_M58112_IG13
+ ;; size=80 bbWeight=0.00 PerfScore 0.00
+G_M58112_IG05: ; bbWeight=0.13, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ldr w14, [x20, #0x08]
+ cmp w22, w14
+ bhs G_M58112_IG32
add x14, x20, #16
; byrRegs +[x14]
lsl x15, x27, #2
str w4, [x14, x15]
cmp w4, w25
- bhs G_M58112_IG49
+ bhs G_M58112_IG32
ldr x15, [x26, w4, UXTW #3]
; gcrRegs +[x15]
- mov x7, x15
- ; gcrRegs +[x7]
- ldr w14, [x7, #0x08]
+ mov x14, x15
+ ; gcrRegs +[x14]
; byrRegs -[x14]
- cmp w22, w14
- bhs G_M58112_IG49
- add x14, x7, #16
+ ldr w12, [x14, #0x08]
+ cmp w22, w12
+ bhs G_M58112_IG32
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x28]
fcmp d16, #0.0
- beq G_M58112_IG53
+ beq G_M58112_IG36
cmp w4, w22
beq G_M58112_IG07
- ;; size=64 bbWeight=0.12 PerfScore 2.49
-G_M58112_IG06: ; bbWeight=0.12, gcrefRegs=188004 {x2 x15 x19 x20}, byrefRegs=4000000 {x26}, byref
- ; gcrRegs -[x7]
+ ;; size=76 bbWeight=0.13 PerfScore 3.08
+G_M58112_IG06: ; bbWeight=0.13, gcrefRegs=188004 {x2 x15 x19 x20}, byrefRegs=4000000 {x26}, byref
; byrRegs -[x14]
add x14, x26, x28
; byrRegs +[x14]
@@ -150,403 +148,222 @@ G_M58112_IG06: ; bbWeight=0.12, gcrefRegs=188004 {x2 x15 x19 x20}, byrefR
bl CORINFO_HELP_ARRADDR_ST
; gcrRegs -[x0 x2]
; gcr arg pop 0
- ;; size=20 bbWeight=0.12 PerfScore 0.44
-G_M58112_IG07: ; bbWeight=0.12, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ;; size=20 bbWeight=0.13 PerfScore 0.44
+G_M58112_IG07: ; bbWeight=0.13, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
sub w0, w23, #1
cmp w22, w0
bge G_M58112_IG23
- ;; size=12 bbWeight=0.12 PerfScore 0.25
-G_M58112_IG08: ; bbWeight=0.12, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
- ldr x4, [x26, x28]
- ; gcrRegs +[x4]
- ldr w0, [x4, #0x08]
- cmp w22, w0
- bhs G_M58112_IG49
- add x0, x4, #16
+ ;; size=12 bbWeight=0.13 PerfScore 0.25
+G_M58112_IG08: ; bbWeight=0.13, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ldr x0, [x26, x28]
+ ; gcrRegs +[x0]
+ ldr w1, [x0, #0x08]
+ cmp w22, w1
+ bhs G_M58112_IG32
+ add x0, x0, #16
+ ; gcrRegs -[x0]
; byrRegs +[x0]
ldr d16, [x0, x28]
fmov d17, #1.0000
...
-460 (-31.94%) : 94806.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,141 +10,140 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 20, 5.11) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T17] ( 7, 2.01) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T06] ( 13, 5.10) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T17] ( 4, 2.02) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T03] ( 6,102.99) int -> x21
-; V03 loc1 [V03,T18] ( 19, 3.13) int -> x23
-; V04 loc2 [V04,T33] ( 7, 0.02) int -> x24
-; V05 loc3 [V05,T07] ( 30, 6.16) int -> x22
-; V06 loc4 [V06,T23] ( 22, 0.15) int -> x4
-; V07 loc5 [V07,T41] ( 8, 1.09) double -> d8
-; V08 loc6 [V08,T15] ( 22, 4.19) int -> x6
-; V09 loc7 [V09,T40] ( 9, 2.10) double -> d9
-; V10 loc8 [V10,T34] ( 4, 0.02) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T42] ( 5, 1.03) double -> d10
-; V12 loc10 [V12,T16] ( 19, 4.12) int -> x4
-; V13 loc11 [V13,T13] ( 9, 5.06) int -> x3
+; V03 loc1 [V03,T18] ( 13, 3.13) int -> x23
+; V04 loc2 [V04,T33] ( 2, 0.02) int -> x24
+; V05 loc3 [V05,T07] ( 18, 6.17) int -> x22
+; V06 loc4 [V06,T23] ( 12, 0.16) int -> x3
+; V07 loc5 [V07,T36] ( 5, 1.09) double -> d8
+; V08 loc6 [V08,T15] ( 14, 4.18) int -> x4
+; V09 loc7 [V09,T35] ( 6, 2.10) double -> d9
+; V10 loc8 [V10,T32] ( 2, 0.02) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T37] ( 3, 1.03) double -> d16
+; V12 loc10 [V12,T16] ( 12, 4.11) int -> x0
+; V13 loc11 [V13,T13] ( 7, 5.06) int -> x3
; V14 loc12 [V14,T11] ( 8, 6.04) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T14] ( 6, 5.00) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T39] ( 3,100 ) double -> d16
+; V16 loc14 [V16,T34] ( 3,100 ) double -> d16
; V17 loc15 [V17,T01] ( 13,400.96) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T08] ( 9, 6.11) byref -> x6 "dup spill"
-; V20 tmp2 [V20,T27] ( 4, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V19 tmp1 [V19,T08] ( 6, 6.11) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T28] ( 2, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V21 tmp3 [V21,T00] ( 6,593.95) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T24] ( 6, 0.06) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T09] ( 9, 6.11) ref -> registers "arr expr"
-; V25 tmp7 [V25,T25] ( 6, 0.06) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T26] ( 6, 0.06) ref -> x3 "arr expr"
-; V27 tmp9 [V27,T10] ( 9, 6.11) ref -> x5 "arr expr"
+; V23 tmp5 [V23,T24] ( 3, 0.06) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T09] ( 6, 6.11) ref -> x14 "arr expr"
+; V25 tmp7 [V25,T25] ( 3, 0.06) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T26] ( 3, 0.06) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T10] ( 6, 6.11) ref -> x1 "arr expr"
; V28 cse0 [V28,T29] ( 3, 0.03) ref -> x15 "CSE - conservative"
-; V29 cse1 [V29,T36] ( 3, 0.00) ref -> x15 "CSE - conservative"
-; V30 cse2 [V30,T37] ( 3, 0.00) ref -> x2 "CSE - conservative"
-; V31 cse3 [V31,T30] ( 3, 0.03) ref -> x2 "CSE - conservative"
-; V32 cse4 [V32,T02] ( 3,294.01) long -> x15 "CSE - aggressive"
-; V33 cse5 [V33,T22] ( 11, 2.09) long -> x27 "CSE - aggressive"
-; V34 cse6 [V34,T19] ( 3, 3.02) long -> x14 "CSE - aggressive"
-; V35 cse7 [V35,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
-; V36 cse8 [V36,T32] ( 9, 0.02) long -> x26 "CSE - conservative"
-; V37 cse9 [V37,T04] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T05] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T12] ( 19, 5.10) byref -> x25 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T20] ( 4, 3.00) int -> xip0 hoist multi-def "CSE - moderate"
-; V41 cse13 [V41,T28] ( 4, 0.04) int -> x28 "CSE - conservative"
-; V42 cse14 [V42,T35] ( 4, 0.00) int -> x27 "CSE - conservative"
-; V43 cse15 [V43,T31] ( 3, 0.03) long -> x26 "CSE - conservative"
-; V44 cse16 [V44,T38] ( 3, 0.00) long -> x14 "CSE - conservative"
+; V29 cse1 [V29,T30] ( 3, 0.03) ref -> x2 "CSE - conservative"
+; V30 cse2 [V30,T02] ( 3,294.01) long -> x15 "CSE - aggressive"
+; V31 cse3 [V31,T22] ( 11, 2.11) long -> x27 "CSE - aggressive"
+; V32 cse4 [V32,T19] ( 3, 3.02) long -> x14 "CSE - aggressive"
+; V33 cse5 [V33,T21] ( 3, 2.97) long -> x15 "CSE - moderate"
+; V34 cse6 [V34,T04] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T05] ( 4,100.00) byref -> registers hoist multi-def "CSE - aggressive"
+; V36 cse8 [V36,T12] ( 12, 5.10) byref -> x25 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T20] ( 4, 3.00) int -> xip0 hoist multi-def "CSE - moderate"
+; V38 cse10 [V38,T27] ( 4, 0.04) int -> x28 "CSE - conservative"
+; V39 cse11 [V39,T31] ( 3, 0.03) long -> x26 "CSE - conservative"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M58112_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x70]!
+ stp d8, d9, [sp, #0x10]
+ stp x19, x20, [sp, #0x20]
+ stp x21, x22, [sp, #0x30]
+ stp x23, x24, [sp, #0x40]
+ stp x25, x26, [sp, #0x50]
+ stp x27, x28, [sp, #0x60]
mov fp, sp
ldp x20, x19, [fp, #0xD1FFAB1E]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w23, w21, [fp, #0xF8]
+ ldp w22, w24, [fp, #0xF0]
+ ldr w3, [fp, #0xB8]
+ ldp x12, x15, [fp, #0xA8]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=1 PerfScore 28.50
+ ldr d16, [fp, #0xA0]
+ ldr w14, [fp, #0x9C]
+ ;; size=60 bbWeight=1 PerfScore 23.50
G_M58112_IG02: ; bbWeight=1, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
b G_M58112_IG14
;; size=4 bbWeight=1 PerfScore 1.00
G_M58112_IG03: ; bbWeight=0.01, gcrefRegs=180000 {x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x25]
- sxtw w4, w22
- mov w26, w4
+ sxtw w3, w22
+ ldr w14, [x19, #0x08]
+ cmp w3, w14
+ bhs G_M58112_IG33
+ mov w26, w3
lsl x27, x26, #3
ldr x2, [x25, x27]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG51
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w3, w15
+ bhs G_M58112_IG33
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fabs d8, d16
- add w28, w4, #1
- sxtw w6, w28
- cmp w6, w23
+ add w28, w3, #1
+ sxtw w4, w28
+ cmp w4, w23
blt G_M58112_IG05
- ;; size=60 bbWeight=0.01 PerfScore 0.18
+ ;; size=72 bbWeight=0.01 PerfScore 0.23
G_M58112_IG04: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x5]
; byrRegs -[x14]
+ ldr w14, [x20, #0x08]
+ cmp w22, w14
+ bhs G_M58112_IG33
add x14, x20, #16
; byrRegs +[x14]
lsl x15, x26, #2
- str w4, [x14, x15]
+ str w3, [x14, x15]
ldr w14, [x19, #0x08]
; byrRegs -[x14]
- cmp w4, w14
- bhs G_M58112_IG51
- ldr x15, [x25, w4, UXTW #3]
+ cmp w3, w14
+ bhs G_M58112_IG33
+ ldr x15, [x25, w3, UXTW #3]
; gcrRegs +[x15]
- mov x7, x15
- ; gcrRegs +[x7]
- ldr w14, [x7, #0x08]
- cmp w22, w14
- bhs G_M58112_IG51
- add x14, x7, #16
+ mov x14, x15
+ ; gcrRegs +[x14]
+ ldr w12, [x14, #0x08]
+ cmp w22, w12
+ bhs G_M58112_IG33
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fcmp d16, #0.0
- beq G_M58112_IG36
+ beq G_M58112_IG37
b G_M58112_IG20
- ;; size=64 bbWeight=0.01 PerfScore 0.23
+ ;; size=76 bbWeight=0.01 PerfScore 0.28
G_M58112_IG05: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x7 x15]
+ ; gcrRegs -[x15]
; byrRegs -[x14]
- orr w14, w6, w23
+ orr w14, w4, w23
tbz w14, #31, G_M58112_IG08
;; size=8 bbWeight=0.01 PerfScore 0.02
G_M58112_IG06: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
ldr w14, [x19, #0x08]
- cmp w6, w14
- bhs G_M58112_IG51
- ldr x14, [x25, w6, UXTW #3]
+ cmp w4, w14
+ bhs G_M58112_IG33
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG51
+ bhs G_M58112_IG33
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -162,12 +161,12 @@ G_M58112_IG08: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
cmp w14, w23
blt G_M58112_IG06
;; size=12 bbWeight=0.01 PerfScore 0.05
-G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ldr x14, [x25, w6, UXTW #3]
+G_M58112_IG09: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG51
+ bhs G_M58112_IG33
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -175,18 +174,18 @@ G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
fabs d9, d16
fcmp d9, d8
bgt G_M58112_IG12
- ;; size=36 bbWeight=1.00 PerfScore 14.97
-G_M58112_IG10: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ;; size=36 bbWeight=1.01 PerfScore 15.12
...
-156 (-21.67%) : 51169.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,209 +11,163 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.98) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.98) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.98) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.00) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.94) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.94) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.06) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.06) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.04) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.02) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.98) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T12] ( 6, 2.97) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.06) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T13] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.99) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.98) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.98) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.02) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.98) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T12] ( 6, 2.97) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.06) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T13] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.99) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.98) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.98) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG06
;; size=8 bbWeight=0.99 PerfScore 1.49
-G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG08
- ldr w6, [x0, #0x08]
- cmp w6, w22
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG08
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG08
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG08
tbnz w2, #31, G_M9806_IG08
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG08
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG10
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=64 bbWeight=0.98 PerfScore 23.53
-G_M9806_IG05: ; bbWeight=98.02, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=64 bbWeight=0.98 PerfScore 23.53
+G_M9806_IG05: ; bbWeight=98.02, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG10
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG05
;; size=52 bbWeight=98.02 PerfScore 1323.26
-G_M9806_IG06: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG06: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG20
+ bge G_M9806_IG12
;; size=12 bbWeight=0.99 PerfScore 1.98
-G_M9806_IG07: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG07: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.99 PerfScore 1.49
-G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG10
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG10
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG10
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG10
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
bhs G_M9806_IG10
- add x6, x11, #16
- ; byrRegs +[x6]
- str d16, [x6, x8]
+ add x7, x13, #16
+ ; byrRegs +[x7]
...
-156 (-21.67%) : 51193.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,215 +11,169 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.94) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.94) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.94) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.04) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.82) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.82) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.18) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.18) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.12) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.10) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.94) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.91) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.12) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.97) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.94) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.94) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.10) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.94) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.91) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.12) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.97) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.94) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.94) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG07
;; size=8 bbWeight=0.97 PerfScore 1.46
-G_M9806_IG04: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG09
- ldr w6, [x0, #0x08]
- cmp w6, w22
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG09
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG09
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG09
tbnz w2, #31, G_M9806_IG09
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG09
;; size=44 bbWeight=0.96 PerfScore 15.38
-G_M9806_IG05: ; bbWeight=0.96, gcrefRegs=1800AB {x0 x1 x3 x5 x7 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+G_M9806_IG05: ; bbWeight=0.96, gcrefRegs=18012B {x0 x1 x3 x5 x8 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG12
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=20 bbWeight=0.96 PerfScore 7.69
-G_M9806_IG06: ; bbWeight=98.04, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=20 bbWeight=0.96 PerfScore 7.69
+G_M9806_IG06: ; bbWeight=98.04, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG12
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG06
;; size=52 bbWeight=98.04 PerfScore 1323.53
-G_M9806_IG07: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG07: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG22
+ bge G_M9806_IG14
;; size=12 bbWeight=0.97 PerfScore 1.94
-G_M9806_IG08: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG08: ; bbWeight=0.97, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.97 PerfScore 1.46
-G_M9806_IG09: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG09: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG12
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG12
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG12
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG10: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG10: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG12
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
bhs G_M9806_IG12
- add x6, x11, #16
- ; byrRegs +[x6]
...
-56 (-6.64%) : 72927.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -10,16 +10,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 3 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T13] ( 15, 105.20) ref -> x0 class-hnd single-def <float[][]>
+; V00 arg0 [V00,T13] ( 12, 104.99) ref -> x0 class-hnd single-def <float[][]>
; V01 arg1 [V01,T22] ( 7, 4.62) ref -> x1 class-hnd single-def <int[][]>
; V02 arg2 [V02,T23] ( 3, 3 ) ref -> x2 class-hnd single-def <double[]>
; V03 arg3 [V03,T25] ( 4, 2.21) ref -> x3 class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T24] ( 5, 2.62) int -> x4 single-def
+; V04 arg4 [V04,T24] ( 4, 2.62) int -> x4 single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T05] ( 25,1699.47) int -> x5
-; V08 loc3 [V08,T28] ( 6, 0.63) ref -> x8 class-hnd <float[]>
-; V09 loc4 [V09,T12] ( 13, 108.54) int -> x7
+; V07 loc2 [V07,T05] ( 20,1699.47) int -> x5
+; V08 loc3 [V08,T28] ( 5, 0.63) ref -> x8 class-hnd <float[]>
+; V09 loc4 [V09,T12] ( 12, 108.54) int -> x7
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T07] ( 18,1200.13) int -> x6
; V12 loc7 [V12,T31] ( 4, 199.58) float -> d16
@@ -46,7 +46,7 @@
; V33 cse3 [V33,T27] ( 5, 3.02) long -> x15 "CSE - moderate"
; V34 cse4 [V34,T10] ( 16, 304.99) int -> x12 hoist multi-def "CSE - aggressive"
; V35 cse5 [V35,T14] ( 6, 102.35) byref -> x9 hoist "CSE - aggressive"
-; V36 cse6 [V36,T15] ( 9, 101.83) int -> x2 hoist "CSE - aggressive"
+; V36 cse6 [V36,T15] ( 7, 101.62) int -> x2 hoist "CSE - aggressive"
; V37 cse7 [V37,T18] ( 4, 100.00) int -> x10 hoist multi-def "CSE - aggressive"
; V38 cse8 [V38,T16] ( 4, 100.00) byref -> x11 hoist multi-def "CSE - aggressive"
;
@@ -75,18 +75,18 @@ G_M56974_IG02: ; bbWeight=1, gcrefRegs=010F {x0 x1 x2 x3 x8}, byrefRegs=0
;; size=8 bbWeight=1 PerfScore 3.50
G_M56974_IG03: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
cmp w2, w6
- ble G_M56974_IG15
+ ble G_M56974_IG12
;; size=8 bbWeight=0.21 PerfScore 0.31
G_M56974_IG04: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
- cbz x1, G_M56974_IG25
- cbz x0, G_M56974_IG25
- tbnz w6, #31, G_M56974_IG25
+ cbz x1, G_M56974_IG22
+ cbz x0, G_M56974_IG22
+ tbnz w6, #31, G_M56974_IG22
ldr w10, [x1, #0x08]
cmp w10, w2
- blt G_M56974_IG25
+ blt G_M56974_IG22
ldr w10, [x0, #0x08]
cmp w10, w2
- blt G_M56974_IG25
+ blt G_M56974_IG22
ldr w10, [x8, #0x08]
add x11, x8, #16
; byrRegs +[x11]
@@ -97,7 +97,7 @@ G_M56974_IG04: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0
;; size=56 bbWeight=0.21 PerfScore 4.16
G_M56974_IG05: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
cmp w7, w10
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
ldr s16, [x11, x13]
ldr w15, [x14, #0x08]
cmp w15, w5
@@ -105,35 +105,18 @@ G_M56974_IG05: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
;; size=24 bbWeight=98.79 PerfScore 889.14
G_M56974_IG06: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
cmp w5, w6
- bne G_M56974_IG18
+ bne G_M56974_IG15
;; size=8 bbWeight=395.17 PerfScore 592.76
G_M56974_IG07: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref
movi v17.16b, #0
- b G_M56974_IG19
+ b G_M56974_IG16
;; size=8 bbWeight=395.17 PerfScore 592.76
G_M56974_IG08: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs -[x8 x14]
; byrRegs -[x11]
- add x8, x0, #16
- ; byrRegs +[x8]
- ldr x8, [x8, w5, UXTW #3]
- ; gcrRegs +[x8]
- ; byrRegs -[x8]
- mov w7, wzr
- cmp w4, #0
- bgt G_M56974_IG11
- ;; size=20 bbWeight=0.21 PerfScore 1.14
-G_M56974_IG09: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
- ; gcrRegs -[x8]
- add w5, w5, #1
- cmp w2, w5
- ble G_M56974_IG37
- b G_M56974_IG08
- ;; size=16 bbWeight=0.21 PerfScore 0.62
-G_M56974_IG10: ; bbWeight=0.00, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
ldr w8, [x0, #0x08]
cmp w5, w8
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
add x7, x0, #16
; byrRegs +[x7]
ldr x8, [x7, w5, UXTW #3]
@@ -141,58 +124,52 @@ G_M56974_IG10: ; bbWeight=0.00, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200
mov w7, wzr
; byrRegs -[x7]
cmp w4, #0
- ble G_M56974_IG14
- ;; size=32 bbWeight=0.00 PerfScore 0.02
-G_M56974_IG11: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
- ldr w6, [x1, #0x08]
- cmp w5, w6
- bhs G_M56974_IG36
- ldr x6, [x9, w5, UXTW #3]
- ; gcrRegs +[x6]
- tbnz w7, #31, G_M56974_IG15
- ;; size=20 bbWeight=0.21 PerfScore 1.78
-G_M56974_IG12: ; bbWeight=6.68, gcrefRegs=014B {x0 x1 x3 x6 x8}, byrefRegs=0200 {x9}, byref, isz
- ldr w6, [x6, #0x08]
- ; gcrRegs -[x6]
- cmp w6, w7
- ble G_M56974_IG15
- ;; size=12 bbWeight=6.68 PerfScore 30.07
-G_M56974_IG13: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
- add w6, w5, #1
- b G_M56974_IG03
- ;; size=8 bbWeight=0.21 PerfScore 0.31
-G_M56974_IG14: ; bbWeight=0.00, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
+ bgt G_M56974_IG10
+ ;; size=32 bbWeight=0.21 PerfScore 2.09
+G_M56974_IG09: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs -[x8]
add w5, w5, #1
cmp w2, w5
- ble G_M56974_IG37
- b G_M56974_IG10
- ;; size=16 bbWeight=0.00 PerfScore 0.01
-G_M56974_IG15: ; bbWeight=0.41, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
+ ble G_M56974_IG34
+ b G_M56974_IG08
+ ;; size=16 bbWeight=0.21 PerfScore 0.63
+G_M56974_IG10: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
; gcrRegs +[x8]
+ ldr w6, [x1, #0x08]
+ cmp w5, w6
+ bhs G_M56974_IG33
+ ldr x6, [x9, w5, UXTW #3]
+ ; gcrRegs +[x6]
+ tbnz w7, #31, G_M56974_IG12
+ ;; size=20 bbWeight=0.21 PerfScore 1.78
+G_M56974_IG11: ; bbWeight=6.68, gcrefRegs=014B {x0 x1 x3 x6 x8}, byrefRegs=0200 {x9}, byref, isz
+ ldr w6, [x6, #0x08]
+ ; gcrRegs -[x6]
+ cmp w6, w7
+ bgt G_M56974_IG14
+ ;; size=12 bbWeight=6.68 PerfScore 30.07
+G_M56974_IG12: ; bbWeight=0.41, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref, isz
add w7, w7, #1
cmp w7, w4
- blt G_M56974_IG11
+ blt G_M56974_IG10
;; size=12 bbWeight=0.41 PerfScore 0.82
-G_M56974_IG16: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref, isz
+G_M56974_IG13: ; bbWeight=0.21, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref
; gcrRegs -[x8]
- cbz x0, G_M56974_IG14
- tbnz w5, #31, G_M56974_IG14
- ldr w8, [x0, #0x08]
- cmp w8, w2
- blt G_M56974_IG14
- ;; size=20 bbWeight=0.21 PerfScore 1.36
-G_M56974_IG17: ; bbWeight=0.64, gcrefRegs=000B {x0 x1 x3}, byrefRegs=0200 {x9}, byref
b G_M56974_IG09
- ;; size=4 bbWeight=0.64 PerfScore 0.64
-G_M56974_IG18: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
- ; gcrRegs +[x8 x14]
+ ;; size=4 bbWeight=0.21 PerfScore 0.21
+G_M56974_IG14: ; bbWeight=0.21, gcrefRegs=010B {x0 x1 x3 x8}, byrefRegs=0200 {x9}, byref
+ ; gcrRegs +[x8]
+ add w6, w5, #1
+ b G_M56974_IG03
+ ;; size=8 bbWeight=0.21 PerfScore 0.31
+G_M56974_IG15: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+ ; gcrRegs +[x14]
; byrRegs +[x11]
mov x15, x14
; gcrRegs +[x15]
ldr wip0, [x15, #0x08]
cmp w5, wip0
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
@@ -203,14 +180,14 @@ G_M56974_IG18: ; bbWeight=395.17, gcrefRegs=410B {x0 x1 x3 x8 x14}, byref
sub wip0, wip0, #1
ldr w19, [x15, #0x08]
cmp wip0, w19
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
ldr s17, [x15, wip0, UXTW #2]
fcvt d17, s17
;; size=56 bbWeight=395.17 PerfScore 8101.05
-G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG16: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
; byrRegs -[x15]
fcvt d16, s16
fadd d16, d16, d17
@@ -218,15 +195,15 @@ G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
ldr x15, [x9, xip0]
; gcrRegs +[x15]
sxtw w19, w12
- tbnz w19, #31, G_M56974_IG24
+ tbnz w19, #31, G_M56974_IG21
;; size=24 bbWeight=98.79 PerfScore 1136.12
-G_M56974_IG20: ; bbWeight=3161.38, gcrefRegs=C10B {x0 x1 x3 x8 x14 x15}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG17: ; bbWeight=3161.38, gcrefRegs=C10B {x0 x1 x3 x8 x14 x15}, byrefRegs=0A00 {x9 x11}, byref, isz
ldr w15, [x15, #0x08]
; gcrRegs -[x15]
cmp w15, w19
- ble G_M56974_IG24
+ ble G_M56974_IG21
;; size=12 bbWeight=3161.38 PerfScore 14226.23
-G_M56974_IG21: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG18: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
add x15, x0, #16
; byrRegs +[x15]
ldr x15, [x15, xip0]
@@ -234,27 +211,27 @@ G_M56974_IG21: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefR
; byrRegs -[x15]
ldr w19, [x15, #0x08]
cmp w12, w19
- bhs G_M56974_IG36
+ bhs G_M56974_IG33
add x15, x15, #16
; gcrRegs -[x15]
; byrRegs +[x15]
ldr s17, [x15, w12, UXTW #2]
fcvt d17, s17
fcmp d17, d16
- bgt G_M56974_IG24
+ bgt G_M56974_IG21
;; size=40 bbWeight=98.79 PerfScore 1630.09
-G_M56974_IG22: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
+G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=410B {x0 x1 x3 x8 x14}, byrefRegs=0A00 {x9 x11}, byref, isz
; byrRegs -[x15]
...
benchmarks.run_tiered.windows.arm64.checked.mch
-424 (-31.74%) : 48566.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -9,93 +9,90 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T20] ( 11, 11.04) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T25] ( 7, 6.02) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T20] ( 7, 11 ) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T25] ( 4, 6 ) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T12] ( 6, 36 ) int -> x23
-; V03 loc1 [V03,T08] ( 19, 55.92) int -> x22
-; V04 loc2 [V04,T21] ( 7, 13 ) int -> x24
-; V05 loc3 [V05,T04] ( 34, 79.06) int -> x21
-; V06 loc4 [V06,T14] ( 22, 26.02) int -> x4
-; V07 loc5 [V07,T37] ( 8, 26.00) double -> d8
-; V08 loc6 [V08,T06] ( 22, 78.30) int -> registers
-; V09 loc7 [V09,T36] ( 9, 40.00) double -> d9
-; V10 loc8 [V10,T31] ( 4, 4 ) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T38] ( 5, 18 ) double -> d10
-; V12 loc10 [V12,T07] ( 19, 70.30) int -> x4
-; V13 loc11 [V13,T13] ( 9, 32 ) int -> x3
+; V03 loc1 [V03,T08] ( 13, 56 ) int -> x22
+; V04 loc2 [V04,T24] ( 2, 10 ) int -> x24
+; V05 loc3 [V05,T04] ( 19, 80 ) int -> x21
+; V06 loc4 [V06,T14] ( 12, 28 ) int -> x1
+; V07 loc5 [V07,T34] ( 5, 26 ) double -> d16
+; V08 loc6 [V08,T06] ( 14, 78.16) int -> x14
+; V09 loc7 [V09,T33] ( 6, 40 ) double -> d17
+; V10 loc8 [V10,T31] ( 2, 4 ) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T35] ( 3, 18 ) double -> d16
+; V12 loc10 [V12,T07] ( 12, 70.16) int -> x0
+; V13 loc11 [V13,T13] ( 7, 32 ) int -> x3
; V14 loc12 [V14,T17] ( 9, 18.24) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T19] ( 6, 14.20) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T39] ( 3, 18 ) double -> d16
+; V16 loc14 [V16,T36] ( 3, 18 ) double -> d16
; V17 loc15 [V17,T05] ( 13, 78.32) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T00] ( 9, 96.00) byref -> x6 "dup spill"
-; V20 tmp2 [V20,T26] ( 4, 8 ) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V21 tmp3 [V21,T03] ( 6, 96 ) byref -> registers "dup spill"
+; V19 tmp1 [V19,T00] ( 6, 96 ) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 8 ) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V21 tmp3 [V21,T01] ( 6, 96 ) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T22] ( 6, 12 ) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T01] ( 9, 96.00) ref -> x6 "arr expr"
-; V25 tmp7 [V25,T23] ( 6, 12 ) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T24] ( 6, 12 ) ref -> x3 "arr expr"
-; V27 tmp9 [V27,T02] ( 9, 96.00) ref -> x5 "arr expr"
-; V28 cse0 [V28,T29] ( 3, 5.94) ref -> x15 "CSE - moderate"
-; V29 cse1 [V29,T34] ( 3, 0.06) ref -> x2 "CSE - conservative"
-; V30 cse2 [V30,T35] ( 3, 0.06) ref -> x15 "CSE - conservative"
-; V31 cse3 [V31,T30] ( 3, 5.94) ref -> x2 "CSE - moderate"
-; V32 cse4 [V32,T11] ( 11, 45.54) long -> x27 "CSE - aggressive"
-; V33 cse5 [V33,T09] ( 3, 47.52) long -> x15 "CSE - aggressive"
-; V34 cse6 [V34,T28] ( 3, 6 ) long -> x14 "CSE - moderate"
-; V35 cse7 [V35,T33] ( 9, 0.46) long -> x27 "CSE - conservative"
-; V36 cse8 [V36,T32] ( 3, 0.48) long -> x0 "CSE - conservative"
-; V37 cse9 [V37,T10] ( 19, 47.02) byref -> x26 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T15] ( 4, 20.04) byref -> xip0 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T16] ( 4, 20.04) byref -> x1 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T18] ( 15, 14.64) int -> x25 multi-def "CSE - moderate"
-; V41 cse13 [V41,T27] ( 4, 7.92) int -> x28 "CSE - moderate"
+; V23 tmp5 [V23,T21] ( 3, 12 ) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T02] ( 6, 96 ) ref -> x15 "arr expr"
+; V25 tmp7 [V25,T22] ( 3, 12 ) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T23] ( 3, 12 ) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T03] ( 6, 96 ) ref -> x1 "arr expr"
+; V28 cse0 [V28,T28] ( 3, 6 ) ref -> x2 "CSE - moderate"
+; V29 cse1 [V29,T29] ( 3, 6 ) ref -> x15 "CSE - moderate"
+; V30 cse2 [V30,T11] ( 11, 46 ) long -> x27 "CSE - aggressive"
+; V31 cse3 [V31,T09] ( 3, 47.52) long -> x15 "CSE - aggressive"
+; V32 cse4 [V32,T30] ( 3, 6 ) long -> x14 "CSE - moderate"
+; V33 cse5 [V33,T32] ( 3, 0.48) long -> x0 "CSE - conservative"
+; V34 cse6 [V34,T10] ( 12, 47 ) byref -> x26 hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T18] ( 10, 16.32) int -> x25 multi-def "CSE - aggressive"
+; V36 cse8 [V36,T15] ( 4, 20.04) byref -> xip0 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T16] ( 4, 20.04) byref -> x1 hoist multi-def "CSE - aggressive"
+; V38 cse10 [V38,T26] ( 4, 8 ) int -> x28 "CSE - moderate"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M58112_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x60]!
+ stp x19, x20, [sp, #0x10]
+ stp x21, x22, [sp, #0x20]
+ stp x23, x24, [sp, #0x30]
+ stp x25, x26, [sp, #0x40]
+ stp x27, x28, [sp, #0x50]
mov fp, sp
- ldp x20, x19, [fp, #0xD1FFAB1E]
+ ldp x20, x19, [fp, #0xF0]
; gcrRegs +[x19-x20]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w22, w23, [fp, #0xE8]
+ ldp w21, w24, [fp, #0xE0]
+ ldr w3, [fp, #0xA8]
+ ldp x12, x15, [fp, #0x98]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=0.01 PerfScore 0.28
+ ldr d16, [fp, #0x90]
+ ldr w14, [fp, #0x8C]
+ ;; size=56 bbWeight=0.01 PerfScore 0.22
G_M58112_IG02: ; bbWeight=0.01, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
- b G_M58112_IG31
+ b G_M58112_IG21
;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M58112_IG03: ; bbWeight=1.98, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+G_M58112_IG03: ; bbWeight=2, gcrefRegs=180000 {x19 x20}, byrefRegs=4000000 {x26}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x26]
- sxtw w4, w21
- ubfiz x27, x4, #3, #32
+ sxtw w1, w21
+ ldr w25, [x19, #0x08]
+ cmp w1, w25
+ bhs G_M58112_IG31
+ ubfiz x27, x1, #3, #32
ldr x2, [x26, x27]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG41
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w1, w15
+ bhs G_M58112_IG31
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
- fabs d8, d16
- add w28, w4, #1
+ fabs d16, d16
+ add w28, w1, #1
sxtw w14, w28
; byrRegs -[x14]
cmp w14, w22
@@ -104,379 +101,233 @@ G_M58112_IG03: ; bbWeight=1.98, gcrefRegs=180000 {x19 x20}, byrefRegs=400
cmp w15, #0
ccmp w25, w22, nc, ge
blt G_M58112_IG08
- ;; size=72 bbWeight=1.98 PerfScore 39.60
-G_M58112_IG04: ; bbWeight=15.68, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
- ; gcrRegs -[x5]
- ldr x6, [x26, w14, UXTW #3]
- ; gcrRegs +[x6]
- ldr w15, [x6, #0x08]
- cmp w21, w15
- bhs G_M58112_IG41
- add x6, x6, #16
- ; gcrRegs -[x6]
- ; byrRegs +[x6]
- ldr d16, [x6, x27]
- fabs d9, d16
- fcmp d9, d8
+ ;; size=84 bbWeight=2 PerfScore 49.00
+G_M58112_IG04: ; bbWeight=15.84, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ldr x15, [x26, w14, UXTW #3]
+ ; gcrRegs +[x15]
+ ldr w12, [x15, #0x08]
+ cmp w21, w12
+ bhs G_M58112_IG31
+ add x15, x15, #16
+ ; gcrRegs -[x15]
+ ; byrRegs +[x15]
+ ldr d17, [x15, x27]
+ fabs d17, d17
+ fcmp d17, d16
ble G_M58112_IG06
- ;; size=36 bbWeight=15.68 PerfScore 235.22
-G_M58112_IG05: ; bbWeight=7.84, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
- ; byrRegs -[x6]
- sxtw w4, w14
- fmov d8, d9
- ;; size=8 bbWeight=7.84 PerfScore 7.84
-G_M58112_IG06: ; bbWeight=15.68, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
+ ;; size=36 bbWeight=15.84 PerfScore 237.60
+G_M58112_IG05: ; bbWeight=7.92, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
+ ; byrRegs -[x15]
+ sxtw w1, w14
+ fmov d16, d17
+ ;; size=8 bbWeight=7.92 PerfScore 7.92
+G_M58112_IG06: ; bbWeight=15.84, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
add w14, w14, #1
cmp w14, w22
blt G_M58112_IG04
- ;; size=12 bbWeight=15.68 PerfScore 31.36
-G_M58112_IG07: ; bbWeight=1.98, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
+ ;; size=12 bbWeight=15.84 PerfScore 31.68
+G_M58112_IG07: ; bbWeight=2, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
b G_M58112_IG11
- ;; size=4 bbWeight=1.98 PerfScore 1.98
+ ;; size=4 bbWeight=2 PerfScore 2.00
G_M58112_IG08: ; bbWeight=0.16, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
cmp w14, w25
- bhs G_M58112_IG41
- ldr x6, [x26, w14, UXTW #3]
- ; gcrRegs +[x6]
- ldr w15, [x6, #0x08]
- cmp w21, w15
- bhs G_M58112_IG41
- add x15, x6, #16
+ bhs G_M58112_IG31
+ ldr x15, [x26, w14, UXTW #3]
+ ; gcrRegs +[x15]
+ ldr w12, [x15, #0x08]
+ cmp w21, w12
+ bhs G_M58112_IG31
+ add x15, x15, #16
+ ; gcrRegs -[x15]
; byrRegs +[x15]
- ldr d16, [x15, x27]
- fabs d9, d16
- fcmp d9, d8
+ ldr d17, [x15, x27]
+ fabs d17, d17
+ fcmp d17, d16
ble G_M58112_IG10
- ;; size=44 bbWeight=0.16 PerfScore 2.61
+ ;; size=44 bbWeight=0.16 PerfScore 2.64
G_M58112_IG09: ; bbWeight=0.08, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref
- ; gcrRegs -[x6]
; byrRegs -[x15]
- sxtw w4, w14
- fmov d8, d9
+ sxtw w1, w14
+ fmov d16, d17
;; size=8 bbWeight=0.08 PerfScore 0.08
G_M58112_IG10: ; bbWeight=0.16, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=4000000 {x26}, byref, isz
...
-152 (-14.13%) : 32768.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -10,60 +10,56 @@
; Final local variable assignments
;
; V00 arg0 [V00,T16] ( 7, 10.09) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T13] ( 9, 14.33) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T18] ( 12, 9.10) ref -> x20 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T19] ( 12, 9.10) ref -> x21 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T08] ( 12, 20 ) int -> x19 single-def
-; V05 loc0 [V05,T10] ( 12, 20.08) ref -> x24 class-hnd <double[][]>
-; V06 loc1 [V06,T09] ( 13, 20.32) ref -> x23 class-hnd <double[]>
-; V07 loc2 [V07,T28] ( 2, 2 ) long -> x25
+; V01 arg1 [V01,T13] ( 7, 14.21) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T18] ( 9, 9.08) ref -> x20 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T19] ( 9, 9.08) ref -> x21 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T12] ( 8, 17 ) int -> x19 single-def
+; V05 loc0 [V05,T09] ( 11, 20.08) ref -> x24 class-hnd <double[][]>
+; V06 loc1 [V06,T08] ( 10, 20.20) ref -> x23 class-hnd <double[]>
+; V07 loc2 [V07,T28] ( 2, 2 ) long -> x27
; V08 loc3 [V08,T02] ( 14, 94.16) int -> x2
-; V09 loc4 [V09,T07] ( 11, 27.04) int -> x3
-; V10 loc5 [V10,T00] ( 40,127.84) int -> x22
+; V09 loc4 [V09,T06] ( 6, 30 ) int -> x3
+; V10 loc5 [V10,T00] ( 32,127.52) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T36] ( 6, 64.00) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T01] ( 6, 96 ) ref -> x9 class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V14 tmp3 [V14,T37] ( 4, 64 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V12 tmp1 [V12,T33] ( 4, 64 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T01] ( 6, 96 ) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V14 tmp3 [V14,T34] ( 4, 64 ) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
; V16 tmp5 [V16,T20] ( 6, 10 ) ref -> registers class-hnd exact "Inline stloc first use temp" <<unknown class>>
-; V17 tmp6 [V17 ] ( 4, 8 ) int -> [fp+0x10] do-not-enreg[X] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp"
+; V17 tmp6 [V17 ] ( 4, 8 ) int -> [fp+0x18] do-not-enreg[X] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp"
;* V18 tmp7 [V18 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V19 tmp8 [V19,T03] ( 5, 64.32) ref -> x10 "arr expr"
-; V20 cse0 [V20,T11] ( 4, 20.04) ref -> x8 hoist multi-def "CSE - aggressive"
-; V21 cse1 [V21,T33] ( 2, 0.20) ref -> x5 hoist "CSE - conservative"
-; V22 cse2 [V22,T06] ( 6, 27.92) ref -> x5 multi-def "CSE - aggressive"
-; V23 cse3 [V23,T15] ( 6, 12.12) long -> x4 hoist multi-def "CSE - aggressive"
-; V24 cse4 [V24,T04] ( 3, 47.52) long -> x7 "CSE - aggressive"
-; V25 cse5 [V25,T05] ( 3, 47.04) long -> x4 "CSE - aggressive"
+; V19 tmp8 [V19,T03] ( 5, 64.32) ref -> x13 "arr expr"
+; V20 cse0 [V20,T10] ( 4, 20.04) ref -> x10 hoist multi-def "CSE - aggressive"
+; V21 cse1 [V21,T31] ( 2, 0.20) ref -> x7 hoist "CSE - conservative"
+; V22 cse2 [V22,T07] ( 6, 27.92) ref -> x7 multi-def "CSE - aggressive"
+; V23 cse3 [V23,T15] ( 6, 12.12) long -> x6 hoist multi-def "CSE - aggressive"
+; V24 cse4 [V24,T04] ( 3, 47.52) long -> x6 "CSE - aggressive"
+; V25 cse5 [V25,T05] ( 3, 47.52) long -> x9 "CSE - aggressive"
; V26 cse6 [V26,T17] ( 3, 11.88) long -> x0 "CSE - aggressive"
-; V27 cse7 [V27,T25] ( 3, 5.94) long -> x2 "CSE - aggressive"
-; V28 cse8 [V28,T29] ( 3, 0.48) long -> x4 "CSE - conservative"
-; V29 cse9 [V29,T30] ( 3, 0.48) long -> x6 "CSE - conservative"
-; V30 cse10 [V30,T31] ( 3, 0.48) long -> x4 "CSE - conservative"
-; V31 cse11 [V31,T34] ( 3, 0.12) long -> x0 "CSE - conservative"
-; V32 cse12 [V32,T35] ( 3, 0.06) long -> x2 "CSE - conservative"
-; V33 cse13 [V33,T27] ( 3, 4.05) byref -> x26 hoist "CSE - aggressive"
-; V34 cse14 [V34,T14] ( 4, 16.01) byref -> x25 hoist "CSE - aggressive"
-; V35 cse15 [V35,T24] ( 4, 8.08) int -> x6 hoist multi-def "CSE - aggressive"
-; V36 cse16 [V36,T23] ( 4, 8.08) byref -> x7 hoist multi-def "CSE - aggressive"
-; V37 cse17 [V37,T12] ( 4, 19.84) byref -> x2 hoist multi-def "CSE - aggressive"
-; V38 cse18 [V38,T26] ( 4, 5.04) long -> x26 hoist multi-def "CSE - aggressive"
-; V39 cse19 [V39,T21] ( 8, 9.04) byref -> x27 hoist multi-def "CSE - aggressive"
-; V40 cse20 [V40,T22] ( 8, 9.04) byref -> x28 hoist multi-def "CSE - aggressive"
-; V41 cse21 [V41,T32] ( 2, 0.24) byref -> x2 hoist "CSE - conservative"
+; V27 cse7 [V27,T25] ( 3, 6 ) long -> x2 "CSE - aggressive"
+; V28 cse8 [V28,T29] ( 3, 0.48) long -> x6 "CSE - conservative"
+; V29 cse9 [V29,T30] ( 3, 0.48) long -> x8 "CSE - conservative"
+; V30 cse10 [V30,T32] ( 3, 0.12) long -> x0 "CSE - conservative"
+; V31 cse11 [V31,T27] ( 3, 4.05) byref -> x5 hoist "CSE - aggressive"
+; V32 cse12 [V32,T14] ( 3, 16.01) byref -> x4 hoist "CSE - aggressive"
+; V33 cse13 [V33,T24] ( 4, 8.08) int -> x8 hoist multi-def "CSE - aggressive"
+; V34 cse14 [V34,T23] ( 4, 8.08) byref -> x9 hoist multi-def "CSE - aggressive"
+; V35 cse15 [V35,T11] ( 4, 20.04) byref -> x2 hoist multi-def "CSE - aggressive"
+; V36 cse16 [V36,T26] ( 4, 5.04) long -> x28 hoist multi-def "CSE - aggressive"
+; V37 cse17 [V37,T21] ( 6, 9.04) byref -> x25 hoist multi-def "CSE - aggressive"
+; V38 cse18 [V38,T22] ( 6, 9.04) byref -> x26 hoist multi-def "CSE - aggressive"
;
-; Lcl frame size = 8
+; Lcl frame size = 16
G_M9806_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
stp fp, lr, [sp, #-0x70]!
- str d8, [sp, #0x18]
stp x19, x20, [sp, #0x20]
stp x21, x22, [sp, #0x30]
stp x23, x24, [sp, #0x40]
stp x25, x26, [sp, #0x50]
stp x27, x28, [sp, #0x60]
mov fp, sp
- str xzr, [fp, #0x10] // [V17 tmp6]
+ str xzr, [fp, #0x18] // [V17 tmp6]
ldp x1, x0, [fp, #0xE0]
; gcrRegs +[x0-x1]
ldp x21, x20, [fp, #0xD0]
@@ -73,35 +69,41 @@ G_M9806_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byre
; gcrRegs +[x23-x24]
ldp w3, w2, [fp, #0xA8]
ldr w22, [fp, #0xA4]
- ;; size=60 bbWeight=0.01 PerfScore 0.23
+ ;; size=56 bbWeight=0.01 PerfScore 0.22
G_M9806_IG02: ; bbWeight=0.01, gcrefRegs=1B00003 {x0 x1 x20 x21 x23 x24}, byrefRegs=0000 {}, byref
- add x25, x1, #16
- ; byrRegs +[x25]
- add x26, x0, #16
- ; byrRegs +[x26]
- b G_M9806_IG27
+ add x4, x1, #16
+ ; byrRegs +[x4]
+ add x5, x0, #16
+ ; byrRegs +[x5]
+ b G_M9806_IG22
;; size=12 bbWeight=0.01 PerfScore 0.02
-G_M9806_IG03: ; bbWeight=1.98, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref
+G_M9806_IG03: ; bbWeight=2, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0030 {x4 x5}, byref, isz
; gcrRegs -[x23-x24]
- add x27, x20, #16
- ; byrRegs +[x27]
+ ldr w2, [x20, #0x08]
+ cmp w3, w2
+ bhs G_M9806_IG30
+ add x25, x20, #16
+ ; byrRegs +[x25]
ubfiz x2, x3, #3, #32
- ldr x24, [x27, x2]
+ ldr x24, [x25, x2]
; gcrRegs +[x24]
- add x28, x21, #16
- ; byrRegs +[x28]
- ldr x23, [x28, x2]
+ ldr w6, [x21, #0x08]
+ cmp w3, w6
+ bhs G_M9806_IG30
+ add x26, x21, #16
+ ; byrRegs +[x26]
+ ldr x23, [x26, x2]
; gcrRegs +[x23]
mov w22, wzr
- b G_M9806_IG26
- ;; size=28 bbWeight=1.98 PerfScore 18.81
-G_M9806_IG04: ; bbWeight=7.92, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000000 {x25 x26}, byref, isz
+ b G_M9806_IG21
+ ;; size=52 bbWeight=2 PerfScore 37.00
+G_M9806_IG04: ; bbWeight=8, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0030 {x4 x5}, byref, isz
; gcrRegs -[x24]
- ; byrRegs -[x27-x28]
+ ; byrRegs -[x25-x26]
mov w22, wzr
cbz x1, G_M9806_IG08
- ;; size=8 bbWeight=7.92 PerfScore 11.88
-G_M9806_IG05: ; bbWeight=3.96, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000000 {x25 x26}, byref, isz
+ ;; size=8 bbWeight=8 PerfScore 12.00
+G_M9806_IG05: ; bbWeight=4, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0030 {x4 x5}, byref, isz
cbz x23, G_M9806_IG08
ldr w2, [x1, #0x08]
cmp w2, #101
@@ -111,143 +113,88 @@ G_M9806_IG05: ; bbWeight=3.96, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byre
blt G_M9806_IG08
add x2, x23, #16
; byrRegs +[x2]
- ;; size=32 bbWeight=3.96 PerfScore 41.58
-G_M9806_IG06: ; bbWeight=15.68, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000004 {x2 x25 x26}, byref, isz
+ ;; size=32 bbWeight=4 PerfScore 42.00
+G_M9806_IG06: ; bbWeight=15.84, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0034 {x2 x4 x5}, byref, isz
; gcrRegs -[x23]
- ubfiz x4, x22, #3, #32
- ldr d8, [x25, x4]
- str d8, [x2, x4]
+ ubfiz x6, x22, #3, #32
+ ldr d16, [x4, x6]
+ str d16, [x2, x6]
add w22, w22, #1
cmp w22, #101
blt G_M9806_IG06
- ;; size=24 bbWeight=15.68 PerfScore 109.77
-G_M9806_IG07: ; bbWeight=3.96, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref
+ ;; size=24 bbWeight=15.84 PerfScore 110.88
+G_M9806_IG07: ; bbWeight=4, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0030 {x4 x5}, byref
; byrRegs -[x2]
b G_M9806_IG10
- ;; size=4 bbWeight=3.96 PerfScore 3.96
-G_M9806_IG08: ; bbWeight=0.04, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000000 {x25 x26}, byref
+ ;; size=4 bbWeight=4 PerfScore 4.00
+G_M9806_IG08: ; bbWeight=0.04, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0030 {x4 x5}, byref
; gcrRegs +[x23]
ldr wzr, [x1, #0x08]
add x2, x23, #16
; byrRegs +[x2]
;; size=8 bbWeight=0.04 PerfScore 0.14
-G_M9806_IG09: ; bbWeight=0.16, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=6000004 {x2 x25 x26}, byref, isz
- ldr w4, [x1, #0x08]
- cmp w22, w4
- bhs G_M9806_IG35
- ubfiz x4, x22, #3, #32
- ldr d8, [x25, x4]
- ldr w5, [x23, #0x08]
- cmp w22, w5
- bhs G_M9806_IG35
- str d8, [x2, x4]
+G_M9806_IG09: ; bbWeight=0.16, gcrefRegs=B00003 {x0 x1 x20 x21 x23}, byrefRegs=0034 {x2 x4 x5}, byref, isz
+ ldr w6, [x1, #0x08]
+ cmp w22, w6
+ bhs G_M9806_IG30
+ ubfiz x6, x22, #3, #32
+ ldr d16, [x4, x6]
+ ldr w7, [x23, #0x08]
+ cmp w22, w7
+ bhs G_M9806_IG30
+ str d16, [x2, x6]
add w22, w22, #1
cmp w22, #101
blt G_M9806_IG09
- ;; size=48 bbWeight=0.16 PerfScore 2.53
-G_M9806_IG10: ; bbWeight=7.92, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref, isz
+ ;; size=48 bbWeight=0.16 PerfScore 2.56
+G_M9806_IG10: ; bbWeight=8, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=0030 {x4 x5}, byref, isz
; gcrRegs -[x23]
; byrRegs -[x2]
add w3, w3, #1
cmp w3, w19
blt G_M9806_IG03
- ;; size=12 bbWeight=7.92 PerfScore 15.84
-G_M9806_IG11: ; bbWeight=1, gcrefRegs=300000 {x20 x21}, byrefRegs=0000 {}, byref
+ ;; size=12 bbWeight=8 PerfScore 16.00
+G_M9806_IG11: ; bbWeight=1, gcrefRegs=300000 {x20 x21}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x0-x1]
- ; byrRegs -[x25-x26]
- b G_M9806_IG16
- ;; size=4 bbWeight=1 PerfScore 1.00
-G_M9806_IG12: ; bbWeight=0.02, gcrefRegs=300003 {x0 x1 x20 x21}, byrefRegs=6000000 {x25 x26}, byref, isz
- ; gcrRegs +[x0-x1]
- ; byrRegs +[x25-x26]
- ldr w2, [x20, #0x08]
- cmp w3, w2
- bhs G_M9806_IG35
- add x27, x20, #16
- ; byrRegs +[x27]
- ubfiz x2, x3, #3, #32
- ldr x24, [x27, x2]
- ; gcrRegs +[x24]
- ldr w4, [x21, #0x08]
- cmp w3, w4
- bhs G_M9806_IG35
- add x28, x21, #16
- ; byrRegs +[x28]
- ldr x23, [x28, x2]
- ; gcrRegs +[x23]
- mov w22, wzr
- b G_M9806_IG26
- ;; size=52 bbWeight=0.02 PerfScore 0.37
...
-56 (-6.97%) : 44222.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -9,16 +9,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T08] ( 15, 12.06) ref -> x19 class-hnd single-def <float[][]>
+; V00 arg0 [V00,T08] ( 12, 12.04) ref -> x19 class-hnd single-def <float[][]>
; V01 arg1 [V01,T09] ( 9, 12.04) ref -> x20 class-hnd single-def <int[][]>
; V02 arg2 [V02,T21] ( 3, 3 ) ref -> x23 class-hnd single-def <double[]>
; V03 arg3 [V03,T20] ( 4, 6 ) ref -> x22 class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T10] ( 5, 12 ) int -> x21 single-def
+; V04 arg4 [V04,T10] ( 4, 12 ) int -> x21 single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T03] ( 17, 37.52) int -> x25
-; V08 loc3 [V08,T16] ( 6, 10 ) ref -> x27 class-hnd <float[]>
-; V09 loc4 [V09,T00] ( 13, 56 ) int -> x24
+; V07 loc2 [V07,T03] ( 12, 38.50) int -> x25
+; V08 loc3 [V08,T16] ( 5, 10 ) ref -> x27 class-hnd <float[]>
+; V09 loc4 [V09,T00] ( 12, 56 ) int -> x24
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T05] ( 16, 22.58) int -> x26
;* V12 loc7 [V12 ] ( 0, 0 ) float -> zero-ref
@@ -40,7 +40,7 @@
; V28 cse2 [V28,T15] ( 10, 10 ) long -> x8 multi-def "CSE - moderate"
; V29 cse3 [V29,T14] ( 4, 11.88) long -> x1 "CSE - aggressive"
; V30 cse4 [V30,T22] ( 4, 0.12) long -> x1 "CSE - conservative"
-; V31 cse5 [V31,T07] ( 9, 17 ) int -> x28 "CSE - aggressive"
+; V31 cse5 [V31,T07] ( 7, 16 ) int -> x28 "CSE - aggressive"
; V32 cse6 [V32,T06] ( 14, 18 ) int -> x5 multi-def "CSE - aggressive"
; TEMP_01 double -> [fp+0x10]
;
@@ -67,50 +67,29 @@ G_M56974_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
ldr w26, [fp, #0x9C]
;; size=60 bbWeight=0.01 PerfScore 0.23
G_M56974_IG02: ; bbWeight=0.01, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
- b G_M56974_IG14
+ b G_M56974_IG11
;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M56974_IG03: ; bbWeight=1.98, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG03: ; bbWeight=2, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x27]
+ ldr w0, [x19, #0x08]
+ cmp w25, w0
+ bhs G_M56974_IG24
add x0, x19, #16
; byrRegs +[x0]
ldr x27, [x0, w25, UXTW #3]
; gcrRegs +[x27]
mov w24, wzr
cmp w21, #0
- bgt G_M56974_IG09
- ;; size=20 bbWeight=1.98 PerfScore 10.89
-G_M56974_IG04: ; bbWeight=7.92, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
+ bgt G_M56974_IG06
+ ;; size=32 bbWeight=2 PerfScore 20.00
+G_M56974_IG04: ; bbWeight=8, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x27]
; byrRegs -[x0]
add w25, w25, #1
cmp w28, w25
bgt G_M56974_IG03
- ;; size=12 bbWeight=7.92 PerfScore 15.84
-G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
- ; gcrRegs -[x19-x20 x22-x23]
- b G_M56974_IG08
- ;; size=4 bbWeight=1 PerfScore 1.00
-G_M56974_IG06: ; bbWeight=0.02, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[x19-x20 x22-x23]
- ldr w0, [x19, #0x08]
- cmp w25, w0
- bhs G_M56974_IG27
- add x0, x19, #16
- ; byrRegs +[x0]
- ldr x27, [x0, w25, UXTW #3]
- ; gcrRegs +[x27]
- mov w24, wzr
- cmp w21, #0
- bgt G_M56974_IG09
- ;; size=32 bbWeight=0.02 PerfScore 0.20
-G_M56974_IG07: ; bbWeight=0.08, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[x27]
- ; byrRegs -[x0]
- add w25, w25, #1
- cmp w28, w25
- bgt G_M56974_IG06
- ;; size=12 bbWeight=0.08 PerfScore 0.16
-G_M56974_IG08: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
+ ;; size=12 bbWeight=8 PerfScore 16.00
+G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
; gcrRegs -[x19-x20 x22-x23]
ldp x27, x28, [sp, #0x60]
ldp x25, x26, [sp, #0x50]
@@ -122,60 +101,55 @@ G_M56974_IG08: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
add sp, sp, #112
ret lr
;; size=36 bbWeight=1 PerfScore 9.50
-G_M56974_IG09: ; bbWeight=2, gcVars=0000000000000000 {}, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M56974_IG06: ; bbWeight=2, gcVars=0000000000000000 {}, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, gcvars, byref, isz
; gcrRegs +[x19-x20 x22-x23 x27]
ldr w0, [x20, #0x08]
cmp w25, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x20, #16
; byrRegs +[x0]
ldr x0, [x0, w25, UXTW #3]
; gcrRegs +[x0]
; byrRegs -[x0]
- tbnz w24, #31, G_M56974_IG11
+ tbnz w24, #31, G_M56974_IG08
;; size=24 bbWeight=2 PerfScore 18.00
-G_M56974_IG10: ; bbWeight=16, gcrefRegs=8D80001 {x0 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG07: ; bbWeight=16, gcrefRegs=8D80001 {x0 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x0, #0x08]
; gcrRegs -[x0]
cmp w0, w24
- bgt G_M56974_IG13
+ bgt G_M56974_IG10
;; size=12 bbWeight=16 PerfScore 72.00
-G_M56974_IG11: ; bbWeight=8, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG08: ; bbWeight=8, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
add w24, w24, #1
cmp w24, w21
- blt G_M56974_IG09
+ blt G_M56974_IG06
;; size=12 bbWeight=8 PerfScore 16.00
-G_M56974_IG12: ; bbWeight=1, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG09: ; bbWeight=1, gcrefRegs=D80000 {x19 x20 x22 x23}, byrefRegs=0000 {}, byref
; gcrRegs -[x27]
- cbz x19, G_M56974_IG07
- tbnz w25, #31, G_M56974_IG07
- ldr w0, [x19, #0x08]
- cmp w0, w28
- blt G_M56974_IG07
b G_M56974_IG04
- ;; size=24 bbWeight=1 PerfScore 7.50
-G_M56974_IG13: ; bbWeight=0.50, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
+ ;; size=4 bbWeight=1 PerfScore 1.00
+G_M56974_IG10: ; bbWeight=0.50, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
; gcrRegs +[x27]
add w26, w25, #1
;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M56974_IG14: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG11: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w28, [x23, #0x08]
cmp w28, w26
- ble G_M56974_IG11
- cbz x20, G_M56974_IG21
- cbz x19, G_M56974_IG21
- tbnz w26, #31, G_M56974_IG21
+ ble G_M56974_IG08
+ cbz x20, G_M56974_IG18
+ cbz x19, G_M56974_IG18
+ tbnz w26, #31, G_M56974_IG18
ldr w0, [x20, #0x08]
cmp w0, w28
- blt G_M56974_IG21
+ blt G_M56974_IG18
ldr w0, [x19, #0x08]
cmp w0, w28
- blt G_M56974_IG21
+ blt G_M56974_IG18
;; size=48 bbWeight=1 PerfScore 16.50
-G_M56974_IG15: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG12: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x27, #0x08]
cmp w24, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x27, #16
; byrRegs +[x0]
ldr s16, [x0, w24, UXTW #2]
@@ -205,15 +179,15 @@ G_M56974_IG15: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27},
; gcrRegs +[x4]
add w5, w24, #1
sxtw w6, w5
- tbnz w6, #31, G_M56974_IG18
+ tbnz w6, #31, G_M56974_IG15
;; size=100 bbWeight=3.96 PerfScore 134.64
-G_M56974_IG16: ; bbWeight=15.84, gcrefRegs=8D80018 {x3 x4 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG13: ; bbWeight=15.84, gcrefRegs=8D80018 {x3 x4 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; byrRegs -[x0]
ldr w0, [x4, #0x08]
cmp w0, w6
- ble G_M56974_IG18
+ ble G_M56974_IG15
;; size=12 bbWeight=15.84 PerfScore 71.28
-G_M56974_IG17: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG14: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x4]
add x0, x19, #16
; byrRegs +[x0]
@@ -222,16 +196,16 @@ G_M56974_IG17: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27
ldr w0, [x7, #0x08]
; byrRegs -[x0]
cmp w5, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x7, #16
; byrRegs +[x0]
ubfiz x8, x5, #2, #32
ldr s16, [x0, x8]
fcvt d16, s16
fcmp d16, d8
- ble G_M56974_IG19
+ ble G_M56974_IG16
;; size=44 bbWeight=1.98 PerfScore 34.65
-G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG15: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x7]
; byrRegs -[x0]
add x8, x19, #16
@@ -241,7 +215,7 @@ G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27
; byrRegs -[x8]
ldr w0, [x8, #0x08]
cmp w5, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x8, #16
; byrRegs +[x0]
ubfiz x8, x5, #2, #32
@@ -251,25 +225,25 @@ G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=8D80008 {x3 x19 x20 x22 x23 x27
ldr w0, [x3, #0x08]
; byrRegs -[x0]
cmp w5, w0
- bhs G_M56974_IG27
+ bhs G_M56974_IG24
add x0, x3, #16
; byrRegs +[x0]
str w25, [x0, x8]
;; size=56 bbWeight=1.98 PerfScore 38.61
-G_M56974_IG19: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG16: ; bbWeight=3.96, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x3]
; byrRegs -[x0]
add w26, w26, #1
cmp w28, w26
- bgt G_M56974_IG15
+ bgt G_M56974_IG12
;; size=12 bbWeight=3.96 PerfScore 7.92
-G_M56974_IG20: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
- b G_M56974_IG11
+G_M56974_IG17: ; bbWeight=1, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref
+ b G_M56974_IG08
;; size=4 bbWeight=1 PerfScore 1.00
-G_M56974_IG21: ; bbWeight=0.04, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG18: ; bbWeight=0.04, gcrefRegs=8D80000 {x19 x20 x22 x23 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x27, #0x08]
cmp w24, w0
- bhs G_M56974_IG27
...
coreclr_tests.run.windows.arm64.checked.mch
-172 (-32.58%) : 304013.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
@@ -10,178 +10,112 @@
; 1 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 9, 5.63) ref -> x19 class-hnd single-def <System.Collections.Generic.List`1[NamedSet][]>
-; V01 loc0 [V01,T07] ( 10, 7.26) int -> x23
-; V02 loc1 [V02,T02] ( 14,123.41) ref -> x22 class-hnd <System.Collections.Generic.List`1[NamedSet]>
-; V03 loc2 [V03,T08] ( 4, 1.55) ubyte -> x20
-; V04 loc3 [V04,T03] ( 18, 74.64) int -> x24
-; V05 loc4 [V05,T01] ( 10,217.26) int -> x21
+; V00 arg0 [V00,T07] ( 5, 5.11) ref -> x19 class-hnd single-def <System.Collections.Generic.List`1[NamedSet][]>
+; V01 loc0 [V01,T06] ( 5, 7.25) int -> x23
+; V02 loc1 [V02,T02] ( 8,123.41) ref -> x22 class-hnd <System.Collections.Generic.List`1[NamedSet]>
+; V03 loc2 [V03,T09] ( 2, 1.55) ubyte -> x21
+; V04 loc3 [V04,T03] ( 9, 74.64) int -> x20
+; V05 loc4 [V05,T01] ( 8,217.26) int -> x21
; V06 loc5 [V06,T00] ( 6,380.63) int -> x20
;# V07 OutArgs [V07 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V08 tmp1 [V08,T04] ( 6, 63.09) ref -> x26 class-hnd "Inlining Arg" <<unknown class>>
-; V09 tmp2 [V09,T05] ( 6, 63.09) ref -> x25 "arr expr"
+; V08 tmp1 [V08,T04] ( 3, 63.09) ref -> x0 class-hnd "Inlining Arg" <<unknown class>>
+; V09 tmp2 [V09,T05] ( 3, 63.09) ref -> x0 "arr expr"
+; V10 cse0 [V10,T08] ( 3, 4.66) int -> x0 hoist multi-def "CSE - aggressive"
;
-; Lcl frame size = 0
+; Lcl frame size = 8
G_M3612_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- stp x19, x20, [sp, #0x10]
- stp x21, x22, [sp, #0x20]
- stp x23, x24, [sp, #0x30]
- stp x25, x26, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldr x19, [fp, #0x88]
+ ldr x19, [fp, #0x78]
; gcrRegs +[x19]
- ldr w23, [fp, #0x84]
- ldr x22, [fp, #0x78]
+ ldr w23, [fp, #0x74]
+ ldr x22, [fp, #0x68]
; gcrRegs +[x22]
- ldp w20, w21, [fp, #0x68]
- ;; size=40 bbWeight=1 PerfScore 13.50
+ ldp w20, w21, [fp, #0x58]
+ ;; size=36 bbWeight=1 PerfScore 12.50
G_M3612_IG02: ; bbWeight=1, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref
- b G_M3612_IG18
+ b G_M3612_IG11
;; size=4 bbWeight=1 PerfScore 1.00
-G_M3612_IG03: ; bbWeight=0.51, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
+G_M3612_IG03: ; bbWeight=0.52, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x22]
+ cmp w23, w0
+ bhs G_M3612_IG15
add x0, x19, #16
; byrRegs +[x0]
ldr x22, [x0, w23, UXTW #3]
; gcrRegs +[x22]
- ;; size=8 bbWeight=0.51 PerfScore 1.80
-G_M3612_IG04: ; bbWeight=0.51, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ ;; size=16 bbWeight=0.52 PerfScore 2.59
+G_M3612_IG04: ; bbWeight=0.52, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
; byrRegs -[x0]
- mov w20, wzr
+ mov w21, wzr
ldr w0, [x22, #0x10]
- sub w24, w0, #2
- tbnz w24, #31, G_M3612_IG06
- ;; size=16 bbWeight=0.51 PerfScore 2.57
-G_M3612_IG05: ; bbWeight=10.41, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ sub w20, w0, #2
+ tbnz w20, #31, G_M3612_IG06
+ ;; size=16 bbWeight=0.52 PerfScore 2.59
+G_M3612_IG05: ; bbWeight=10.51, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
ldr w0, [x22, #0x10]
- cmp w24, w0
- bhs G_M3612_IG25
- ldr x25, [x22, #0x08]
- ; gcrRegs +[x25]
- ldr w0, [x25, #0x08]
- cmp w24, w0
- bhs G_M3612_IG22
- add x0, x25, #16
+ cmp w20, w0
+ bhs G_M3612_IG18
+ ldr x0, [x22, #0x08]
+ ; gcrRegs +[x0]
+ ldr w1, [x0, #0x08]
+ cmp w20, w1
+ bhs G_M3612_IG15
+ add x0, x0, #16
+ ; gcrRegs -[x0]
; byrRegs +[x0]
- ldr x0, [x0, w24, UXTW #3]
+ ldr x0, [x0, w20, UXTW #3]
; gcrRegs +[x0]
; byrRegs -[x0]
- ldr x26, [x0, #0x08]
- ; gcrRegs +[x26]
- ldr w0, [x26, #0x28]
+ ldr x0, [x0, #0x08]
+ ldr w1, [x0, #0x28]
+ ldr w0, [x0, #0x30]
; gcrRegs -[x0]
- ldr w1, [x26, #0x30]
- sub w0, w0, w1
+ sub w0, w1, w0
cbz w0, G_M3612_IG04
mov x0, x22
; gcrRegs +[x0]
- mov w1, w24
+ mov w1, w20
movz x2, #0xD1FFAB1E // code for <unknown method>
movk x2, #0xD1FFAB1E LSL #16
movk x2, #0xD1FFAB1E LSL #32
ldr x2, [x2]
blr x2
- ; gcrRegs -[x0 x25-x26]
- ; gcr arg pop 0
- sub w24, w24, #1
- tbz w24, #31, G_M3612_IG05
- ;; size=92 bbWeight=10.41 PerfScore 353.92
-G_M3612_IG06: ; bbWeight=1.03, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- cbnz w20, G_M3612_IG04
- ;; size=4 bbWeight=1.03 PerfScore 1.03
-G_M3612_IG07: ; bbWeight=0.51, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- ldr w0, [x22, #0x10]
- sub w21, w0, #2
- tbz w21, #31, G_M3612_IG17
- ;; size=12 bbWeight=0.51 PerfScore 2.31
-G_M3612_IG08: ; bbWeight=2.05, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[x22]
- add w23, w23, #1
- ldr w0, [x19, #0x08]
- cmp w0, w23
- ble G_M3612_IG23
- ;; size=16 bbWeight=2.05 PerfScore 10.26
-G_M3612_IG09: ; bbWeight=0.51, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
- b G_M3612_IG03
- ;; size=4 bbWeight=0.51 PerfScore 0.51
-G_M3612_IG10: ; bbWeight=0.01, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
- ldr w0, [x19, #0x08]
- cmp w23, w0
- bhs G_M3612_IG22
- add x0, x19, #16
- ; byrRegs +[x0]
- ldr x22, [x0, w23, UXTW #3]
- ; gcrRegs +[x22]
- ;; size=20 bbWeight=0.01 PerfScore 0.04
-G_M3612_IG11: ; bbWeight=0.01, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- ; byrRegs -[x0]
- mov w20, wzr
- ldr w0, [x22, #0x10]
- sub w24, w0, #2
- tbnz w24, #31, G_M3612_IG13
- ;; size=16 bbWeight=0.01 PerfScore 0.03
-G_M3612_IG12: ; bbWeight=0.11, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- ldr w0, [x22, #0x10]
- cmp w24, w0
- bhs G_M3612_IG25
- ldr x25, [x22, #0x08]
- ; gcrRegs +[x25]
- ldr w0, [x25, #0x08]
- cmp w24, w0
- bhs G_M3612_IG22
- add x0, x25, #16
- ; byrRegs +[x0]
- ldr x0, [x0, w24, UXTW #3]
- ; gcrRegs +[x0]
- ; byrRegs -[x0]
- ldr x26, [x0, #0x08]
- ; gcrRegs +[x26]
- ldr w0, [x26, #0x28]
; gcrRegs -[x0]
- ldr w1, [x26, #0x30]
- sub w0, w0, w1
- cbz w0, G_M3612_IG11
- mov x0, x22
- ; gcrRegs +[x0]
- mov w1, w24
- movz x2, #0xD1FFAB1E // code for <unknown method>
- movk x2, #0xD1FFAB1E LSL #16
- movk x2, #0xD1FFAB1E LSL #32
- ldr x2, [x2]
- blr x2
- ; gcrRegs -[x0 x25-x26]
; gcr arg pop 0
- sub w24, w24, #1
- tbz w24, #31, G_M3612_IG12
- ;; size=92 bbWeight=0.11 PerfScore 3.57
-G_M3612_IG13: ; bbWeight=0.01, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- cbnz w20, G_M3612_IG11
- ;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M3612_IG14: ; bbWeight=0.01, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ sub w20, w20, #1
+ tbz w20, #31, G_M3612_IG05
+ ;; size=92 bbWeight=10.51 PerfScore 357.49
+G_M3612_IG06: ; bbWeight=1.04, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ cbnz w21, G_M3612_IG04
+ ;; size=4 bbWeight=1.04 PerfScore 1.04
+G_M3612_IG07: ; bbWeight=0.52, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
ldr w0, [x22, #0x10]
sub w21, w0, #2
- tbz w21, #31, G_M3612_IG17
- ;; size=12 bbWeight=0.01 PerfScore 0.02
-G_M3612_IG15: ; bbWeight=0.02, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
+ tbz w21, #31, G_M3612_IG10
+ ;; size=12 bbWeight=0.52 PerfScore 2.33
+G_M3612_IG08: ; bbWeight=2.07, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[x22]
add w23, w23, #1
ldr w0, [x19, #0x08]
cmp w0, w23
- ble G_M3612_IG23
- ;; size=16 bbWeight=0.02 PerfScore 0.10
-G_M3612_IG16: ; bbWeight=0.01, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
- b G_M3612_IG10
- ;; size=4 bbWeight=0.01 PerfScore 0.01
-G_M3612_IG17: ; bbWeight=9.69, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref
+ ble G_M3612_IG16
+ ;; size=16 bbWeight=2.07 PerfScore 10.36
+G_M3612_IG09: ; bbWeight=0.52, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
+ b G_M3612_IG03
+ ;; size=4 bbWeight=0.52 PerfScore 0.52
+G_M3612_IG10: ; bbWeight=9.69, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref
; gcrRegs +[x22]
sub w20, w21, #1
;; size=4 bbWeight=9.69 PerfScore 4.84
-G_M3612_IG18: ; bbWeight=9.69, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
- tbnz w20, #31, G_M3612_IG20
+G_M3612_IG11: ; bbWeight=9.69, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+ tbnz w20, #31, G_M3612_IG13
;; size=4 bbWeight=9.69 PerfScore 9.69
-G_M3612_IG19: ; bbWeight=90.31, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
+G_M3612_IG12: ; bbWeight=90.31, gcrefRegs=480000 {x19 x22}, byrefRegs=0000 {}, byref, isz
mov x0, x22
; gcrRegs +[x0]
mov w1, w20
@@ -193,36 +127,33 @@ G_M3612_IG19: ; bbWeight=90.31, gcrefRegs=480000 {x19 x22}, byrefRegs=000
blr x3
; gcrRegs -[x0]
; gcr arg pop 0
- cbnz w0, G_M3612_IG24
+ cbnz w0, G_M3612_IG17
sub w20, w20, #1
...
-460 (-31.86%) : 254124.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,140 +10,139 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 20, 5.12) ref -> x19 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T17] ( 7, 2.01) ref -> x20 class-hnd single-def <int[]>
+; V00 arg0 [V00,T06] ( 13, 5.11) ref -> x19 class-hnd single-def <double[][]>
+; V01 arg1 [V01,T17] ( 4, 2.02) ref -> x20 class-hnd single-def <int[]>
; V02 loc0 [V02,T03] ( 6,103.00) int -> x21
-; V03 loc1 [V03,T18] ( 19, 3.14) int -> x23
-; V04 loc2 [V04,T32] ( 7, 0.02) int -> x24
-; V05 loc3 [V05,T08] ( 30, 6.18) int -> x22
-; V06 loc4 [V06,T22] ( 22, 0.18) int -> x4
-; V07 loc5 [V07,T40] ( 8, 1.11) double -> d8
-; V08 loc6 [V08,T15] ( 22, 4.22) int -> x6
-; V09 loc7 [V09,T39] ( 9, 2.13) double -> d9
-; V10 loc8 [V10,T33] ( 4, 0.02) ref -> x2 class-hnd <double[]>
-; V11 loc9 [V11,T41] ( 5, 1.03) double -> d10
-; V12 loc10 [V12,T16] ( 19, 4.14) int -> x4
-; V13 loc11 [V13,T13] ( 9, 5.08) int -> x3
+; V03 loc1 [V03,T18] ( 13, 3.14) int -> x23
+; V04 loc2 [V04,T32] ( 2, 0.02) int -> x24
+; V05 loc3 [V05,T08] ( 18, 6.19) int -> x22
+; V06 loc4 [V06,T22] ( 12, 0.19) int -> x3
+; V07 loc5 [V07,T35] ( 5, 1.11) double -> d8
+; V08 loc6 [V08,T15] ( 14, 4.21) int -> x4
+; V09 loc7 [V09,T34] ( 6, 2.13) double -> d9
+; V10 loc8 [V10,T31] ( 2, 0.02) ref -> x2 class-hnd <double[]>
+; V11 loc9 [V11,T36] ( 3, 1.03) double -> d16
+; V12 loc10 [V12,T16] ( 12, 4.13) int -> x0
+; V13 loc11 [V13,T13] ( 7, 5.08) int -> x3
; V14 loc12 [V14,T07] ( 9, 7.05) ref -> x15 class-hnd <double[]>
; V15 loc13 [V15,T14] ( 6, 5.02) ref -> x12 class-hnd <double[]>
-; V16 loc14 [V16,T38] ( 3,100.00) double -> d16
+; V16 loc14 [V16,T33] ( 3,100.00) double -> d16
; V17 loc15 [V17,T01] ( 13,400.96) int -> x14
;# V18 OutArgs [V18 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T09] ( 9, 6.13) byref -> x6 "dup spill"
-; V20 tmp2 [V20,T26] ( 4, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V19 tmp1 [V19,T09] ( 6, 6.13) byref -> x1 "dup spill"
+; V20 tmp2 [V20,T27] ( 2, 0.04) ref -> x15 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V21 tmp3 [V21,T00] ( 6,593.93) byref -> registers "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T23] ( 6, 0.06) ref -> x5 "arr expr"
-; V24 tmp6 [V24,T10] ( 9, 6.13) ref -> registers "arr expr"
-; V25 tmp7 [V25,T24] ( 6, 0.06) ref -> x7 "arr expr"
-; V26 tmp8 [V26,T25] ( 6, 0.06) ref -> x3 "arr expr"
-; V27 tmp9 [V27,T11] ( 9, 6.13) ref -> x5 "arr expr"
+; V23 tmp5 [V23,T23] ( 3, 0.06) ref -> x14 "arr expr"
+; V24 tmp6 [V24,T10] ( 6, 6.13) ref -> x14 "arr expr"
+; V25 tmp7 [V25,T24] ( 3, 0.06) ref -> x14 "arr expr"
+; V26 tmp8 [V26,T25] ( 3, 0.06) ref -> x0 "arr expr"
+; V27 tmp9 [V27,T11] ( 6, 6.13) ref -> x1 "arr expr"
; V28 cse0 [V28,T28] ( 3, 0.03) ref -> x15 "CSE - conservative"
-; V29 cse1 [V29,T35] ( 3, 0.00) ref -> x15 "CSE - conservative"
-; V30 cse2 [V30,T36] ( 3, 0.00) ref -> x2 "CSE - conservative"
-; V31 cse3 [V31,T29] ( 3, 0.03) ref -> x2 "CSE - conservative"
-; V32 cse4 [V32,T02] ( 3,294.00) long -> x15 "CSE - aggressive"
-; V33 cse5 [V33,T21] ( 11, 2.09) long -> x27 "CSE - aggressive"
-; V34 cse6 [V34,T19] ( 3, 3.03) long -> x14 "CSE - aggressive"
-; V35 cse7 [V35,T20] ( 3, 2.97) long -> x0 "CSE - moderate"
-; V36 cse8 [V36,T31] ( 9, 0.02) long -> x26 "CSE - conservative"
-; V37 cse9 [V37,T04] ( 4,100.00) byref -> xip0 hoist multi-def "CSE - aggressive"
-; V38 cse10 [V38,T05] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
-; V39 cse11 [V39,T12] ( 19, 5.12) byref -> x25 hoist multi-def "CSE - aggressive"
-; V40 cse12 [V40,T27] ( 4, 0.04) int -> x28 "CSE - conservative"
-; V41 cse13 [V41,T34] ( 4, 0.00) int -> x27 "CSE - conservative"
-; V42 cse14 [V42,T30] ( 3, 0.03) long -> x26 "CSE - conservative"
-; V43 cse15 [V43,T37] ( 3, 0.00) long -> x14 "CSE - conservative"
+; V29 cse1 [V29,T29] ( 3, 0.03) ref -> x2 "CSE - conservative"
+; V30 cse2 [V30,T02] ( 3,294.00) long -> x15 "CSE - aggressive"
+; V31 cse3 [V31,T21] ( 11, 2.12) long -> x27 "CSE - aggressive"
+; V32 cse4 [V32,T19] ( 3, 3.03) long -> x14 "CSE - aggressive"
+; V33 cse5 [V33,T20] ( 3, 2.97) long -> x0 "CSE - moderate"
+; V34 cse6 [V34,T04] ( 4,100.00) byref -> xip0 hoist multi-def "CSE - aggressive"
+; V35 cse7 [V35,T05] ( 4,100.00) byref -> x1 hoist multi-def "CSE - aggressive"
+; V36 cse8 [V36,T12] ( 12, 5.12) byref -> x25 hoist multi-def "CSE - aggressive"
+; V37 cse9 [V37,T26] ( 4, 0.04) int -> x28 "CSE - conservative"
+; V38 cse10 [V38,T30] ( 3, 0.03) long -> x26 "CSE - conservative"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M58112_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x80]!
- stp d8, d9, [sp, #0x18]
- str d10, [sp, #0x28]
- stp x19, x20, [sp, #0x30]
- stp x21, x22, [sp, #0x40]
- stp x23, x24, [sp, #0x50]
- stp x25, x26, [sp, #0x60]
- stp x27, x28, [sp, #0x70]
+ stp fp, lr, [sp, #-0x70]!
+ stp d8, d9, [sp, #0x10]
+ stp x19, x20, [sp, #0x20]
+ stp x21, x22, [sp, #0x30]
+ stp x23, x24, [sp, #0x40]
+ stp x25, x26, [sp, #0x50]
+ stp x27, x28, [sp, #0x60]
mov fp, sp
ldp x20, x19, [fp, #0xD1FFAB1E]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xD1FFAB1E]
- ldr w23, [fp, #0xD1FFAB1E]
- ldr w24, [fp, #0xD1FFAB1E]
- ldr w22, [fp, #0xD1FFAB1E]
- ldr w3, [fp, #0xC8]
- ldp x12, x15, [fp, #0xB8]
+ ldp w23, w21, [fp, #0xF8]
+ ldp w22, w24, [fp, #0xF0]
+ ldr w3, [fp, #0xB8]
+ ldp x12, x15, [fp, #0xA8]
; gcrRegs +[x12 x15]
- ldr d16, [fp, #0xB0]
- ldr w14, [fp, #0xAC]
- ;; size=72 bbWeight=1 PerfScore 28.50
+ ldr d16, [fp, #0xA0]
+ ldr w14, [fp, #0x9C]
+ ;; size=60 bbWeight=1 PerfScore 23.50
G_M58112_IG02: ; bbWeight=1, gcrefRegs=189000 {x12 x15 x19 x20}, byrefRegs=0000 {}, byref
b G_M58112_IG14
;; size=4 bbWeight=1 PerfScore 1.00
G_M58112_IG03: ; bbWeight=0.01, gcrefRegs=180000 {x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; gcrRegs -[x12 x15]
; byrRegs +[x25]
- sxtw w4, w22
- mov w26, w4
+ sxtw w3, w22
+ ldr w14, [x19, #0x08]
+ cmp w3, w14
+ bhs G_M58112_IG33
+ mov w26, w3
lsl x27, x26, #3
ldr x2, [x25, x27]
; gcrRegs +[x2]
- mov x5, x2
- ; gcrRegs +[x5]
- ldr w14, [x5, #0x08]
- cmp w4, w14
- bhs G_M58112_IG51
- add x14, x5, #16
+ mov x14, x2
+ ; gcrRegs +[x14]
+ ldr w15, [x14, #0x08]
+ cmp w3, w15
+ bhs G_M58112_IG33
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fabs d8, d16
- add w28, w4, #1
- sxtw w6, w28
- cmp w6, w23
+ add w28, w3, #1
+ sxtw w4, w28
+ cmp w4, w23
blt G_M58112_IG05
- ;; size=60 bbWeight=0.01 PerfScore 0.18
+ ;; size=72 bbWeight=0.01 PerfScore 0.23
G_M58112_IG04: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x5]
; byrRegs -[x14]
+ ldr w14, [x20, #0x08]
+ cmp w22, w14
+ bhs G_M58112_IG33
add x14, x20, #16
; byrRegs +[x14]
lsl x15, x26, #2
- str w4, [x14, x15]
+ str w3, [x14, x15]
ldr w14, [x19, #0x08]
; byrRegs -[x14]
- cmp w4, w14
- bhs G_M58112_IG51
- ldr x15, [x25, w4, UXTW #3]
+ cmp w3, w14
+ bhs G_M58112_IG33
+ ldr x15, [x25, w3, UXTW #3]
; gcrRegs +[x15]
- mov x7, x15
- ; gcrRegs +[x7]
- ldr w14, [x7, #0x08]
- cmp w22, w14
- bhs G_M58112_IG51
- add x14, x7, #16
+ mov x14, x15
+ ; gcrRegs +[x14]
+ ldr w12, [x14, #0x08]
+ cmp w22, w12
+ bhs G_M58112_IG33
+ add x14, x14, #16
+ ; gcrRegs -[x14]
; byrRegs +[x14]
ldr d16, [x14, x27]
fcmp d16, #0.0
- beq G_M58112_IG36
+ beq G_M58112_IG37
b G_M58112_IG20
- ;; size=64 bbWeight=0.01 PerfScore 0.23
+ ;; size=76 bbWeight=0.01 PerfScore 0.28
G_M58112_IG05: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ; gcrRegs -[x7 x15]
+ ; gcrRegs -[x15]
; byrRegs -[x14]
- orr w14, w6, w23
+ orr w14, w4, w23
tbz w14, #31, G_M58112_IG08
;; size=8 bbWeight=0.01 PerfScore 0.02
G_M58112_IG06: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
ldr w14, [x19, #0x08]
- cmp w6, w14
- bhs G_M58112_IG51
- ldr x14, [x25, w6, UXTW #3]
+ cmp w4, w14
+ bhs G_M58112_IG33
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG51
+ bhs G_M58112_IG33
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -161,12 +160,12 @@ G_M58112_IG08: ; bbWeight=0.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
cmp w14, w23
blt G_M58112_IG06
;; size=12 bbWeight=0.01 PerfScore 0.05
-G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
- ldr x14, [x25, w6, UXTW #3]
+G_M58112_IG09: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ldr x14, [x25, w4, UXTW #3]
; gcrRegs +[x14]
ldr w15, [x14, #0x08]
cmp w22, w15
- bhs G_M58112_IG51
+ bhs G_M58112_IG33
add x14, x14, #16
; gcrRegs -[x14]
; byrRegs +[x14]
@@ -174,18 +173,18 @@ G_M58112_IG09: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=
fabs d9, d16
fcmp d9, d8
bgt G_M58112_IG12
- ;; size=36 bbWeight=1.00 PerfScore 15.02
-G_M58112_IG10: ; bbWeight=1.00, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
+ ;; size=36 bbWeight=1.01 PerfScore 15.17
+G_M58112_IG10: ; bbWeight=1.01, gcrefRegs=180004 {x2 x19 x20}, byrefRegs=2000000 {x25}, byref, isz
; byrRegs -[x14]
...
-156 (-21.67%) : 249921.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,217 +11,171 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.97) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.97) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.97) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.01) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.91) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.91) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.09) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.09) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.06) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.04) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.97) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.96) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.07) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.99) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.97) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.97) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.04) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.97) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.96) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.07) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.99) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.97) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.97) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG08
;; size=8 bbWeight=0.99 PerfScore 1.48
-G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG10
;; size=4 bbWeight=0.98 PerfScore 0.98
-G_M9806_IG05: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w6, [x0, #0x08]
- cmp w6, w22
+G_M9806_IG05: ; bbWeight=0.98, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG10
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG10
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG10
tbnz w2, #31, G_M9806_IG10
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG10
;; size=40 bbWeight=0.98 PerfScore 14.63
-G_M9806_IG06: ; bbWeight=0.98, gcrefRegs=1800AB {x0 x1 x3 x5 x7 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+G_M9806_IG06: ; bbWeight=0.98, gcrefRegs=18012B {x0 x1 x3 x5 x8 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG13
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=20 bbWeight=0.98 PerfScore 7.80
-G_M9806_IG07: ; bbWeight=98.02, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=20 bbWeight=0.98 PerfScore 7.80
+G_M9806_IG07: ; bbWeight=98.02, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG13
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG07
;; size=52 bbWeight=98.02 PerfScore 1323.33
-G_M9806_IG08: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG08: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG23
+ bge G_M9806_IG15
;; size=12 bbWeight=0.99 PerfScore 1.97
-G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.99 PerfScore 1.48
-G_M9806_IG10: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG10: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG13
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG13
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG13
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.19
-G_M9806_IG11: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG11: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG13
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
...
-156 (-21.67%) : 249937.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,213 +11,167 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 7, 4.91) ref -> x0 class-hnd single-def <double[][]>
-; V01 arg1 [V01,T11] ( 6, 2 ) ref -> x1 class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> x19 class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> x20 class-hnd single-def <double[][]>
-; V04 arg4 [V04,T10] ( 8, 2 ) int -> x21 single-def
-; V05 loc0 [V05,T15] ( 6, 1.91) ref -> registers class-hnd <double[][]>
-; V06 loc1 [V06,T21] ( 6, 0 ) ref -> x5 class-hnd <double[]>
-; V07 loc2 [V07,T26] ( 2, 0 ) long -> x24
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> x1 class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> x19 class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> x20 class-hnd single-def <double[][]>
+; V04 arg4 [V04,T11] ( 4, 2 ) int -> x21 single-def
+; V05 loc0 [V05,T15] ( 5, 1.91) ref -> registers class-hnd <double[][]>
+; V06 loc1 [V06,T21] ( 3, 0 ) ref -> x5 class-hnd <double[]>
+; V07 loc2 [V07,T24] ( 2, 0 ) long -> x23
; V08 loc3 [V08,T01] ( 14,499.07) int -> x2
-; V09 loc4 [V09,T20] ( 11, 0 ) int -> x4
-; V10 loc5 [V10,T07] ( 35, 5.74) int -> x22
+; V09 loc4 [V09,T20] ( 6, 0 ) int -> x4
+; V10 loc5 [V10,T07] ( 26, 5.74) int -> x22
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 4, 0 ) double -> d8 "Strict ordering of exceptions for Array store"
-; V13 tmp2 [V13,T00] ( 6,594.26) ref -> x11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V12 tmp1 [V12,T25] ( 2, 0 ) double -> d16 "Strict ordering of exceptions for Array store"
+; V13 tmp2 [V13,T00] ( 6,594.26) ref -> x13 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T19] ( 4,396.18) double -> d16 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V16 tmp5 [V16,T02] ( 5,398.16) ref -> x13 "arr expr"
-; V17 tmp6 [V17,T25] ( 2, 0 ) ref -> x0 "argument with side effect"
-; V18 cse0 [V18,T05] ( 4,100.00) ref -> x10 hoist multi-def "CSE - aggressive"
-; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x7 hoist "CSE - moderate"
-; V20 cse2 [V20,T04] ( 6,100.91) ref -> x7 multi-def "CSE - aggressive"
-; V21 cse3 [V21,T23] ( 3, 0 ) long -> x2 "CSE - conservative"
-; V22 cse4 [V22,T24] ( 3, 0 ) long -> x3 "CSE - conservative"
-; V23 cse5 [V23,T13] ( 6, 2.87) long -> x6 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T03] ( 3,294.16) long -> x9 "CSE - aggressive"
-; V25 cse7 [V25,T12] ( 3, 2.97) long -> x8 "CSE - aggressive"
-; V26 cse8 [V26,T14] ( 3, 1.96) byref -> x23 hoist "CSE - aggressive"
-; V27 cse9 [V27,T17] ( 4, 1.91) int -> x8 hoist multi-def "CSE - aggressive"
-; V28 cse10 [V28,T16] ( 4, 1.91) byref -> x9 hoist multi-def "CSE - aggressive"
+; V16 tmp5 [V16,T02] ( 5,398.16) ref -> x14 "arr expr"
+; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> x0 "argument with side effect"
+; V18 cse0 [V18,T05] ( 4,100.00) ref -> x11 hoist multi-def "CSE - aggressive"
+; V19 cse1 [V19,T18] ( 2, 1.00) ref -> x8 hoist "CSE - moderate"
+; V20 cse2 [V20,T04] ( 6,100.91) ref -> x8 multi-def "CSE - aggressive"
+; V21 cse3 [V21,T22] ( 3, 0 ) long -> x3 "CSE - conservative"
+; V22 cse4 [V22,T13] ( 6, 2.87) long -> x7 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T03] ( 3,294.16) long -> x10 "CSE - aggressive"
+; V24 cse6 [V24,T12] ( 3, 2.97) long -> x9 "CSE - aggressive"
+; V25 cse7 [V25,T14] ( 3, 1.96) byref -> x6 hoist "CSE - aggressive"
+; V26 cse8 [V26,T17] ( 4, 1.91) int -> x9 hoist multi-def "CSE - aggressive"
+; V27 cse9 [V27,T16] ( 4, 1.91) byref -> x10 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 8
G_M9806_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- stp fp, lr, [sp, #-0x50]!
- str d8, [sp, #0x18]
- stp x19, x20, [sp, #0x20]
- stp x21, x22, [sp, #0x30]
- stp x23, x24, [sp, #0x40]
+ stp fp, lr, [sp, #-0x40]!
+ stp x19, x20, [sp, #0x18]
+ stp x21, x22, [sp, #0x28]
+ str x23, [sp, #0x38]
mov fp, sp
- ldp x1, x0, [fp, #0xC0]
+ ldp x1, x0, [fp, #0xB0]
; gcrRegs +[x0-x1]
- ldp x20, x19, [fp, #0xB0]
+ ldp x20, x19, [fp, #0xA0]
; gcrRegs +[x19-x20]
- ldr w21, [fp, #0xAC]
- ldp x5, x3, [fp, #0x98]
+ ldr w21, [fp, #0x9C]
+ ldp x5, x3, [fp, #0x88]
; gcrRegs +[x3 x5]
- ldp w4, w2, [fp, #0x88]
- ldr w22, [fp, #0x84]
- ;; size=48 bbWeight=1 PerfScore 20.50
+ ldp w4, w2, [fp, #0x78]
+ ldr w22, [fp, #0x74]
+ ;; size=44 bbWeight=1 PerfScore 19.50
G_M9806_IG02: ; bbWeight=1, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0000 {}, byref
- add x23, x0, #16
- ; byrRegs +[x23]
+ add x6, x0, #16
+ ; byrRegs +[x6]
;; size=4 bbWeight=1 PerfScore 0.50
-G_M9806_IG03: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG03: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cmp w2, #101
bge G_M9806_IG06
;; size=8 bbWeight=0.96 PerfScore 1.43
-G_M9806_IG04: ; bbWeight=0.95, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
+G_M9806_IG04: ; bbWeight=0.95, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
cbz x0, G_M9806_IG08
- ldr w6, [x0, #0x08]
- cmp w6, w22
+ ldr w7, [x0, #0x08]
+ cmp w7, w22
bls G_M9806_IG08
- ubfiz x6, x22, #3, #32
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
- cbz x7, G_M9806_IG08
+ ubfiz x7, x22, #3, #32
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
+ cbz x8, G_M9806_IG08
tbnz w2, #31, G_M9806_IG08
- ldr w8, [x7, #0x08]
- cmp w8, #101
+ ldr w9, [x8, #0x08]
+ cmp w9, #101
blt G_M9806_IG08
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- cmp w22, w8
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ cmp w22, w9
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ;; size=64 bbWeight=0.95 PerfScore 22.72
-G_M9806_IG05: ; bbWeight=98.05, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
+ ldr x11, [x10, x7]
; gcrRegs +[x11]
- mov x13, x7
+ ;; size=64 bbWeight=0.95 PerfScore 22.72
+G_M9806_IG05: ; bbWeight=98.05, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- add x8, x13, #16
- ; byrRegs +[x8]
- ubfiz x9, x2, #3, #32
- ldr d16, [x8, x9]
- ldr w6, [x11, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ add x9, x14, #16
+ ; byrRegs +[x9]
+ ubfiz x10, x2, #3, #32
+ ldr d16, [x9, x10]
+ ldr w7, [x13, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x11, x11, #16
- ; gcrRegs -[x11]
- ; byrRegs +[x11]
- str d16, [x11, x9]
+ add x13, x13, #16
+ ; gcrRegs -[x13]
+ ; byrRegs +[x13]
+ str d16, [x13, x10]
add w2, w2, #1
cmp w2, #101
blt G_M9806_IG05
;; size=52 bbWeight=98.05 PerfScore 1323.73
-G_M9806_IG06: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; gcrRegs -[x7 x10 x13]
- ; byrRegs -[x8 x11]
+G_M9806_IG06: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; gcrRegs -[x8 x11 x14]
+ ; byrRegs -[x9 x13]
add w22, w22, #1
cmp w22, #101
- bge G_M9806_IG21
+ bge G_M9806_IG13
;; size=12 bbWeight=0.96 PerfScore 1.91
-G_M9806_IG07: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref
+G_M9806_IG07: ; bbWeight=0.96, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref
mov w2, wzr
b G_M9806_IG03
;; size=8 bbWeight=0.96 PerfScore 1.43
-G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ldr w8, [x3, #0x08]
- add x9, x3, #16
- ; byrRegs +[x9]
- ubfiz x6, x22, #3, #32
+G_M9806_IG08: ; bbWeight=0.01, gcrefRegs=18002B {x0 x1 x3 x5 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ldr w9, [x3, #0x08]
+ add x10, x3, #16
+ ; byrRegs +[x10]
+ ubfiz x7, x22, #3, #32
+ cmp w22, w9
+ bhs G_M9806_IG11
+ ldr x11, [x10, x7]
+ ; gcrRegs +[x11]
+ ldr wzr, [x0, #0x08]
+ ldr w8, [x0, #0x08]
cmp w22, w8
bhs G_M9806_IG11
- ldr x10, [x9, x6]
- ; gcrRegs +[x10]
- ldr wzr, [x0, #0x08]
- ldr w7, [x0, #0x08]
- cmp w22, w7
- bhs G_M9806_IG11
- ldr x7, [x23, x6]
- ; gcrRegs +[x7]
+ ldr x8, [x6, x7]
+ ; gcrRegs +[x8]
;; size=44 bbWeight=0.01 PerfScore 0.18
-G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=1804AB {x0 x1 x3 x5 x7 x10 x19 x20}, byrefRegs=800000 {x23}, byref, isz
- ; byrRegs -[x9]
- mov x11, x10
- ; gcrRegs +[x11]
- mov x13, x7
+G_M9806_IG09: ; bbWeight=0.99, gcrefRegs=18092B {x0 x1 x3 x5 x8 x11 x19 x20}, byrefRegs=0040 {x6}, byref, isz
+ ; byrRegs -[x10]
+ mov x13, x11
; gcrRegs +[x13]
- ldr w6, [x13, #0x08]
- cmp w2, w6
+ mov x14, x8
+ ; gcrRegs +[x14]
+ ldr w7, [x14, #0x08]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x13, #16
- ; byrRegs +[x6]
- ubfiz x8, x2, #3, #32
- ldr d16, [x6, x8]
- ldr w6, [x11, #0x08]
- ; byrRegs -[x6]
- cmp w2, w6
+ add x7, x14, #16
+ ; byrRegs +[x7]
+ ubfiz x9, x2, #3, #32
+ ldr d16, [x7, x9]
+ ldr w7, [x13, #0x08]
+ ; byrRegs -[x7]
+ cmp w2, w7
bhs G_M9806_IG11
- add x6, x11, #16
- ; byrRegs +[x6]
- str d16, [x6, x8]
+ add x7, x13, #16
+ ; byrRegs +[x7]
...
libraries.pmi.windows.arm64.checked.mch
-16 (-12.90%) : 94695.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint
@@ -8,10 +8,10 @@
; Final local variable assignments
;
; V00 loc0 [V00,T03] ( 3, 3 ) ref -> x19 class-hnd exact single-def <uint[]>
-; V01 loc1 [V01,T00] ( 7, 49 ) int -> x20
-; V02 loc2 [V02,T01] ( 2, 16 ) int -> x0
+; V01 loc1 [V01,T00] ( 6, 40.60) int -> x20
+; V02 loc2 [V02,T01] ( 2, 15.84) int -> x0
;# V03 OutArgs [V03 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V04 cse0 [V04,T02] ( 2, 9 ) byref -> x21 hoist "CSE - aggressive"
+; V04 cse0 [V04,T02] ( 2, 8.92) byref -> x21 hoist "CSE - aggressive"
;
; Lcl frame size = 8
@@ -34,7 +34,7 @@ G_M39919_IG02: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
add x21, x19, #16
; byrRegs +[x21]
;; size=32 bbWeight=1 PerfScore 4.50
-G_M39919_IG03: ; bbWeight=8, gcrefRegs=80000 {x19}, byrefRegs=200000 {x21}, byref, isz
+G_M39919_IG03: ; bbWeight=7.92, gcrefRegs=80000 {x19}, byrefRegs=200000 {x21}, byref, isz
; gcrRegs -[x0]
mov w0, w20
movz x1, #0xD1FFAB1E // code for Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:CalcEntry(uint):uint
@@ -42,13 +42,11 @@ G_M39919_IG03: ; bbWeight=8, gcrefRegs=80000 {x19}, byrefRegs=200000 {x21
movk x1, #0xD1FFAB1E LSL #32
ldr x1, [x1]
blr x1
- cmp w20, #0xD1FFAB1E
- bhs G_M39919_IG06
str w0, [x21, w20, UXTW #2]
add w20, w20, #1
cmp w20, #255
bls G_M39919_IG03
- ;; size=48 bbWeight=8 PerfScore 84.00
+ ;; size=40 bbWeight=7.92 PerfScore 71.28
G_M39919_IG04: ; bbWeight=1, gcrefRegs=80000 {x19}, byrefRegs=0000 {}, byref
; byrRegs -[x21]
mov x0, x19
@@ -60,13 +58,8 @@ G_M39919_IG05: ; bbWeight=1, epilog, nogc, extend
ldp fp, lr, [sp], #0x30
ret lr
;; size=16 bbWeight=1 PerfScore 5.00
-G_M39919_IG06: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
- ; gcrRegs -[x0 x19]
- bl CORINFO_HELP_RNGCHKFAIL
- brk_windows #0
- ;; size=8 bbWeight=0 PerfScore 0.00
-; Total bytes of code 124, prolog size 16, PerfScore 97.50, instruction count 31, allocated bytes for code 124 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
+; Total bytes of code 108, prolog size 16, PerfScore 84.78, instruction count 27, allocated bytes for code 108 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
; ============================================================
Unwind Info:
@@ -77,7 +70,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 31 (0x0001f) Actual length = 124 (0x00007c)
+ Function Length : 27 (0x0001b) Actual length = 108 (0x00006c)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
libraries_tests.run.windows.arm64.Release.mch
-92 (-2.37%) : 471648.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
@@ -10,23 +10,23 @@
; Final local variable assignments
;
; V00 this [V00,T10] ( 24, 7.31) ref -> x19 this class-hnd single-def <System.Text.StringBuilder>
-; V01 arg1 [V01,T19] ( 13, 3.58) ref -> x21 class-hnd single-def <System.IFormatProvider>
+; V01 arg1 [V01,T18] ( 13, 3.58) ref -> x21 class-hnd single-def <System.IFormatProvider>
; V02 arg2 [V02,T12] ( 5, 6.40) ref -> x20 class-hnd single-def <System.String>
;* V03 arg3 [V03 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def <System.ReadOnlySpan`1[System.Object]>
; V04 loc0 [V04,T39] ( 5, 2.36) ref -> x24 class-hnd single-def <System.ICustomFormatter>
-; V05 loc1 [V05,T02] ( 71, 38.79) int -> x25 ld-addr-op
-; V06 loc2 [V06,T05] ( 34, 18.96) ushort -> [fp+0xDC]
+; V05 loc1 [V05,T02] ( 61, 38.79) int -> x25 ld-addr-op
+; V06 loc2 [V06,T05] ( 30, 18.96) ushort -> [fp+0xDC]
; V07 loc3 [V07,T21] ( 12, 5.00) int -> [fp+0xD8]
; V08 loc4 [V08,T31] ( 5, 3.00) ubyte -> [fp+0xD4]
;* V09 loc5 [V09 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op <System.ReadOnlySpan`1[ushort]>
-; V10 loc6 [V10,T20] ( 7, 5.45) int -> [fp+0xD0]
+; V10 loc6 [V10,T19] ( 7, 5.45) int -> [fp+0xD0]
; V11 loc7 [V11,T16] ( 16, 7.04) ref -> registers class-hnd <System.String>
; V12 loc8 [V12,T51] ( 8, 1.67) ref -> x28 class-hnd <System.String>
-; V13 loc9 [V13,T18] ( 13, 5.66) ref -> [fp+0x68] class-hnd spill-single-def <System.Object>
+; V13 loc9 [V13,T20] ( 12, 5.06) ref -> [fp+0x68] class-hnd spill-single-def <System.Object>
;* V14 loc10 [V14 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.ReadOnlySpan`1[ushort]>
; V15 loc11 [V15,T11] ( 12, 9.07) int -> [fp+0xCC] spill-single-def
; V16 loc12 [V16,T28] ( 3, 3.58) ushort -> x2
-; V17 loc13 [V17,T45] ( 5, 1.93) int -> x3
+; V17 loc13 [V17,T45] ( 5, 1.93) int -> x4
; V18 loc14 [V18,T34] ( 5, 2.45) ref -> x0 class-hnd <System.ISpanFormattable>
; V19 loc15 [V19 ] ( 9, 0.94) int -> [fp+0xC0] do-not-enreg[X] addr-exposed ld-addr-op
; V20 loc16 [V20,T44] ( 5, 1.95) ref -> [fp+0x60] class-hnd spill-single-def <System.IFormattable>
@@ -238,13 +238,13 @@
; V226 tmp204 [V226,T59] ( 2, 1.17) long -> x1 "Cast away GC"
; V227 cse0 [V227,T09] ( 3, 11.54) ref -> x26 hoist "CSE - aggressive"
; V228 cse1 [V228,T60] ( 4, 1.17) int -> x3 "CSE - conservative"
-; V229 cse2 [V229,T64] ( 3, 1.16) long -> x3 "CSE - conservative"
+; V229 cse2 [V229,T64] ( 3, 1.16) long -> x4 "CSE - conservative"
; V230 cse3 [V230,T70] ( 3, 0.92) ref -> x1 "CSE - conservative"
; V231 cse4 [V231,T71] ( 3, 0.92) int -> x5 "CSE - conservative"
; V232 cse5 [V232,T72] ( 3, 0.92) long -> x5 "CSE - conservative"
; V233 cse6 [V233,T75] ( 3, 0.87) ref -> x0 "CSE - conservative"
-; V234 cse7 [V234,T07] ( 20, 15.09) int -> x27 "CSE - aggressive"
-; V235 cse8 [V235,T08] ( 17, 12.56) byref -> x28 "CSE - aggressive"
+; V234 cse7 [V234,T07] ( 18, 15.09) int -> x27 "CSE - aggressive"
+; V235 cse8 [V235,T08] ( 15, 12.56) byref -> x28 "CSE - aggressive"
; V236 cse9 [V236,T95] ( 2, 0.13) ref -> x28 "CSE - moderate"
; V237 cse10 [V237,T29] ( 3, 3.55) int -> x0 "CSE - moderate"
; V238 rat0 [V238,T15] ( 5, 7.19) ref -> x24 class-hnd "replacement local" <System.ICustomFormatter>
@@ -273,7 +273,7 @@ G_M4730_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov w23, w4
;; size=52 bbWeight=1 PerfScore 10.00
G_M4730_IG02: ; bbWeight=1, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=400000 {x22}, byref, isz
- cbz x20, G_M4730_IG150
+ cbz x20, G_M4730_IG143
cbnz x21, G_M4730_IG18
;; size=8 bbWeight=1 PerfScore 2.00
G_M4730_IG03: ; bbWeight=0.71, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=400000 {x22}, byref
@@ -305,7 +305,7 @@ G_M4730_IG06: ; bbWeight=1, gcrefRegs=1380000 {x19 x20 x21 x24}, byrefReg
G_M4730_IG07: ; bbWeight=2.20, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=400000 {x22}, byref, isz
ldr w27, [x20, #0x08]
cmp w27, w25
- bls G_M4730_IG100
+ bls G_M4730_IG93
;; size=12 bbWeight=2.20 PerfScore 9.89
G_M4730_IG08: ; bbWeight=1.20, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=400000 {x22}, byref, isz
add x28, x20, #12
@@ -347,12 +347,12 @@ G_M4730_IG08: ; bbWeight=1.20, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
; gcr arg pop 0
sxtw w1, w0
str w1, [fp, #0xCC] // [V15 loc11]
- tbnz w1, #31, G_M4730_IG139
+ tbnz w1, #31, G_M4730_IG132
;; size=116 bbWeight=1.20 PerfScore 32.40
G_M4730_IG09: ; bbWeight=1.20, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
ldr w2, [fp, #0x7C] // [V163 tmp141]
cmp w1, w2
- bhi G_M4730_IG147
+ bhi G_M4730_IG140
cmp w1, #0
cset x0, ge
movz x2, #0xD1FFAB1E // code for <unknown method>
@@ -416,10 +416,10 @@ G_M4730_IG15: ; bbWeight=0.10, gcrefRegs=380002 {x1 x19 x20 x21}, byrefRe
; gcrRegs +[x24]
b G_M4730_IG06
;; size=24 bbWeight=0.10 PerfScore 0.38
-G_M4730_IG16: ; bbWeight=0.29, gcVars=00000000000000100004000000040000 {V13 V152 V186}, gcrefRegs=15380008 {x3 x19 x20 x21 x24 x26 x28}, byrefRegs=400010 {x4 x22}, gcvars, byref, isz
+G_M4730_IG16: ; bbWeight=0.29, gcVars=00000000000000100004000000100000 {V13 V152 V186}, gcrefRegs=15380008 {x3 x19 x20 x21 x24 x26 x28}, byrefRegs=400010 {x4 x22}, gcvars, byref, isz
; gcrRegs -[x0] +[x3 x26 x28]
; byrRegs +[x4]
- ; GC ptr vars +{V13 V18 V68 V152 V186}
+ ; GC ptr vars +{V13 V20 V68 V152 V186}
str w8, [fp, #0x84] // [V153 tmp131]
str x4, [fp, #0x10] // [V210 tmp188]
; GC ptr vars +{V210}
@@ -430,7 +430,7 @@ G_M4730_IG16: ; bbWeight=0.29, gcVars=00000000000000100004000000040000 {V
movk x4, #0xD1FFAB1E LSL #16
movk x4, #0xD1FFAB1E LSL #32
ldr x4, [x4]
- ; GC ptr vars -{V18 V68 V186}
+ ; GC ptr vars -{V20 V68 V186}
blr x4
; gcrRegs -[x3]
; gcr arg pop 0
@@ -446,7 +446,7 @@ G_M4730_IG16: ; bbWeight=0.29, gcVars=00000000000000100004000000040000 {V
asr x9, x5, #32
ldr w5, [fp, #0x74] // [V211 tmp189]
cmp w9, w5
- bgt G_M4730_IG114
+ bgt G_M4730_IG107
;; size=88 bbWeight=0.29 PerfScore 6.61
G_M4730_IG17: ; bbWeight=0.29, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, byref
b G_M4730_IG21
@@ -470,9 +470,9 @@ G_M4730_IG20: ; bbWeight=0.29, gcrefRegs=1380000 {x19 x20 x21 x24}, byref
; gcrRegs +[x1]
b G_M4730_IG04
;; size=8 bbWeight=0.29 PerfScore 0.44
-G_M4730_IG21: ; bbWeight=0.29, gcVars=00000000000002000004000000040000 {V13 V152 V210}, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, gcvars, byref, isz
+G_M4730_IG21: ; bbWeight=0.29, gcVars=00000000000002000004000000100000 {V13 V152 V210}, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, gcvars, byref, isz
; gcrRegs -[x1] +[x26 x28]
- ; GC ptr vars +{V13 V18 V73 V152 V210}
+ ; GC ptr vars +{V13 V20 V73 V152 V210}
str w9, [fp, #0xC0] // [V19 loc15]
ldr x1, [fp, #0x10] // [V210 tmp188]
; byrRegs +[x1]
@@ -487,13 +487,13 @@ G_M4730_IG21: ; bbWeight=0.29, gcVars=00000000000002000004000000040000 {V
movk x4, #0xD1FFAB1E LSL #16
movk x4, #0xD1FFAB1E LSL #32
ldr x4, [x4]
- ; GC ptr vars -{V18 V73 V210}
+ ; GC ptr vars -{V20 V73 V210}
blr x4
; byrRegs -[x1]
; gcr arg pop 0
ldr w1, [fp, #0x94] // [V119 tmp97]
cmp w1, #10
- blo G_M4730_IG93
+ blo G_M4730_IG86
b G_M4730_IG23
;; size=72 bbWeight=0.29 PerfScore 5.86
G_M4730_IG22: ; bbWeight=0.01, gcVars=00000000000000000000000000000000 {}, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=400000 {x22}, gcvars, byref
@@ -514,17 +514,17 @@ G_M4730_IG22: ; bbWeight=0.01, gcVars=00000000000000000000000000000000 {}
; gcrRegs +[x24]
b G_M4730_IG20
;; size=44 bbWeight=0.01 PerfScore 0.11
-G_M4730_IG23: ; bbWeight=1.17, gcVars=00000000000000000004000000040000 {V13 V152}, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, gcvars, byref, isz
+G_M4730_IG23: ; bbWeight=1.17, gcVars=00000000000000000004000000100000 {V13 V152}, gcrefRegs=15380000 {x19 x20 x21 x24 x26 x28}, byrefRegs=400000 {x22}, gcvars, byref, isz
; gcrRegs -[x0] +[x26 x28]
- ; GC ptr vars +{V13 V18 V152}
+ ; GC ptr vars +{V13 V20 V152}
cmp w1, #100
- blo G_M4730_IG78
+ blo G_M4730_IG71
b G_M4730_IG32
;; size=12 bbWeight=1.17 PerfScore 2.93
G_M4730_IG24: ; bbWeight=0.27, gcVars=00000000000000000000000100000000 {V162}, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400001 {x0 x22 x28}, gcvars, byref
; gcrRegs -[x28]
; byrRegs +[x0 x28]
- ; GC ptr vars -{V13 V18 V152} +{V162}
+ ; GC ptr vars -{V13 V20 V152} +{V162}
ldr x5, [fp, #0x28] // [V162 tmp140]
; byrRegs +[x5]
sxtw x2, w3
@@ -569,18 +569,18 @@ G_M4730_IG26: ; bbWeight=0.06, gcVars=00000000000000000000000100000000 {V
G_M4730_IG27: ; bbWeight=1.20, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
add w25, w25, w3
cmp w25, w27
- bhs G_M4730_IG149
+ bhs G_M4730_IG142
ldrh w2, [x28, w25, UXTW #2]
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG143
+ bls G_M4730_IG136
ldrh w3, [x28, w25, UXTW #2]
cmp w2, w3
- beq G_M4730_IG45
+ beq G_M4730_IG43
;; size=40 bbWeight=1.20 PerfScore 13.78
G_M4730_IG28: ; bbWeight=1.18, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
cmp w2, #123
- bne G_M4730_IG141
+ bne G_M4730_IG134
stp wzr, w3, [fp, #0xD8] // [V07 loc3], [V06 loc2]
str wzr, [fp, #0xD4] // [V08 loc4]
str xzr, [fp, #0x38] // [V152 tmp130]
@@ -588,7 +588,7 @@ G_M4730_IG28: ; bbWeight=1.18, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
str wzr, [fp, #0x84] // [V153 tmp131]
sub w0, w25, #1
cmp w0, w27
- bhs G_M4730_IG149
+ bhs G_M4730_IG142
ldrh w0, [x28, w0, UXTW #2]
cmp w0, #123
cset x0, eq
@@ -607,45 +607,45 @@ G_M4730_IG28: ; bbWeight=1.18, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, b
ldr x2, [x2]
blr x2
; gcr arg pop 0
- ldr w1, [fp, #0xDC] // [V06 loc2]
- sub w2, w1, #48
- cmp w2, #10
- bhs G_M4730_IG142
+ ldr w0, [fp, #0xDC] // [V06 loc2]
+ sub w1, w0, #48
+ cmp w1, #10
+ bhs G_M4730_IG135
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG143
- ldrh w1, [x28, w25, UXTW #2]
- cmp w1, #125
+ bls G_M4730_IG136
+ ldrh w0, [x28, w25, UXTW #2]
+ cmp w0, #125
beq G_M4730_IG31
;; size=140 bbWeight=1.18 PerfScore 42.63
G_M4730_IG29: ; bbWeight=0.69, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
- sub w0, w1, #48
+ sub w2, w0, #48
movz w3, #0xD1FFAB1E
movk w3, #15 LSL #16
- cmp w0, #9
- ccmp w2, w3, z, ls
+ cmp w2, #9
+ ccmp w1, w3, z, ls
bge G_M4730_IG34
;; size=24 bbWeight=0.69 PerfScore 2.43
G_M4730_IG30: ; bbWeight=0.01, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref, isz
- mov w0, #10
- madd w2, w2, w0, w1
- sub w2, w2, #48
- str w2, [fp, #0xD0] // [V10 loc6]
+ mov w2, #10
+ madd w1, w1, w2, w0
+ sub w1, w1, #48
+ str w1, [fp, #0xD0] // [V10 loc6]
add w25, w25, #1
cmp w27, w25
- bls G_M4730_IG143
- ldrh w1, [x28, w25, UXTW #2]
- ldr w2, [fp, #0xD0] // [V10 loc6]
+ bls G_M4730_IG136
+ ldrh w0, [x28, w25, UXTW #2]
+ ldr w1, [fp, #0xD0] // [V10 loc6]
b G_M4730_IG29
;; size=40 bbWeight=0.01 PerfScore 0.12
G_M4730_IG31: ; bbWeight=0.59, gcrefRegs=5380000 {x19 x20 x21 x24 x26}, byrefRegs=10400000 {x22 x28}, byref
- str w2, [fp, #0xD0] // [V10 loc6]
- b G_M4730_IG65
+ str w1, [fp, #0xD0] // [V10 loc6]
+ b G_M4730_IG58
...
-52 (-1.89%) : 264201.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
@@ -16,10 +16,10 @@
; V03 loc0 [V03,T71] ( 8, 300 ) ref -> x21 class-hnd exact <System.Collections.Generic.List`1[ushort]>
;* V04 loc1 [V04 ] ( 0, 0 ) ushort -> zero-ref
;* V05 loc2 [V05 ] ( 0, 0 ) ushort -> zero-ref
-; V06 loc3 [V06,T91] ( 6, 0.15) ref -> x27 class-hnd <int[]>
-; V07 loc4 [V07,T90] ( 10, 0.30) int -> x26
-; V08 loc5 [V08,T72] ( 5, 292.86) int -> x22
-; V09 loc6 [V09,T86] ( 9, 16.78) int -> x25
+; V06 loc3 [V06,T92] ( 2, 0.08) ref -> x27 class-hnd <int[]>
+; V07 loc4 [V07,T90] ( 5, 0.19) int -> x26
+; V08 loc5 [V08,T72] ( 4, 292.86) int -> x22
+; V09 loc6 [V09,T86] ( 8, 16.78) int -> x25
; V10 loc7 [V10,T74] ( 4, 200 ) ushort -> x23
; V11 loc8 [V11,T75] ( 3, 197.61) ushort -> x24
; V12 loc9 [V12,T47] ( 8, 590.43) int -> x20
@@ -28,13 +28,13 @@
; V15 loc12 [V15,T77] ( 2, 195.22) int -> [fp+0x1CC] spill-single-def tier0-frame
; V16 loc13 [V16,T78] ( 2, 195.22) int -> [fp+0x1C8] spill-single-def tier0-frame
; V17 loc14 [V17 ] ( 79,98877.74) struct (40) [fp+0x1A0] do-not-enreg[XS] addr-exposed ld-addr-op tier0-frame <System.Runtime.CompilerServices.DefaultInterpolatedStringHandler>
-; V18 loc15 [V18,T94] ( 3, 0 ) ref -> x19 class-hnd <int[]>
-; V19 loc16 [V19,T93] ( 5, 0 ) int -> x20
-; V20 loc17 [V20,T92] ( 6, 0 ) ref -> x22 class-hnd exact <System.Globalization.Tests.CompareInfoCompareTests+<>c__DisplayClass11_0>
+; V18 loc15 [V18,T95] ( 3, 0 ) ref -> x19 class-hnd <int[]>
+; V19 loc16 [V19,T94] ( 5, 0 ) int -> x20
+; V20 loc17 [V20,T93] ( 6, 0 ) ref -> x22 class-hnd exact <System.Globalization.Tests.CompareInfoCompareTests+<>c__DisplayClass11_0>
;# V21 OutArgs [V21 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V22 tmp1 [V22 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Collections.Generic.List`1[ushort]>
;* V23 tmp2 [V23 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Globalization.Tests.CompareInfoCompareTests+<>c__DisplayClass11_0>
-; V24 tmp3 [V24,T95] ( 3, 0 ) ref -> x23 class-hnd exact "NewObj constructor temp" <System.Func`1[System.Object]>
+; V24 tmp3 [V24,T96] ( 3, 0 ) ref -> x23 class-hnd exact "NewObj constructor temp" <System.Func`1[System.Object]>
;* V25 tmp4 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
;* V26 tmp5 [V26 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V27 tmp6 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
@@ -680,12 +680,13 @@
;* V667 tmp646 [V667 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
;* V668 tmp647 [V668 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
;* V669 tmp648 [V669 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
-; V670 tmp649 [V670,T97] ( 3, 0 ) struct ( 8) [fp+0x70] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
+; V670 tmp649 [V670,T98] ( 3, 0 ) struct ( 8) [fp+0x70] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
; V671 tmp650 [V671,T87] ( 3, 14.35) ref -> x0 "arr expr"
-; V672 tmp651 [V672,T96] ( 3, 0 ) ref -> x0 "arr expr"
-; V673 cse0 [V673,T88] ( 5, 7.21) int -> x0 "CSE - conservative"
-; V674 cse1 [V674,T00] ( 27,98388.70) ref -> x1 multi-def "CSE - aggressive"
-; V675 cse2 [V675,T01] ( 10,70277.64) ref -> [fp+0x18] multi-def "CSE - aggressive"
+; V672 tmp651 [V672,T97] ( 3, 0 ) ref -> x0 "arr expr"
+; V673 cse0 [V673,T91] ( 3, 0.11) int -> x1 "CSE - conservative"
+; V674 cse1 [V674,T88] ( 4, 7.21) int -> x0 "CSE - conservative"
+; V675 cse2 [V675,T00] ( 27,98388.70) ref -> x1 multi-def "CSE - aggressive"
+; V676 cse3 [V676,T01] ( 10,70277.64) ref -> [fp+0x18] multi-def "CSE - aggressive"
;
; Lcl frame size = 176
@@ -719,12 +720,12 @@ G_M28013_IG02: ; bbWeight=1, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0
;; size=4 bbWeight=1 PerfScore 1.00
G_M28013_IG03: ; bbWeight=2.39, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref, isz
cmp w25, w0
- bhs G_M28013_IG67
+ bhs G_M28013_IG63
ldr x0, [x21, #0x08]
; gcrRegs +[x0]
ldr w1, [x0, #0x08]
cmp w25, w1
- bhs G_M28013_IG55
+ bhs G_M28013_IG51
add x0, x0, #16
; gcrRegs -[x0]
; byrRegs +[x0]
@@ -742,12 +743,12 @@ G_M28013_IG04: ; bbWeight=2.39, gcrefRegs=8280000 {x19 x21 x27}, byrefReg
G_M28013_IG05: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x21, #0x10]
cmp w20, w0
- bhs G_M28013_IG67
+ bhs G_M28013_IG63
ldr x0, [x21, #0x08]
; gcrRegs +[x0]
ldr w1, [x0, #0x08]
cmp w20, w1
- bhs G_M28013_IG55
+ bhs G_M28013_IG51
add x0, x0, #16
; gcrRegs -[x0]
; byrRegs +[x0]
@@ -838,7 +839,7 @@ G_M28013_IG05: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG61
+ bhi G_M28013_IG57
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -870,7 +871,7 @@ G_M28013_IG06: ; bbWeight=1561.73, gcVars=0000000000000000008000000000000
G_M28013_IG07: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [fp, #0xBC] // [V32 tmp11]
cmp w0, #15
- blo G_M28013_IG56
+ blo G_M28013_IG52
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -898,8 +899,8 @@ G_M28013_IG09: ; bbWeight=1561.73, gcrefRegs=8280000 {x19 x21 x27}, byref
movz x4, #0xD1FFAB1E
movk x4, #0xD1FFAB1E LSL #16
movk x4, #0xD1FFAB1E LSL #32
- str x4, [fp, #0x18] // [V675 cse2]
- ; GC ptr vars +{V675}
+ str x4, [fp, #0x18] // [V676 cse3]
+ ; GC ptr vars +{V676}
mov x2, x4
; gcrRegs +[x2]
movz x3, #0xD1FFAB1E // code for <unknown method>
@@ -912,7 +913,7 @@ G_M28013_IG09: ; bbWeight=1561.73, gcrefRegs=8280000 {x19 x21 x27}, byref
b G_M28013_IG15
;; size=52 bbWeight=1561.73 PerfScore 16398.12
G_M28013_IG10: ; bbWeight=6246.90, gcVars=00000000000000000000000000000000 {}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref
- ; GC ptr vars -{V675}
+ ; GC ptr vars -{V676}
add x0, fp, #0xD1FFAB1E // [V17 loc14]
movz x1, #0xD1FFAB1E // code for <unknown method>
movk x1, #0xD1FFAB1E LSL #16
@@ -926,7 +927,7 @@ G_M28013_IG11: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG61
+ bhi G_M28013_IG57
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -965,8 +966,8 @@ G_M28013_IG13: ; bbWeight=12493.80, gcrefRegs=8280000 {x19 x21 x27}, byre
movk x4, #0xD1FFAB1E LSL #32
mov x8, x4
; gcrRegs +[x8]
- str x8, [fp, #0x18] // [V675 cse2]
- ; GC ptr vars +{V675}
+ str x8, [fp, #0x18] // [V676 cse3]
+ ; GC ptr vars +{V676}
add x2, x8, #12
; byrRegs +[x2]
ldr x4, [fp, #0xD1FFAB1E] // [V17 loc14]
@@ -996,7 +997,7 @@ G_M28013_IG15: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG61
+ bhi G_M28013_IG57
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -1010,7 +1011,7 @@ G_M28013_IG15: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
str w3, [fp, #0xA8] // [V132 tmp111]
tbz w3, #31, G_M28013_IG17
;; size=48 bbWeight=97.61 PerfScore 1415.31
-G_M28013_IG16: ; bbWeight=1561.73, gcVars=00000000000000000200000000000002 {V133 V675}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG16: ; bbWeight=1561.73, gcVars=00000000000000000200000000000002 {V133 V676}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[x2]
movz x1, #8
movk x1, #0xD1FFAB1E LSL #16
@@ -1028,7 +1029,7 @@ G_M28013_IG16: ; bbWeight=1561.73, gcVars=0000000000000000020000000000000
G_M28013_IG17: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [fp, #0xA8] // [V132 tmp111]
cmp w0, #2
- blo G_M28013_IG57
+ blo G_M28013_IG53
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -1040,7 +1041,7 @@ G_M28013_IG17: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
add w0, w0, #2
str w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
;; size=48 bbWeight=97.61 PerfScore 1415.31
-G_M28013_IG18: ; bbWeight=97.61, gcVars=00000000000000000000000000000002 {V675}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG18: ; bbWeight=97.61, gcVars=00000000000000000000000000000002 {V676}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref, isz
; byrRegs -[x2]
; GC ptr vars -{V133}
ldrb w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x14]
@@ -1049,7 +1050,7 @@ G_M28013_IG18: ; bbWeight=97.61, gcVars=00000000000000000000000000000002
G_M28013_IG19: ; bbWeight=1561.73, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref
add x0, fp, #0xD1FFAB1E // [V17 loc14]
mov w1, w28
- ldr x2, [fp, #0x18] // [V675 cse2]
+ ldr x2, [fp, #0x18] // [V676 cse3]
; gcrRegs +[x2]
movz x3, #0xD1FFAB1E // code for <unknown method>
movk x3, #0xD1FFAB1E LSL #16
@@ -1073,7 +1074,7 @@ G_M28013_IG21: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG61
+ bhi G_M28013_IG57
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -1089,7 +1090,7 @@ G_M28013_IG21: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
str w6, [fp, #0x9C] // [V147 tmp126]
tbz w6, #31, G_M28013_IG23
;; size=52 bbWeight=97.61 PerfScore 1464.12
-G_M28013_IG22: ; bbWeight=6246.90, gcVars=00000000000000000000000000008002 {V148 V675}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG22: ; bbWeight=6246.90, gcVars=00000000000000000000000000008002 {V148 V676}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref
movz x1, #8
movk x1, #0xD1FFAB1E LSL #16
movk x1, #0xD1FFAB1E LSL #32
@@ -1107,7 +1108,7 @@ G_M28013_IG23: ; bbWeight=12493.80, gcrefRegs=8280000 {x19 x21 x27}, byre
ldr x5, [fp, #0x50] // [V148 tmp127]
; byrRegs +[x5]
ldr w6, [fp, #0x9C] // [V147 tmp126]
- ldr x8, [fp, #0x18] // [V675 cse2]
+ ldr x8, [fp, #0x18] // [V676 cse3]
; gcrRegs +[x8]
add x2, x8, #12
; byrRegs +[x2]
@@ -1138,7 +1139,7 @@ G_M28013_IG25: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG61
+ bhi G_M28013_IG57
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -1167,7 +1168,7 @@ G_M28013_IG26: ; bbWeight=1561.73, gcrefRegs=8280000 {x19 x21 x27}, byref
G_M28013_IG27: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=10000000 {x28}, byref, isz
ldr w0, [fp, #0x98] // [V232 tmp211]
cmp w0, #13
- blo G_M28013_IG58
+ blo G_M28013_IG54
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -1188,7 +1189,7 @@ G_M28013_IG28: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
G_M28013_IG29: ; bbWeight=1561.73, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref
add x0, fp, #0xD1FFAB1E // [V17 loc14]
mov w1, w28
- ldr x2, [fp, #0x18] // [V675 cse2]
+ ldr x2, [fp, #0x18] // [V676 cse3]
; gcrRegs +[x2]
movz x3, #0xD1FFAB1E // code for <unknown method>
movk x3, #0xD1FFAB1E LSL #16
@@ -1212,7 +1213,7 @@ G_M28013_IG31: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG61
+ bhi G_M28013_IG57
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -1228,7 +1229,7 @@ G_M28013_IG31: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
str w6, [fp, #0x8C] // [V247 tmp226]
...
-76 (-1.82%) : 261603.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
@@ -13,13 +13,13 @@
;* V00 this [V00 ] ( 0, 0 ) ref -> zero-ref this class-hnd single-def <System.Globalization.Tests.CompareInfoCompareTests>
;* V01 arg1 [V01 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def <int[]>
; V02 arg2 [V02,T111] ( 3, 2 ) ref -> x19 class-hnd single-def <int[]>
-; V03 loc0 [V03,T82] ( 10, 302.42) ref -> x21 class-hnd exact <System.Collections.Generic.List`1[ushort]>
+; V03 loc0 [V03,T82] ( 9, 302.42) ref -> x21 class-hnd exact <System.Collections.Generic.List`1[ushort]>
;* V04 loc1 [V04 ] ( 0, 0 ) ushort -> zero-ref
;* V05 loc2 [V05 ] ( 0, 0 ) ushort -> zero-ref
-; V06 loc3 [V06,T113] ( 6, 0.15) ref -> x27 class-hnd <int[]>
-; V07 loc4 [V07,T112] ( 10, 0.30) int -> x26
-; V08 loc5 [V08,T83] ( 5, 292.88) int -> x22
-; V09 loc6 [V09,T109] ( 9, 16.74) int -> x25
+; V06 loc3 [V06,T114] ( 2, 0.08) ref -> x27 class-hnd <int[]>
+; V07 loc4 [V07,T112] ( 5, 0.19) int -> x26
+; V08 loc5 [V08,T83] ( 4, 292.88) int -> x22
+; V09 loc6 [V09,T109] ( 8, 16.74) int -> x25
; V10 loc7 [V10,T87] ( 4, 200 ) ushort -> x23
; V11 loc8 [V11,T88] ( 3, 197.61) ushort -> x24
; V12 loc9 [V12,T49] ( 8, 590.46) int -> x20
@@ -28,13 +28,13 @@
; V15 loc12 [V15,T93] ( 2, 195.23) int -> [fp+0x23C] spill-single-def tier0-frame
; V16 loc13 [V16,T94] ( 2, 195.23) int -> [fp+0x238] spill-single-def tier0-frame
; V17 loc14 [V17 ] ( 88, 99762.64) struct (40) [fp+0x210] do-not-enreg[XSF] addr-exposed ld-addr-op tier0-frame <System.Runtime.CompilerServices.DefaultInterpolatedStringHandler>
-; V18 loc15 [V18,T120] ( 3, 0 ) ref -> x19 class-hnd <int[]>
-; V19 loc16 [V19,T117] ( 5, 0 ) int -> x20
+; V18 loc15 [V18,T121] ( 3, 0 ) ref -> x19 class-hnd <int[]>
+; V19 loc16 [V19,T118] ( 5, 0 ) int -> x20
;* V20 loc17 [V20 ] ( 0, 0 ) ref -> zero-ref class-hnd exact <<unknown class>>
;# V21 OutArgs [V21 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V22 tmp1 [V22 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Collections.Generic.List`1[ushort]>
-; V23 tmp2 [V23,T114] ( 7, 0 ) ref -> x22 class-hnd exact "NewObj constructor temp" <<unknown class>>
-; V24 tmp3 [V24,T121] ( 3, 0 ) ref -> x23 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V23 tmp2 [V23,T115] ( 7, 0 ) ref -> x22 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V24 tmp3 [V24,T122] ( 3, 0 ) ref -> x23 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V25 tmp4 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <ushort[]>
;* V26 tmp5 [V26 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V27 tmp6 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <ushort[]>
@@ -484,17 +484,17 @@
; V471 tmp450 [V471,T101] ( 4, 174.67) ref -> [fp+0x60] class-hnd exact "Inline stloc first use temp" <<unknown class>>
;* V472 tmp451 [V472 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V473 tmp452 [V473 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
-; V474 tmp453 [V474,T132] ( 2, 0 ) int -> [fp+0xD8] spill-single-def "impAppendStmt"
-; V475 tmp454 [V475,T133] ( 2, 0 ) int -> [fp+0xD4] spill-single-def "impAppendStmt"
+; V474 tmp453 [V474,T133] ( 2, 0 ) int -> [fp+0xD8] spill-single-def "impAppendStmt"
+; V475 tmp454 [V475,T134] ( 2, 0 ) int -> [fp+0xD4] spill-single-def "impAppendStmt"
;* V476 tmp455 [V476 ] ( 0, 0 ) ref -> zero-ref
;* V477 tmp456 [V477 ] ( 0, 0 ) int -> zero-ref
;* V478 tmp457 [V478 ] ( 0, 0 ) int -> zero-ref
-; V479 tmp458 [V479,T134] ( 2, 0 ) int -> x3
+; V479 tmp458 [V479,T135] ( 2, 0 ) int -> x3
;* V480 tmp459 [V480 ] ( 0, 0 ) ref -> zero-ref
;* V481 tmp460 [V481 ] ( 0, 0 ) int -> zero-ref
;* V482 tmp461 [V482 ] ( 0, 0 ) int -> zero-ref
;* V483 tmp462 [V483 ] ( 0, 0 ) int -> zero-ref
-; V484 tmp463 [V484,T124] ( 3, 0 ) int -> x4
+; V484 tmp463 [V484,T125] ( 3, 0 ) int -> x4
;* V485 tmp464 [V485 ] ( 0, 0 ) ref -> zero-ref
;* V486 tmp465 [V486 ] ( 0, 0 ) int -> zero-ref
;* V487 tmp466 [V487 ] ( 0, 0 ) int -> zero-ref
@@ -505,26 +505,26 @@
;* V492 tmp471 [V492 ] ( 0, 0 ) int -> zero-ref
;* V493 tmp472 [V493 ] ( 0, 0 ) int -> zero-ref
;* V494 tmp473 [V494 ] ( 0, 0 ) int -> zero-ref
-; V495 tmp474 [V495,T125] ( 3, 0 ) int -> x5
+; V495 tmp474 [V495,T126] ( 3, 0 ) int -> x5
; V496 tmp475 [V496,T81] ( 2, 347.06) int -> [fp+0xD0] spill-single-def "impAppendStmt"
; V497 tmp476 [V497,T80] ( 4, 347.06) byref -> x0 "Inline stloc first use temp"
; V498 tmp477 [V498,T103] ( 3, 173.53) ref -> [fp+0x58] class-hnd "Inline stloc first use temp" <System.Array>
;* V499 tmp478 [V499 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Buffers.SharedArrayPoolThreadLocalArray>
-; V500 tmp479 [V500,T129] ( 2, 0 ) ref -> x6 class-hnd exact "dup spill" <System.Buffers.SharedArrayPoolPartitions>
-; V501 tmp480 [V501,T118] ( 4, 0 ) ref -> x6
+; V500 tmp479 [V500,T130] ( 2, 0 ) ref -> x6 class-hnd exact "dup spill" <System.Buffers.SharedArrayPoolPartitions>
+; V501 tmp480 [V501,T119] ( 4, 0 ) ref -> x6
;* V502 tmp481 [V502 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <System.Buffers.SharedArrayPoolPartitions>
-; V503 tmp482 [V503,T122] ( 3, 0 ) ref -> x21 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V503 tmp482 [V503,T123] ( 3, 0 ) ref -> x21 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V504 tmp483 [V504 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V505 tmp484 [V505 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
;* V506 tmp485 [V506 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
; V507 tmp486 [V507,T86] ( 3, 260.30) int -> [fp+0xCC] spill-single-def "Inline stloc first use temp"
;* V508 tmp487 [V508 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V509 tmp488 [V509 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
-; V510 tmp489 [V510,T126] ( 3, 0 ) ubyte -> x3 "Inline return value spill temp"
-; V511 tmp490 [V511,T116] ( 5, 0 ) ref -> [fp+0x50] class-hnd exact spill-single-def "Inline stloc first use temp" <<unknown class>>
-; V512 tmp491 [V512,T115] ( 7, 0 ) int -> [fp+0xC8] "Inline stloc first use temp"
-; V513 tmp492 [V513,T119] ( 4, 0 ) int -> [fp+0xC4] "Inline stloc first use temp"
-; V514 tmp493 [V514,T135] ( 2, 0 ) int -> x0 "dup spill"
+; V510 tmp489 [V510,T127] ( 3, 0 ) ubyte -> x3 "Inline return value spill temp"
+; V511 tmp490 [V511,T117] ( 5, 0 ) ref -> [fp+0x50] class-hnd exact spill-single-def "Inline stloc first use temp" <<unknown class>>
+; V512 tmp491 [V512,T116] ( 7, 0 ) int -> [fp+0xC8] "Inline stloc first use temp"
+; V513 tmp492 [V513,T120] ( 4, 0 ) int -> [fp+0xC4] "Inline stloc first use temp"
+; V514 tmp493 [V514,T136] ( 2, 0 ) int -> x0 "dup spill"
; V515 tmp494 [V515,T89] ( 3, 195.23) byref -> x2 "field V35._reference (fldOffset=0x0)" P-INDEP
; V516 tmp495 [V516,T90] ( 3, 195.23) int -> x3 "field V35._length (fldOffset=0x8)" P-INDEP
;* V517 tmp496 [V517 ] ( 0, 0 ) byref -> zero-ref "field V36._reference (fldOffset=0x0)" P-INDEP
@@ -761,17 +761,18 @@
;* V748 tmp727 [V748 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
;* V749 tmp728 [V749 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
;* V750 tmp729 [V750 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
-; V751 tmp730 [V751,T123] ( 3, 0 ) ref -> x0 "arr expr"
-; V752 tmp731 [V752,T127] ( 3, 0 ) int -> [fp+0xC0] spill-single-def "fgMakeTemp is creating a new local variable"
-; V753 tmp732 [V753,T128] ( 3, 0 ) int -> x0 "fgMakeTemp is creating a new local variable"
-; V754 tmp733 [V754,T136] ( 2, 0 ) int -> [fp+0xBC] spill-single-def "argument with side effect"
-; V755 tmp734 [V755,T137] ( 2, 0 ) int -> x3 "argument with side effect"
-; V756 tmp735 [V756,T138] ( 2, 0 ) int -> [fp+0xB8] spill-single-def "argument with side effect"
-; V757 tmp736 [V757,T130] ( 2, 0 ) ref -> x19 "argument with side effect"
-; V758 tmp737 [V758,T131] ( 2, 0 ) ref -> x2 "argument with side effect"
+; V751 tmp730 [V751,T124] ( 3, 0 ) ref -> x0 "arr expr"
+; V752 tmp731 [V752,T128] ( 3, 0 ) int -> [fp+0xC0] spill-single-def "fgMakeTemp is creating a new local variable"
+; V753 tmp732 [V753,T129] ( 3, 0 ) int -> x0 "fgMakeTemp is creating a new local variable"
+; V754 tmp733 [V754,T137] ( 2, 0 ) int -> [fp+0xBC] spill-single-def "argument with side effect"
+; V755 tmp734 [V755,T138] ( 2, 0 ) int -> x3 "argument with side effect"
+; V756 tmp735 [V756,T139] ( 2, 0 ) int -> [fp+0xB8] spill-single-def "argument with side effect"
+; V757 tmp736 [V757,T131] ( 2, 0 ) ref -> x19 "argument with side effect"
+; V758 tmp737 [V758,T132] ( 2, 0 ) ref -> x2 "argument with side effect"
; V759 cse0 [V759,T85] ( 3, 290.16) ref -> [fp+0x28] spill-single-def "CSE - conservative"
-; V760 cse1 [V760,T00] ( 35,110368.89) ref -> [fp+0x20] multi-def "CSE - aggressive"
-; V761 cse2 [V761,T01] ( 10, 70282.17) ref -> [fp+0x18] multi-def "CSE - aggressive"
+; V760 cse1 [V760,T113] ( 3, 0.11) int -> x0 "CSE - conservative"
+; V761 cse2 [V761,T00] ( 35,110368.89) ref -> [fp+0x20] multi-def "CSE - aggressive"
+; V762 cse3 [V762,T01] ( 10, 70282.17) ref -> [fp+0x18] multi-def "CSE - aggressive"
;
; Lcl frame size = 288
@@ -806,12 +807,12 @@ G_M28013_IG02: ; bbWeight=1, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0
G_M28013_IG03: ; bbWeight=2.39, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x21, #0x10]
cmp w25, w0
- bhs G_M28013_IG88
+ bhs G_M28013_IG84
ldr x0, [x21, #0x08]
; gcrRegs +[x0]
ldr w1, [x0, #0x08]
cmp w25, w1
- bhs G_M28013_IG68
+ bhs G_M28013_IG64
add x0, x0, #16
; gcrRegs -[x0]
; byrRegs +[x0]
@@ -838,12 +839,12 @@ G_M28013_IG04: ; bbWeight=2.39, gcrefRegs=8280000 {x19 x21 x27}, byrefReg
G_M28013_IG05: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [x21, #0x10]
cmp w20, w0
- bhs G_M28013_IG88
+ bhs G_M28013_IG84
ldr x0, [x21, #0x08]
; gcrRegs +[x0]
ldr w1, [x0, #0x08]
cmp w20, w1
- bhs G_M28013_IG68
+ bhs G_M28013_IG64
add x0, x0, #16
; gcrRegs -[x0]
; byrRegs +[x0]
@@ -941,7 +942,7 @@ G_M28013_IG05: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
; gcrRegs -[x3]
; gcr arg pop 0
str x0, [fp, #0xD1FFAB1E] // [V17 loc14+0x08]
- cbz x0, G_M28013_IG69
+ cbz x0, G_M28013_IG65
add x2, x0, #16
; byrRegs +[x2]
ldr w3, [x0, #0x08]
@@ -955,7 +956,7 @@ G_M28013_IG06: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG89
+ bhi G_M28013_IG85
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -990,7 +991,7 @@ G_M28013_IG07: ; bbWeight=1561.83, gcVars=0000000000000000000000000020000
G_M28013_IG08: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [fp, #0xD1FFAB1E] // [V39 tmp18]
cmp w0, #15
- blo G_M28013_IG70
+ blo G_M28013_IG66
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -1018,8 +1019,8 @@ G_M28013_IG10: ; bbWeight=1561.83, gcrefRegs=8280000 {x19 x21 x27}, byref
movz x4, #0xD1FFAB1E
movk x4, #0xD1FFAB1E LSL #16
movk x4, #0xD1FFAB1E LSL #32
- str x4, [fp, #0x18] // [V761 cse2]
- ; GC ptr vars +{V761}
+ str x4, [fp, #0x18] // [V762 cse3]
+ ; GC ptr vars +{V762}
mov x2, x4
; gcrRegs +[x2]
movz x3, #0xD1FFAB1E // code for <unknown method>
@@ -1032,7 +1033,7 @@ G_M28013_IG10: ; bbWeight=1561.83, gcrefRegs=8280000 {x19 x21 x27}, byref
b G_M28013_IG16
;; size=52 bbWeight=1561.83 PerfScore 16399.17
G_M28013_IG11: ; bbWeight=6247.30, gcVars=000000000000000000000000002000000000000000000000 {V759}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref
- ; GC ptr vars -{V761}
+ ; GC ptr vars -{V762}
add x0, fp, #0xD1FFAB1E // [V17 loc14]
movz x1, #0xD1FFAB1E // code for <unknown method>
movk x1, #0xD1FFAB1E LSL #16
@@ -1046,7 +1047,7 @@ G_M28013_IG12: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG89
+ bhi G_M28013_IG85
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -1090,8 +1091,8 @@ G_M28013_IG14: ; bbWeight=12494.61, gcrefRegs=8280000 {x19 x21 x27}, byre
movk x4, #0xD1FFAB1E LSL #32
mov x8, x4
; gcrRegs +[x8]
- str x8, [fp, #0x18] // [V761 cse2]
- ; GC ptr vars +{V761}
+ str x8, [fp, #0x18] // [V762 cse3]
+ ; GC ptr vars +{V762}
add x2, x8, #12
; byrRegs +[x2]
ldr x4, [fp, #0xD1FFAB1E] // [V17 loc14]
@@ -1121,7 +1122,7 @@ G_M28013_IG16: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
ldr w0, [fp, #0xD1FFAB1E] // [V17 loc14+0x10]
ldr w1, [fp, #0xD1FFAB1E] // [V17 loc14+0x20]
cmp w0, w1
- bhi G_M28013_IG89
+ bhi G_M28013_IG85
ldr x1, [fp, #0xD1FFAB1E] // [V17 loc14+0x18]
; byrRegs +[x1]
ubfiz x2, x0, #1, #32
@@ -1135,7 +1136,7 @@ G_M28013_IG16: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
str w3, [fp, #0xD1FFAB1E] // [V139 tmp118]
tbz w3, #31, G_M28013_IG18
;; size=48 bbWeight=97.61 PerfScore 1415.40
-G_M28013_IG17: ; bbWeight=1561.83, gcVars=000000000000000000000000002000002000000000000002 {V140 V759 V761}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG17: ; bbWeight=1561.83, gcVars=000000000000000000000000002000002000000000000002 {V140 V759 V762}, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[x2]
movz x0, #8
movk x0, #0xD1FFAB1E LSL #16
@@ -1156,7 +1157,7 @@ G_M28013_IG17: ; bbWeight=1561.83, gcVars=0000000000000000000000000020000
G_M28013_IG18: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRegs=0000 {}, byref, isz
ldr w0, [fp, #0xD1FFAB1E] // [V139 tmp118]
cmp w0, #2
- blo G_M28013_IG71
+ blo G_M28013_IG67
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -1168,7 +1169,7 @@ G_M28013_IG18: ; bbWeight=97.61, gcrefRegs=8280000 {x19 x21 x27}, byrefRe
add w0, w0, #2
...
librariestestsnotieredcompilation.run.windows.arm64.Release.mch
+12 (+0.82%) : 135326.dasm - System.IO.Tests.UmaReadWriteStructArray:UmaReadWriteStructArrayMultiples() (FullOpts)
@@ -8,54 +8,54 @@
; 16 inlinees with PGO data; 46 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 loc0 [V00,T32] ( 3, 5.98) ref -> x19 class-hnd exact single-def <<unknown class>>
-; V01 loc1 [V01,T24] ( 4, 10.14) ref -> x20 class-hnd exact single-def <<unknown class>>
+; V00 loc0 [V00,T31] ( 3, 5.98) ref -> x19 class-hnd exact single-def <<unknown class>>
+; V01 loc1 [V01,T14] ( 7, 22.11) ref -> x20 class-hnd exact single-def <<unknown class>>
; V02 loc2 [V02,T09] ( 7, 24.76) int -> x0
;* V03 loc3 [V03 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SF] ld-addr-op <System.IO.Tests.Uma_TestStructs+UmaTestStruct>
-; V04 loc4 [V04,T37] ( 7, 3 ) ref -> [fp+0x18] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
-; V05 loc5 [V05,T38] ( 5, 2 ) ref -> [fp+0x10] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
-; V06 loc6 [V06,T07] ( 8, 29.26) int -> x19
+; V04 loc4 [V04,T36] ( 7, 3 ) ref -> [fp+0x18] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
+; V05 loc5 [V05,T37] ( 5, 2 ) ref -> [fp+0x10] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
+; V06 loc6 [V06,T07] ( 8, 28.97) int -> x19
;# V07 OutArgs [V07 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V08 tmp1 [V08,T30] ( 4, 8 ) ref -> x21 class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
-; V09 tmp2 [V09,T25] ( 5, 10.06) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
-; V10 tmp3 [V10,T33] ( 2, 4.06) int -> x19 "Inlining Arg"
-; V11 tmp4 [V11,T31] ( 3, 6.09) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V08 tmp1 [V08,T29] ( 4, 8 ) ref -> x21 class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
+; V09 tmp2 [V09,T24] ( 5, 10.06) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
+; V10 tmp3 [V10,T32] ( 2, 4.06) int -> x19 "Inlining Arg"
+; V11 tmp4 [V11,T30] ( 3, 6.09) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V12 tmp5 [V12 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V13 tmp6 [V13,T36] ( 3, 3.05) ref -> x23 class-hnd exact single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V14 tmp7 [V14,T26] ( 4, 8.12) ref -> x25 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V15 tmp8 [V15,T27] ( 4, 8.12) ref -> x26 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V16 tmp9 [V16,T15] ( 2, 16.24) int -> x25 "Inlining Arg"
-; V17 tmp10 [V17,T10] ( 3, 24.36) ref -> x26 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V13 tmp6 [V13,T35] ( 3, 3.05) ref -> x23 class-hnd exact single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V14 tmp7 [V14,T25] ( 4, 8.12) ref -> x25 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V15 tmp8 [V15,T26] ( 4, 8.12) ref -> x26 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V16 tmp9 [V16,T16] ( 2, 16.08) int -> x25 "Inlining Arg"
+; V17 tmp10 [V17,T11] ( 3, 24.12) ref -> x26 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V18 tmp11 [V18 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V19 tmp12 [V19,T18] ( 3, 12.18) ref -> x27 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V20 tmp13 [V20,T01] ( 4, 32.48) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
-; V21 tmp14 [V21,T02] ( 4, 32.48) ref -> x27 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V19 tmp12 [V19,T19] ( 3, 12.06) ref -> x27 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V20 tmp13 [V20,T01] ( 4, 32.16) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V21 tmp14 [V21,T02] ( 4, 32.16) ref -> x27 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V22 tmp15 [V22 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
-; V23 tmp16 [V23,T16] ( 2, 16.24) int -> x25 "Inlining Arg"
-; V24 tmp17 [V24,T11] ( 3, 24.36) ref -> x26 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V23 tmp16 [V23,T17] ( 2, 16.08) int -> x25 "Inlining Arg"
+; V24 tmp17 [V24,T12] ( 3, 24.12) ref -> x26 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V25 tmp18 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V26 tmp19 [V26,T19] ( 3, 12.18) ref -> x27 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V27 tmp20 [V27,T03] ( 4, 32.48) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
-; V28 tmp21 [V28,T04] ( 4, 32.48) ref -> x27 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V26 tmp19 [V26,T20] ( 3, 12.06) ref -> x27 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V27 tmp20 [V27,T03] ( 4, 32.16) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V28 tmp21 [V28,T04] ( 4, 32.16) ref -> x27 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V29 tmp22 [V29 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V30 tmp23 [V30 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V31 tmp24 [V31 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
;* V32 tmp25 [V32 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V33 tmp26 [V33,T17] ( 2, 16.24) ushort -> x25 "Inlining Arg"
-; V34 tmp27 [V34,T12] ( 3, 24.36) ref -> x26 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
+; V33 tmp26 [V33,T18] ( 2, 16.08) ushort -> x25 "Inlining Arg"
+; V34 tmp27 [V34,T13] ( 3, 24.12) ref -> x26 class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
;* V35 tmp28 [V35 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V36 tmp29 [V36,T20] ( 3, 12.18) ref -> x27 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V37 tmp30 [V37,T05] ( 4, 32.48) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
-; V38 tmp31 [V38,T06] ( 4, 32.48) ref -> x27 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V36 tmp29 [V36,T21] ( 3, 12.06) ref -> x27 class-hnd exact "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
+; V37 tmp30 [V37,T05] ( 4, 32.16) ref -> x28 class-hnd exact "NewObj constructor temp" <<unknown class>>
+; V38 tmp31 [V38,T06] ( 4, 32.16) ref -> x27 class-hnd exact "NewObj constructor temp" <<unknown class>>
;* V39 tmp32 [V39 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V40 tmp33 [V40 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V41 tmp34 [V41 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
-;* V42 tmp35 [V42,T34] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
-; V43 tmp36 [V43,T28] ( 3, 8.12) ubyte -> x25 "field V30.value (fldOffset=0x1)" P-INDEP
+;* V42 tmp35 [V42,T33] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
+; V43 tmp36 [V43,T27] ( 3, 8.04) ubyte -> x25 "field V30.value (fldOffset=0x1)" P-INDEP
;* V44 tmp37 [V44 ] ( 0, 0 ) ubyte -> zero-ref "field V31.hasValue (fldOffset=0x0)" P-INDEP
;* V45 tmp38 [V45 ] ( 0, 0 ) ubyte -> zero-ref "field V31.value (fldOffset=0x1)" P-INDEP
-;* V46 tmp39 [V46,T35] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
-; V47 tmp40 [V47,T29] ( 2, 8.12) ubyte -> x0 "field V40.value (fldOffset=0x1)" P-INDEP
+;* V46 tmp39 [V46,T34] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
+; V47 tmp40 [V47,T28] ( 3, 8.04) ubyte -> x22 "field V40.value (fldOffset=0x1)" P-INDEP
;* V48 tmp41 [V48 ] ( 0, 0 ) ubyte -> zero-ref "field V41.hasValue (fldOffset=0x0)" P-INDEP
;* V49 tmp42 [V49 ] ( 0, 0 ) ubyte -> zero-ref "field V41.value (fldOffset=0x1)" P-INDEP
;* V50 tmp43 [V50 ] ( 0, 0 ) int -> zero-ref "V03.[000..004)"
@@ -64,14 +64,13 @@
;* V53 tmp46 [V53 ] ( 0, 0 ) ushort -> zero-ref "V03.[012..014)"
;* V54 tmp47 [V54 ] ( 0, 0 ) ubyte -> zero-ref "V03.[014..015)"
; V55 tmp48 [V55,T00] ( 6, 47.52) byref -> x1 "Spilling address for field-by-field copy"
-; V56 tmp49 [V56,T40] ( 6, 0 ) struct ( 8) [fp+0x20] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
-; V57 PSPSym [V57,T39] ( 1, 1 ) long -> [fp+0x28] do-not-enreg[V] "PSPSym"
-; V58 cse0 [V58,T13] ( 5, 20.30) byref -> x22 "CSE - aggressive"
-; V59 cse1 [V59,T21] ( 3, 12.18) long -> x22 "CSE - moderate"
-; V60 cse2 [V60,T08] ( 9, 27.41) long -> x24 "CSE - aggressive"
-; V61 cse3 [V61,T14] ( 7, 19.29) long -> x21 "CSE - aggressive"
-; V62 cse4 [V62,T23] ( 4, 10.15) long -> x23 "CSE - moderate"
-; V63 cse5 [V63,T22] ( 3, 11.88) int -> x2 "CSE - moderate"
+; V56 tmp49 [V56,T39] ( 6, 0 ) struct ( 8) [fp+0x20] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
+; V57 PSPSym [V57,T38] ( 1, 1 ) long -> [fp+0x28] do-not-enreg[V] "PSPSym"
+; V58 cse0 [V58,T10] ( 6, 24.12) long -> x22 "CSE - aggressive"
+; V59 cse1 [V59,T08] ( 9, 27.16) long -> x24 "CSE - aggressive"
+; V60 cse2 [V60,T15] ( 7, 19.12) long -> x21 "CSE - aggressive"
+; V61 cse3 [V61,T23] ( 4, 10.07) long -> x23 "CSE - moderate"
+; V62 cse4 [V62,T22] ( 3, 11.88) int -> x2 "CSE - moderate"
;
; Lcl frame size = 32
@@ -146,7 +145,7 @@ G_M53770_IG04: ; bbWeight=1, gcrefRegs=180000 {x19 x20}, byrefRegs=0000 {
str x21, [fp, #0x18] // [V04 loc4]
; GC ptr vars +{V04}
;; size=48 bbWeight=1 PerfScore 10.00
-G_M53770_IG05: ; bbWeight=1, gcVars=0000002000000000 {V04}, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG05: ; bbWeight=1, gcVars=0000001000000000 {V04}, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, gcvars, byref
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
@@ -170,7 +169,7 @@ G_M53770_IG05: ; bbWeight=1, gcVars=0000002000000000 {V04}, gcrefRegs=380
str x22, [fp, #0x10] // [V05 loc5]
; GC ptr vars +{V05}
;; size=60 bbWeight=1 PerfScore 11.50
-G_M53770_IG06: ; bbWeight=1.02, gcVars=0000006000000000 {V04 V05}, gcrefRegs=580000 {x19 x20 x22}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG06: ; bbWeight=1.02, gcVars=0000003000000000 {V04 V05}, gcrefRegs=580000 {x19 x20 x22}, byrefRegs=0000 {}, gcvars, byref
mov x0, x22
; gcrRegs +[x0]
mov x2, x19
@@ -287,7 +286,7 @@ G_M53770_IG06: ; bbWeight=1.02, gcVars=0000006000000000 {V04 V05}, gcrefR
; gcr arg pop 0
mov w19, wzr
;; size=288 bbWeight=1.02 PerfScore 53.80
-G_M53770_IG07: ; bbWeight=4.06, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
+G_M53770_IG07: ; bbWeight=4.02, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
ubfiz x0, x19, #4, #32
add x22, x0, #16
ldr w25, [x20, x22]
@@ -367,10 +366,11 @@ G_M53770_IG07: ; bbWeight=4.06, gcrefRegs=100000 {x20}, byrefRegs=0000 {}
blr x3
; gcrRegs -[x2 x26]
; gcr arg pop 0
- add x22, x20, x22
- ; byrRegs +[x22]
- ldr w25, [x22, #0x08]
+ add x0, x20, x22
+ ; byrRegs +[x0]
+ ldr w25, [x0, #0x08]
mov x0, x21
+ ; byrRegs -[x0]
bl CORINFO_HELP_NEWSFAST
; gcrRegs +[x0]
; gcr arg pop 0
@@ -446,10 +446,14 @@ G_M53770_IG07: ; bbWeight=4.06, gcrefRegs=100000 {x20}, byrefRegs=0000 {}
blr x3
; gcrRegs -[x2 x26]
; gcr arg pop 0
- ldrb w25, [x22, #0x04]
+ add x0, x20, x22
+ ; byrRegs +[x0]
+ ldrb w25, [x0, #0x04]
cbnz w25, G_M53770_IG10
- ldrh w25, [x22, #0x0C]
+ add x0, x20, x22
+ ldrh w25, [x0, #0x0C]
movz x0, #0xD1FFAB1E
+ ; byrRegs -[x0]
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
bl CORINFO_HELP_NEWSFAST
@@ -532,19 +536,21 @@ G_M53770_IG07: ; bbWeight=4.06, gcrefRegs=100000 {x20}, byrefRegs=0000 {}
blr x3
; gcrRegs -[x2 x26]
; gcr arg pop 0
- ldrb w0, [x22, #0x0E]
- cbz w0, G_M53770_IG11
- ;; size=560 bbWeight=4.06 PerfScore 475.07
-G_M53770_IG08: ; bbWeight=4, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
- ; byrRegs -[x22]
+ add x0, x20, x22
+ ; byrRegs +[x0]
+ ldrb w22, [x0, #0x0E]
+ cbz w22, G_M53770_IG11
+ ;; size=572 bbWeight=4.02 PerfScore 476.35
+G_M53770_IG08: ; bbWeight=3.96, gcrefRegs=100000 {x20}, byrefRegs=0000 {}, byref, isz
+ ; byrRegs -[x0]
add w19, w19, #1
cmp w19, #12
blt G_M53770_IG07
- ;; size=12 bbWeight=4 PerfScore 8.00
-G_M53770_IG09: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ ;; size=12 bbWeight=3.96 PerfScore 7.92
+G_M53770_IG09: ; bbWeight=1.02, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
; gcrRegs -[x20]
b G_M53770_IG12
- ;; size=4 bbWeight=0.50 PerfScore 0.50
+ ;; size=4 bbWeight=1.02 PerfScore 1.02
G_M53770_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov w1, #1
strb w1, [fp, #0x20] // [V56 tmp49]
@@ -565,7 +571,7 @@ G_M53770_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
G_M53770_IG11: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov w1, #1
strb w1, [fp, #0x20] // [V56 tmp49]
- strb wzr, [fp, #0x21] // [V56 tmp49+0x01]
+ strb w22, [fp, #0x21] // [V56 tmp49+0x01]
ldrh w1, [fp, #0x20] // [V56 tmp49]
mov x0, xzr
movz x2, #0xD1FFAB1E // code for <unknown method>
@@ -620,8 +626,8 @@ G_M53770_IG14: ; bbWeight=1, epilog, nogc, extend
ldp fp, lr, [sp], #0x80
ret lr
;; size=28 bbWeight=1 PerfScore 7.00
-G_M53770_IG15: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
- ; GC ptr vars +{V04 V05 V37 V38}
+G_M53770_IG15: ; bbWeight=0, gcVars=0000003000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
+ ; GC ptr vars +{V04 V05 V36 V37}
stp fp, lr, [sp, #-0x70]!
stp x19, x20, [sp, #0x20]
stp x21, x22, [sp, #0x30]
@@ -631,11 +637,11 @@ G_M53770_IG15: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs
add x3, fp, #128
str x3, [sp, #0x18]
;; size=32 bbWeight=0 PerfScore 0.00
-G_M53770_IG16: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG16: ; bbWeight=0, gcVars=0000003000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
ldr x0, [fp, #0x10] // [V05 loc5]
; gcrRegs +[x0]
strb wzr, [x0, #0x24]
- ; GC ptr vars -{V05 V37 V38}
+ ; GC ptr vars -{V05 V36 V37}
bl <unknown method>
; gcrRegs -[x0]
; gcr arg pop 0
@@ -659,7 +665,7 @@ G_M53770_IG18: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
add x3, fp, #128
str x3, [sp, #0x18]
;; size=32 bbWeight=0 PerfScore 0.00
-G_M53770_IG19: ; bbWeight=0, gcVars=0000002000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG19: ; bbWeight=0, gcVars=0000001000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
ldr x0, [fp, #0x18] // [V04 loc4]
; gcrRegs +[x0]
mov w1, #1
@@ -691,7 +697,7 @@ G_M53770_IG20: ; bbWeight=0, funclet epilog, nogc, extend
ret lr
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 1472, prolog size 36, PerfScore 637.97, instruction count 368, allocated bytes for code 1472 (MethodHash=942a2df5) for method System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
+; Total bytes of code 1484, prolog size 36, PerfScore 639.68, instruction count 371, allocated bytes for code 1484 (MethodHash=942a2df5) for method System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
; ============================================================
Unwind Info:
@@ -702,7 +708,7 @@ Unwind Info:
...
Details
Improvements/regressions per collection
| Collection |
Contexts with diffs |
Improvements |
Regressions |
Same size |
Improvements (bytes) |
Regressions (bytes) |
| benchmarks.run.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_pgo.windows.arm64.checked.mch |
5 |
5 |
0 |
0 |
-1,304 |
+0 |
| benchmarks.run_tiered.windows.arm64.checked.mch |
3 |
3 |
0 |
0 |
-632 |
+0 |
| coreclr_tests.run.windows.arm64.checked.mch |
4 |
4 |
0 |
0 |
-944 |
+0 |
| libraries.crossgen2.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries.pmi.windows.arm64.checked.mch |
2 |
1 |
1 |
0 |
-16 |
+268 |
| libraries_tests.run.windows.arm64.Release.mch |
3 |
3 |
0 |
0 |
-220 |
+0 |
| librariestestsnotieredcompilation.run.windows.arm64.Release.mch |
1 |
0 |
1 |
0 |
-0 |
+12 |
| realworld.run.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| smoke_tests.nativeaot.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
|
18 |
16 |
2 |
0 |
-3,116 |
+280 |
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| benchmarks.run.windows.arm64.checked.mch |
24,455 |
4 |
24,451 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_pgo.windows.arm64.checked.mch |
97,540 |
48,627 |
48,913 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_tiered.windows.arm64.checked.mch |
49,174 |
36,718 |
12,456 |
0 (0.00%) |
0 (0.00%) |
| coreclr_tests.run.windows.arm64.checked.mch |
595,181 |
362,437 |
232,744 |
1 (0.00%) |
2 (0.00%) |
| libraries.crossgen2.windows.arm64.checked.mch |
2,130 |
0 |
2,130 |
0 (0.00%) |
0 (0.00%) |
| libraries.pmi.windows.arm64.checked.mch |
305,519 |
6 |
305,513 |
0 (0.00%) |
3 (0.00%) |
| libraries_tests.run.windows.arm64.Release.mch |
646,640 |
468,460 |
178,180 |
0 (0.00%) |
0 (0.00%) |
| librariestestsnotieredcompilation.run.windows.arm64.Release.mch |
317,026 |
21,598 |
295,428 |
0 (0.00%) |
0 (0.00%) |
| realworld.run.windows.arm64.checked.mch |
33,242 |
3 |
33,239 |
0 (0.00%) |
0 (0.00%) |
| smoke_tests.nativeaot.windows.arm64.checked.mch |
77 |
0 |
77 |
0 (0.00%) |
0 (0.00%) |
|
2,070,984 |
937,853 |
1,133,131 |
1 (0.00%) |
5 (0.00%) |
jit-analyze output
benchmarks.run_pgo.windows.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 46635420 (overridden on cmd)
Total bytes of diff: 46634116 (overridden on cmd)
Total bytes of delta: -1304 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-476 : 94817.dasm (-33.06 % of base)
-460 : 94806.dasm (-31.94 % of base)
-156 : 51169.dasm (-21.67 % of base)
-156 : 51193.dasm (-21.67 % of base)
-56 : 72927.dasm (-6.64 % of base)
5 total files with Code Size differences (5 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-476 (-33.06 % of base) : 94817.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-460 (-31.94 % of base) : 94806.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-156 (-21.67 % of base) : 51169.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 51193.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.64 % of base) : 72927.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method improvements (percentages):
-476 (-33.06 % of base) : 94817.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-460 (-31.94 % of base) : 94806.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-156 (-21.67 % of base) : 51169.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 51193.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.64 % of base) : 72927.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
5 total methods with Code Size differences (5 improved, 0 regressed).
benchmarks.run_tiered.windows.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 15506668 (overridden on cmd)
Total bytes of diff: 15506036 (overridden on cmd)
Total bytes of delta: -632 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-424 : 48566.dasm (-31.74 % of base)
-152 : 32768.dasm (-14.13 % of base)
-56 : 44222.dasm (-6.97 % of base)
3 total files with Code Size differences (3 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-424 (-31.74 % of base) : 48566.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-152 (-14.13 % of base) : 32768.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.97 % of base) : 44222.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method improvements (percentages):
-424 (-31.74 % of base) : 48566.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-152 (-14.13 % of base) : 32768.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-56 (-6.97 % of base) : 44222.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
3 total methods with Code Size differences (3 improved, 0 regressed).
coreclr_tests.run.windows.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 496311484 (overridden on cmd)
Total bytes of diff: 496310540 (overridden on cmd)
Total bytes of delta: -944 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-460 : 254124.dasm (-31.86 % of base)
-172 : 304013.dasm (-32.58 % of base)
-156 : 249937.dasm (-21.67 % of base)
-156 : 249921.dasm (-21.67 % of base)
4 total files with Code Size differences (4 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-460 (-31.86 % of base) : 254124.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-172 (-32.58 % of base) : 304013.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
-156 (-21.67 % of base) : 249937.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 249921.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
Top method improvements (percentages):
-172 (-32.58 % of base) : 304013.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
-460 (-31.86 % of base) : 254124.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-156 (-21.67 % of base) : 249937.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-156 (-21.67 % of base) : 249921.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
4 total methods with Code Size differences (4 improved, 0 regressed).
libraries.pmi.windows.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 79839104 (overridden on cmd)
Total bytes of diff: 79839356 (overridden on cmd)
Total bytes of delta: 252 (0.00 % of base)
diff is a regression.
relative diff is a regression.
Detail diffs
Top file regressions (bytes):
268 : 98100.dasm (36.41 % of base)
Top file improvements (bytes):
-16 : 94695.dasm (-12.90 % of base)
2 total files with Code Size differences (1 improved, 1 regressed), 0 unchanged.
Top method regressions (bytes):
268 (36.41 % of base) : 98100.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
Top method improvements (bytes):
-16 (-12.90 % of base) : 94695.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
Top method regressions (percentages):
268 (36.41 % of base) : 98100.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
Top method improvements (percentages):
-16 (-12.90 % of base) : 94695.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
2 total methods with Code Size differences (1 improved, 1 regressed).
libraries_tests.run.windows.arm64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 327035492 (overridden on cmd)
Total bytes of diff: 327035272 (overridden on cmd)
Total bytes of delta: -220 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-92 : 471648.dasm (-2.37 % of base)
-76 : 261603.dasm (-1.82 % of base)
-52 : 264201.dasm (-1.89 % of base)
3 total files with Code Size differences (3 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-92 (-2.37 % of base) : 471648.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
-76 (-1.82 % of base) : 261603.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-52 (-1.89 % of base) : 264201.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
Top method improvements (percentages):
-92 (-2.37 % of base) : 471648.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
-52 (-1.89 % of base) : 264201.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-76 (-1.82 % of base) : 261603.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
3 total methods with Code Size differences (3 improved, 0 regressed).
librariestestsnotieredcompilation.run.windows.arm64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 171570108 (overridden on cmd)
Total bytes of diff: 171570120 (overridden on cmd)
Total bytes of delta: 12 (0.00 % of base)
diff is a regression.
relative diff is a regression.
Detail diffs
Top file regressions (bytes):
12 : 135326.dasm (0.82 % of base)
1 total files with Code Size differences (0 improved, 1 regressed), 0 unchanged.
Top method regressions (bytes):
12 (0.82 % of base) : 135326.dasm - System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
Top method regressions (percentages):
12 (0.82 % of base) : 135326.dasm - System.IO.Tests.Uma_ReadWriteStructArray:UmaReadWriteStructArray_Multiples() (FullOpts)
1 total methods with Code Size differences (0 improved, 1 regressed).
windows x64
Diffs are based on 2,098,661 contexts (926,221 MinOpts, 1,172,440 FullOpts).
MISSED contexts: base: 1 (0.00%), diff: 3 (0.00%)
Overall (-1,662 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.windows.x64.checked.mch |
35,808,303 |
-706 |
| benchmarks.run_tiered.windows.x64.checked.mch |
12,549,902 |
-635 |
| coreclr_tests.run.windows.x64.checked.mch |
392,970,471 |
-640 |
| libraries.pmi.windows.x64.checked.mch |
61,645,769 |
+507 |
| libraries_tests.run.windows.x64.Release.mch |
279,151,239 |
-188 |
| librariestestsnotieredcompilation.run.windows.x64.Release.mch |
137,561,629 |
+0 |
FullOpts (-1,662 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| benchmarks.run_pgo.windows.x64.checked.mch |
21,776,222 |
-706 |
| benchmarks.run_tiered.windows.x64.checked.mch |
3,454,165 |
-635 |
| coreclr_tests.run.windows.x64.checked.mch |
120,248,493 |
-640 |
| libraries.pmi.windows.x64.checked.mch |
61,532,248 |
+507 |
| libraries_tests.run.windows.x64.Release.mch |
106,976,623 |
-188 |
| librariestestsnotieredcompilation.run.windows.x64.Release.mch |
126,635,563 |
+0 |
Example diffs
benchmarks.run_pgo.windows.x64.checked.mch
-476 (-34.15%) : 29507.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,209 +10,209 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T06] ( 33, 8.16) ref -> rbx class-hnd single-def <double[][]>
-; V01 arg1 [V01,T14] ( 7, 2.01) ref -> rsi class-hnd single-def <int[]>
+; V00 arg0 [V00,T06] ( 21, 8.15) ref -> rbx class-hnd single-def <double[][]>
+; V01 arg1 [V01,T14] ( 4, 2.02) ref -> rsi class-hnd single-def <int[]>
; V02 loc0 [V02,T04] ( 6,102.98) int -> rdi
-; V03 loc1 [V03,T15] ( 19, 3.11) int -> r14
-; V04 loc2 [V04,T26] ( 7, 0.02) int -> r15
-; V05 loc3 [V05,T07] ( 35, 7.15) int -> rbp
-; V06 loc4 [V06,T18] ( 22, 0.15) int -> r13
-; V07 loc5 [V07,T32] ( 8, 1.08) double -> registers
-; V08 loc6 [V08,T12] ( 22, 4.16) int -> rcx
-; V09 loc7 [V09,T31] ( 9, 2.09) double -> mm1
-; V10 loc8 [V10,T27] ( 4, 0.02) ref -> [rsp+0xF0] class-hnd tier0-frame <double[]>
-; V11 loc9 [V11,T33] ( 5, 1.02) double -> mm6
-; V12 loc10 [V12,T13] ( 19, 4.10) int -> rax
-; V13 loc11 [V13,T11] ( 9, 5.03) int -> r8
-; V14 loc12 [V14,T03] ( 8,104.00) ref -> rdx class-hnd <double[]>
-; V15 loc13 [V15,T05] ( 6,102.98) ref -> rax class-hnd <double[]>
-; V16 loc14 [V16,T30] ( 3,100 ) double -> mm0
+; V03 loc1 [V03,T15] ( 13, 3.11) int -> r14
+; V04 loc2 [V04,T26] ( 2, 0.02) int -> r15
+; V05 loc3 [V05,T07] ( 21, 7.16) int -> rbp
+; V06 loc4 [V06,T18] ( 12, 0.16) int -> r13
+; V07 loc5 [V07,T29] ( 5, 1.08) double -> registers
+; V08 loc6 [V08,T12] ( 14, 4.15) int -> rcx
+; V09 loc7 [V09,T28] ( 6, 2.09) double -> mm1
+; V10 loc8 [V10,T25] ( 2, 0.02) ref -> [rsp+0xE0] class-hnd spill-single-def tier0-frame <double[]>
+; V11 loc9 [V11,T30] ( 3, 1.02) double -> mm0
+; V12 loc10 [V12,T13] ( 12, 4.09) int -> rax
+; V13 loc11 [V13,T11] ( 7, 5.03) int -> rdx
+; V14 loc12 [V14,T03] ( 8,104.00) ref -> rax class-hnd <double[]>
+; V15 loc13 [V15,T05] ( 6,102.98) ref -> r8 class-hnd <double[]>
+; V16 loc14 [V16,T27] ( 3,100 ) double -> mm0
; V17 loc15 [V17,T01] ( 14,401.96) int -> rcx
; V18 OutArgs [V18 ] ( 1, 1 ) struct (32) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T08] ( 9, 6.08) byref -> r9 "dup spill"
-; V20 tmp2 [V20,T22] ( 4, 0.04) ref -> rdx class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V19 tmp1 [V19,T08] ( 6, 6.08) byref -> rdx "dup spill"
+; V20 tmp2 [V20,T22] ( 2, 0.04) ref -> rdx class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V21 tmp3 [V21,T00] ( 6,593.98) byref -> r9 "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T19] ( 6, 0.06) ref -> r10 "arr expr"
-; V24 tmp6 [V24,T09] ( 9, 6.08) ref -> r9 "arr expr"
-; V25 tmp7 [V25,T20] ( 6, 0.06) ref -> r11 "arr expr"
-; V26 tmp8 [V26,T21] ( 6, 0.06) ref -> r8 "arr expr"
-; V27 tmp9 [V27,T10] ( 9, 6.08) ref -> r10 "arr expr"
+; V23 tmp5 [V23,T19] ( 3, 0.06) ref -> rcx "arr expr"
+; V24 tmp6 [V24,T09] ( 6, 6.08) ref -> rdx "arr expr"
+; V25 tmp7 [V25,T20] ( 3, 0.06) ref -> rcx "arr expr"
+; V26 tmp8 [V26,T21] ( 3, 0.06) ref -> rax "arr expr"
+; V27 tmp9 [V27,T10] ( 6, 6.08) ref -> rcx "arr expr"
; V28 cse0 [V28,T23] ( 3, 0.03) ref -> rdx "CSE - conservative"
-; V29 cse1 [V29,T28] ( 3, 0.00) ref -> rdx "CSE - conservative"
-; V30 cse2 [V30,T29] ( 3, 0.00) ref -> rax "CSE - conservative"
-; V31 cse3 [V31,T24] ( 3, 0.03) ref -> r8 "CSE - conservative"
-; V32 cse4 [V32,T16] ( 4, 2.99) int -> r10 hoist multi-def "CSE - moderate"
-; V33 cse5 [V33,T02] ( 3,294.02) long -> r10 "CSE - aggressive"
-; V34 cse6 [V34,T17] ( 12, 2.09) long -> r12 "CSE - moderate"
-; V35 cse7 [V35,T25] ( 10, 0.02) long -> r12 "CSE - conservative"
+; V29 cse1 [V29,T24] ( 3, 0.03) ref -> rax "CSE - conservative"
+; V30 cse2 [V30,T16] ( 4, 2.99) int -> r10 hoist multi-def "CSE - moderate"
+; V31 cse3 [V31,T02] ( 3,294.02) long -> r10 "CSE - aggressive"
+; V32 cse4 [V32,T17] ( 12, 2.11) long -> r12 "CSE - moderate"
;
-; Lcl frame size = 56
+; Lcl frame size = 40
-G_M58112_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- sub rsp, 120
- mov qword ptr [rsp+0x158], r15
- mov qword ptr [rsp+0x150], r14
- mov qword ptr [rsp+0x148], r13
- mov qword ptr [rsp+0x140], r12
- mov qword ptr [rsp+0x138], rdi
- mov qword ptr [rsp+0x130], rsi
- mov qword ptr [rsp+0x128], rbx
+G_M58112_IG01: ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG
+ sub rsp, 104
+ mov qword ptr [rsp+0x148], r15
+ mov qword ptr [rsp+0x140], r14
+ mov qword ptr [rsp+0x138], r13
+ mov qword ptr [rsp+0x130], r12
+ mov qword ptr [rsp+0x128], rdi
+ mov qword ptr [rsp+0x120], rsi
+ mov qword ptr [rsp+0x118], rbx
vzeroupper
- vmovaps xmmword ptr [rsp+0x20], xmm6
- mov rbx, gword ptr [rsp+0x170]
+ mov rbx, gword ptr [rsp+0x160]
; gcrRegs +[rbx]
- mov rsi, gword ptr [rsp+0x178]
+ mov rsi, gword ptr [rsp+0x168]
; gcrRegs +[rsi]
- mov edi, dword ptr [rsp+0x124]
- mov r14d, dword ptr [rsp+0x120]
- mov r15d, dword ptr [rsp+0x11C]
- mov ebp, dword ptr [rsp+0x118]
- mov r8d, dword ptr [rsp+0xE0]
- mov rdx, gword ptr [rsp+0xD8]
- ; gcrRegs +[rdx]
- mov rax, gword ptr [rsp+0xD0]
+ mov edi, dword ptr [rsp+0x114]
+ mov r14d, dword ptr [rsp+0x110]
+ mov r15d, dword ptr [rsp+0x10C]
+ mov ebp, dword ptr [rsp+0x108]
+ mov edx, dword ptr [rsp+0xD0]
+ mov rax, gword ptr [rsp+0xC8]
; gcrRegs +[rax]
- vmovsd xmm0, qword ptr [rsp+0xC8]
- mov ecx, dword ptr [rsp+0xC4]
- ;; size=155 bbWeight=1 PerfScore 34.25
-G_M58112_IG02: ; bbWeight=1, gcrefRegs=004D {rax rdx rbx rsi}, byrefRegs=0000 {}, byref
+ mov r8, gword ptr [rsp+0xC0]
+ ; gcrRegs +[r8]
+ vmovsd xmm0, qword ptr [rsp+0xB8]
+ mov ecx, dword ptr [rsp+0xB4]
+ ;; size=148 bbWeight=1 PerfScore 32.25
+G_M58112_IG02: ; bbWeight=1, gcrefRegs=0149 {rax rbx rsi r8}, byrefRegs=0000 {}, byref
jmp G_M58112_IG15
;; size=5 bbWeight=1 PerfScore 2.00
G_M58112_IG03: ; bbWeight=0.01, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rax rdx]
+ ; gcrRegs -[rax r8]
mov r13d, ebp
+ cmp r13d, dword ptr [rbx+0x08]
+ jae G_M58112_IG35
mov r12d, r13d
- mov r8, gword ptr [rbx+8*r12+0x10]
- ; gcrRegs +[r8]
- mov r10, r8
- ; gcrRegs +[r10]
- cmp r13d, dword ptr [r10+0x08]
- jae G_M58112_IG53
- vmovsd xmm0, qword ptr [r10+8*r12+0x10]
+ mov rax, gword ptr [rbx+8*r12+0x10]
+ ; gcrRegs +[rax]
+ mov rcx, rax
+ ; gcrRegs +[rcx]
+ cmp r13d, dword ptr [rcx+0x08]
+ jae G_M58112_IG35
+ vmovsd xmm0, qword ptr [rcx+8*r12+0x10]
vandps xmm0, xmm0, xmmword ptr [reloc @RWD00]
lea ecx, [r13+0x01]
+ ; gcrRegs -[rcx]
cmp ecx, r14d
jl SHORT G_M58112_IG06
- ;; size=48 bbWeight=0.01 PerfScore 0.15
-G_M58112_IG04: ; bbWeight=0.01, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[r10]
+ ;; size=58 bbWeight=0.01 PerfScore 0.19
+G_M58112_IG04: ; bbWeight=0.01, gcrefRegs=0049 {rax rbx rsi}, byrefRegs=0000 {}, byref, isz
+ cmp ebp, dword ptr [rsi+0x08]
+ jae G_M58112_IG35
mov dword ptr [rsi+4*r12+0x10], r13d
cmp r13d, dword ptr [rbx+0x08]
- jae G_M58112_IG53
+ jae G_M58112_IG35
mov ecx, r13d
mov rdx, gword ptr [rbx+8*rcx+0x10]
; gcrRegs +[rdx]
- mov r11, rdx
- ; gcrRegs +[r11]
- cmp ebp, dword ptr [r11+0x08]
- jae G_M58112_IG53
- vmovsd xmm0, qword ptr [r11+8*r12+0x10]
+ mov rcx, rdx
+ ; gcrRegs +[rcx]
+ cmp ebp, dword ptr [rcx+0x08]
+ jae G_M58112_IG35
+ vmovsd xmm0, qword ptr [rcx+8*r12+0x10]
vxorps xmm1, xmm1, xmm1
vucomisd xmm0, xmm1
jp SHORT G_M58112_IG05
je G_M58112_IG38
- ;; size=59 bbWeight=0.01 PerfScore 0.20
-G_M58112_IG05: ; bbWeight=0.01, gcrefRegs=014C {rdx rbx rsi r8}, byrefRegs=0000 {}, byref
- ; gcrRegs -[r11]
+ ;; size=67 bbWeight=0.01 PerfScore 0.24
+G_M58112_IG05: ; bbWeight=0.01, gcrefRegs=004D {rax rdx rbx rsi}, byrefRegs=0000 {}, byref
+ ; gcrRegs -[rcx]
jmp G_M58112_IG22
;; size=5 bbWeight=0.01 PerfScore 0.02
-G_M58112_IG06: ; bbWeight=0.01, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+G_M58112_IG06: ; bbWeight=0.01, gcrefRegs=0049 {rax rbx rsi}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rdx]
mov edx, ecx
or edx, r14d
jge SHORT G_M58112_IG09
;; size=7 bbWeight=0.01 PerfScore 0.02
-G_M58112_IG07: ; bbWeight=0.01, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref
+G_M58112_IG07: ; bbWeight=0.01, gcrefRegs=0049 {rax rbx rsi}, byrefRegs=0000 {}, byref
cmp ecx, dword ptr [rbx+0x08]
- jae G_M58112_IG53
- mov r9d, ecx
- mov r9, gword ptr [rbx+8*r9+0x10]
- ; gcrRegs +[r9]
- cmp ebp, dword ptr [r9+0x08]
- jae G_M58112_IG53
- vmovsd xmm1, qword ptr [r9+8*r12+0x10]
+ jae G_M58112_IG35
+ mov edx, ecx
+ mov rdx, gword ptr [rbx+8*rdx+0x10]
+ ; gcrRegs +[rdx]
+ cmp ebp, dword ptr [rdx+0x08]
+ jae G_M58112_IG35
+ vmovsd xmm1, qword ptr [rdx+8*r12+0x10]
vandps xmm1, xmm1, xmmword ptr [reloc @RWD00]
vucomisd xmm1, xmm0
jbe G_M58112_IG21
- ;; size=52 bbWeight=0.01 PerfScore 0.19
-G_M58112_IG08: ; bbWeight=0.00, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref
- ; gcrRegs -[r9]
+ ;; size=50 bbWeight=0.01 PerfScore 0.19
+G_M58112_IG08: ; bbWeight=0.00, gcrefRegs=0049 {rax rbx rsi}, byrefRegs=0000 {}, byref
+ ; gcrRegs -[rdx]
jmp G_M58112_IG20
;; size=5 bbWeight=0.00 PerfScore 0.00
-G_M58112_IG09: ; bbWeight=0.01, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+G_M58112_IG09: ; bbWeight=0.01, gcrefRegs=0049 {rax rbx rsi}, byrefRegs=0000 {}, byref, isz
cmp dword ptr [rbx+0x08], r14d
jl SHORT G_M58112_IG07
;; size=6 bbWeight=0.01 PerfScore 0.04
-G_M58112_IG10: ; bbWeight=0.99, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+G_M58112_IG10: ; bbWeight=1.00, gcrefRegs=0049 {rax rbx rsi}, byrefRegs=0000 {}, byref, isz
mov edx, ecx
- mov r9, gword ptr [rbx+8*rdx+0x10]
- ; gcrRegs +[r9]
- cmp ebp, dword ptr [r9+0x08]
- jae G_M58112_IG53
- vmovsd xmm1, qword ptr [r9+8*r12+0x10]
+ mov rdx, gword ptr [rbx+8*rdx+0x10]
+ ; gcrRegs +[rdx]
+ cmp ebp, dword ptr [rdx+0x08]
+ jae G_M58112_IG35
+ vmovsd xmm1, qword ptr [rdx+8*r12+0x10]
vandps xmm1, xmm1, xmmword ptr [reloc @RWD00]
vucomisd xmm1, xmm0
ja SHORT G_M58112_IG13
- ;; size=38 bbWeight=0.99 PerfScore 15.14
-G_M58112_IG11: ; bbWeight=0.99, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[r9]
+ ;; size=37 bbWeight=1.00 PerfScore 15.29
+G_M58112_IG11: ; bbWeight=1.00, gcrefRegs=0049 {rax rbx rsi}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs -[rdx]
inc ecx
cmp ecx, r14d
...
-464 (-33.41%) : 29513.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -10,516 +10,363 @@
; 1 inlinees with PGO data; 0 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T11] ( 24, 29.95) ref -> rbx class-hnd single-def <double[][]>
-; V01 arg1 [V01,T16] ( 7, 2.13) ref -> rsi class-hnd single-def <int[]>
+; V00 arg0 [V00,T11] ( 15, 29.95) ref -> rbx class-hnd single-def <double[][]>
+; V01 arg1 [V01,T16] ( 4, 2.25) ref -> rsi class-hnd single-def <int[]>
; V02 loc0 [V02,T05] ( 6,102.67) int -> rdi
-; V03 loc1 [V03,T13] ( 19, 26.15) int -> r14
-; V04 loc2 [V04,T30] ( 7, 0.00) int -> r15
-; V05 loc3 [V05,T12] ( 35, 29.87) int -> rbp
-; V06 loc4 [V06,T19] ( 22, 1.38) int -> r12
-; V07 loc5 [V07,T33] ( 8, 13.06) double -> mm0
-; V08 loc6 [V08,T10] ( 22, 50.24) int -> rcx
-; V09 loc7 [V09,T32] ( 9, 25.37) double -> mm1
-; V10 loc8 [V10,T25] ( 4, 0.25) ref -> [rsp+0x100] class-hnd tier0-frame <double[]>
-; V11 loc9 [V11,T34] ( 5, 12.57) double -> mm6
-; V12 loc10 [V12,T09] ( 19, 50.40) int -> rcx
-; V13 loc11 [V13,T15] ( 9, 4.49) int -> r8
-; V14 loc12 [V14,T03] ( 8,103.59) ref -> rdx class-hnd <double[]>
-; V15 loc13 [V15,T04] ( 6,102.77) ref -> rax class-hnd <double[]>
-; V16 loc14 [V16,T31] ( 3,100.00) double -> mm0
+; V03 loc1 [V03,T13] ( 13, 26.15) int -> r14
+; V04 loc2 [V04,T27] ( 2, 0.00) int -> r15
+; V05 loc3 [V05,T12] ( 21, 30.00) int -> rbp
+; V06 loc4 [V06,T19] ( 12, 1.38) int -> r13
+; V07 loc5 [V07,T30] ( 5, 13.06) double -> mm0
+; V08 loc6 [V08,T10] ( 14, 50.12) int -> rcx
+; V09 loc7 [V09,T29] ( 6, 25.37) double -> mm1
+; V10 loc8 [V10,T24] ( 2, 0.25) ref -> [rsp+0xE0] class-hnd spill-single-def tier0-frame <double[]>
+; V11 loc9 [V11,T31] ( 3, 12.57) double -> mm0
+; V12 loc10 [V12,T09] ( 12, 50.28) int -> rax
+; V13 loc11 [V13,T15] ( 7, 4.49) int -> rdx
+; V14 loc12 [V14,T03] ( 8,103.59) ref -> rax class-hnd <double[]>
+; V15 loc13 [V15,T04] ( 6,102.77) ref -> r8 class-hnd <double[]>
+; V16 loc14 [V16,T28] ( 3,100.00) double -> mm0
; V17 loc15 [V17,T01] ( 14,402.07) int -> rcx
; V18 OutArgs [V18 ] ( 1, 1 ) struct (32) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T06] ( 9, 74.67) byref -> r9 "dup spill"
-; V20 tmp2 [V20,T22] ( 4, 0.50) ref -> rdx class-hnd "Strict ordering of exceptions for Array store" <double[]>
+; V19 tmp1 [V19,T06] ( 6, 74.67) byref -> rdx "dup spill"
+; V20 tmp2 [V20,T22] ( 2, 0.50) ref -> rdx class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V21 tmp3 [V21,T00] ( 6,594.61) byref -> r9 "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T29] ( 6, 0.00) ref -> r9 "arr expr"
-; V24 tmp6 [V24,T08] ( 9, 73.86) ref -> r11 "arr expr"
-; V25 tmp7 [V25,T20] ( 6, 0.75) ref -> rcx "arr expr"
-; V26 tmp8 [V26,T21] ( 6, 0.75) ref -> r8 "arr expr"
-; V27 tmp9 [V27,T07] ( 9, 74.67) ref -> r10 "arr expr"
-; V28 cse0 [V28,T23] ( 3, 0.37) ref -> rdx "CSE - conservative"
-; V29 cse1 [V29,T27] ( 3, 0.00) ref -> rdx "CSE - conservative"
-; V30 cse2 [V30,T28] ( 3, 0.00) ref -> r10 "CSE - conservative"
-; V31 cse3 [V31,T26] ( 3, 0.12) ref -> r8 "CSE - conservative"
-; V32 cse4 [V32,T17] ( 15, 3.44) int -> r13 multi-def "CSE - moderate"
-; V33 cse5 [V33,T18] ( 4, 2.78) int -> r10 hoist multi-def "CSE - moderate"
-; V34 cse6 [V34,T02] ( 3,294.33) long -> r10 "CSE - aggressive"
-; V35 cse7 [V35,T14] ( 12, 25.13) long -> [rsp+0x28] spill-single-def "CSE - moderate"
-; V36 cse8 [V36,T24] ( 10, 0.25) long -> [rsp+0x20] spill-single-def "CSE - conservative"
+; V23 tmp5 [V23,T26] ( 3, 0.00) ref -> rcx "arr expr"
+; V24 tmp6 [V24,T08] ( 6, 73.86) ref -> rdx "arr expr"
+; V25 tmp7 [V25,T20] ( 3, 0.75) ref -> rcx "arr expr"
+; V26 tmp8 [V26,T21] ( 3, 0.75) ref -> rax "arr expr"
+; V27 tmp9 [V27,T07] ( 6, 74.67) ref -> rcx "arr expr"
+; V28 cse0 [V28,T23] ( 3, 0.38) ref -> rdx "CSE - conservative"
+; V29 cse1 [V29,T25] ( 3, 0.13) ref -> rax "CSE - conservative"
+; V30 cse2 [V30,T17] ( 10, 3.19) int -> r12 multi-def "CSE - moderate"
+; V31 cse3 [V31,T18] ( 4, 2.78) int -> r10 hoist multi-def "CSE - moderate"
+; V32 cse4 [V32,T02] ( 3,294.33) long -> r10 "CSE - aggressive"
+; V33 cse5 [V33,T14] ( 12, 25.38) long -> [rsp+0x20] spill-single-def "CSE - moderate"
;
-; Lcl frame size = 72
+; Lcl frame size = 40
-G_M58112_IG01: ; bbWeight=0.90, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- sub rsp, 136
- mov qword ptr [rsp+0x168], r15
- mov qword ptr [rsp+0x160], r14
- mov qword ptr [rsp+0x158], r13
- mov qword ptr [rsp+0x150], r12
- mov qword ptr [rsp+0x148], rdi
- mov qword ptr [rsp+0x140], rsi
- mov qword ptr [rsp+0x138], rbx
+G_M58112_IG01: ; bbWeight=0.90, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG
+ sub rsp, 104
+ mov qword ptr [rsp+0x148], r15
+ mov qword ptr [rsp+0x140], r14
+ mov qword ptr [rsp+0x138], r13
+ mov qword ptr [rsp+0x130], r12
+ mov qword ptr [rsp+0x128], rdi
+ mov qword ptr [rsp+0x120], rsi
+ mov qword ptr [rsp+0x118], rbx
vzeroupper
- vmovaps xmmword ptr [rsp+0x30], xmm6
- mov rbx, gword ptr [rsp+0x180]
+ mov rbx, gword ptr [rsp+0x160]
; gcrRegs +[rbx]
- mov rsi, gword ptr [rsp+0x188]
+ mov rsi, gword ptr [rsp+0x168]
; gcrRegs +[rsi]
- mov edi, dword ptr [rsp+0x134]
- mov r14d, dword ptr [rsp+0x130]
- mov r15d, dword ptr [rsp+0x12C]
- mov ebp, dword ptr [rsp+0x128]
- mov r8d, dword ptr [rsp+0xF0]
- mov rdx, gword ptr [rsp+0xE8]
- ; gcrRegs +[rdx]
- mov rax, gword ptr [rsp+0xE0]
+ mov edi, dword ptr [rsp+0x114]
+ mov r14d, dword ptr [rsp+0x110]
+ mov r15d, dword ptr [rsp+0x10C]
+ mov ebp, dword ptr [rsp+0x108]
+ mov edx, dword ptr [rsp+0xD0]
+ mov rax, gword ptr [rsp+0xC8]
; gcrRegs +[rax]
- vmovsd xmm0, qword ptr [rsp+0xD8]
- mov ecx, dword ptr [rsp+0xD4]
- ;; size=158 bbWeight=0.90 PerfScore 30.77
-G_M58112_IG02: ; bbWeight=0.90, gcrefRegs=004D {rax rdx rbx rsi}, byrefRegs=0000 {}, byref
+ mov r8, gword ptr [rsp+0xC0]
+ ; gcrRegs +[r8]
+ vmovsd xmm0, qword ptr [rsp+0xB8]
+ mov ecx, dword ptr [rsp+0xB4]
+ ;; size=148 bbWeight=0.90 PerfScore 28.97
+G_M58112_IG02: ; bbWeight=0.90, gcrefRegs=0149 {rax rbx rsi r8}, byrefRegs=0000 {}, byref
cmp ecx, edi
- jge G_M58112_IG47
+ jge G_M58112_IG30
;; size=8 bbWeight=0.90 PerfScore 1.12
-G_M58112_IG03: ; bbWeight=0.89, gcrefRegs=004D {rax rdx rbx rsi}, byrefRegs=0000 {}, byref
- jmp G_M58112_IG37
+G_M58112_IG03: ; bbWeight=0.89, gcrefRegs=0149 {rax rbx rsi r8}, byrefRegs=0000 {}, byref
+ jmp G_M58112_IG25
;; size=5 bbWeight=0.89 PerfScore 1.78
G_M58112_IG04: ; bbWeight=0.00, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref
- ; gcrRegs -[rax rdx]
- mov r12d, ebp
- mov eax, r12d
- mov qword ptr [rsp+0x28], rax
- mov r8, gword ptr [rbx+8*rax+0x10]
- ; gcrRegs +[r8]
- mov r9, r8
- ; gcrRegs +[r9]
- cmp r12d, dword ptr [r9+0x08]
- jae G_M58112_IG48
- vmovsd xmm0, qword ptr [r9+8*rax+0x10]
+ ; gcrRegs -[rax r8]
+ mov r13d, ebp
+ mov r12d, dword ptr [rbx+0x08]
+ cmp r13d, r12d
+ jae G_M58112_IG31
+ mov r10d, r13d
+ mov qword ptr [rsp+0x20], r10
+ mov rax, gword ptr [rbx+8*r10+0x10]
+ ; gcrRegs +[rax]
+ mov rcx, rax
+ ; gcrRegs +[rcx]
+ cmp r13d, dword ptr [rcx+0x08]
+ jae G_M58112_IG31
+ vmovsd xmm0, qword ptr [rcx+8*r10+0x10]
vandps xmm0, xmm0, xmmword ptr [reloc @RWD00]
- lea ecx, [r12+0x01]
+ lea ecx, [r13+0x01]
+ ; gcrRegs -[rcx]
cmp ecx, r14d
jl G_M58112_IG13
- ;; size=58 bbWeight=0.00 PerfScore 0.00
-G_M58112_IG05: ; bbWeight=0.12, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[r9]
- mov dword ptr [rsi+4*rax+0x10], r12d
- cmp r12d, r13d
- jae G_M58112_IG48
- mov ecx, r12d
+ ;; size=70 bbWeight=0.00 PerfScore 0.00
+G_M58112_IG05: ; bbWeight=0.13, gcrefRegs=0049 {rax rbx rsi}, byrefRegs=0000 {}, byref, isz
+ cmp ebp, dword ptr [rsi+0x08]
+ jae G_M58112_IG31
+ mov dword ptr [rsi+4*r10+0x10], r13d
+ cmp r13d, r12d
+ jae G_M58112_IG31
+ mov ecx, r13d
mov rdx, gword ptr [rbx+8*rcx+0x10]
; gcrRegs +[rdx]
mov rcx, rdx
; gcrRegs +[rcx]
cmp ebp, dword ptr [rcx+0x08]
- jae G_M58112_IG48
- vmovsd xmm0, qword ptr [rcx+8*rax+0x10]
+ jae G_M58112_IG31
+ vmovsd xmm0, qword ptr [rcx+8*r10+0x10]
vxorps xmm1, xmm1, xmm1
vucomisd xmm0, xmm1
jp SHORT G_M58112_IG06
- je G_M58112_IG52
- ;; size=56 bbWeight=0.12 PerfScore 2.12
-G_M58112_IG06: ; bbWeight=0.12, gcrefRegs=014C {rdx rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+ je G_M58112_IG34
+ ;; size=66 bbWeight=0.13 PerfScore 2.65
+G_M58112_IG06: ; bbWeight=0.13, gcrefRegs=004D {rax rdx rbx rsi}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rcx]
- cmp r12d, ebp
+ cmp r13d, ebp
je SHORT G_M58112_IG08
- ;; size=5 bbWeight=0.12 PerfScore 0.16
-G_M58112_IG07: ; bbWeight=0.12, gcrefRegs=014C {rdx rbx rsi r8}, byrefRegs=0000 {}, byref
- mov gword ptr [rsp+0x100], r8
+ ;; size=5 bbWeight=0.13 PerfScore 0.16
+G_M58112_IG07: ; bbWeight=0.13, gcrefRegs=004D {rax rdx rbx rsi}, byrefRegs=0000 {}, byref
+ mov gword ptr [rsp+0xE0], rax
; GC ptr vars +{V10}
- lea rcx, bword ptr [rbx+8*rax+0x10]
+ lea rcx, bword ptr [rbx+8*r10+0x10]
; byrRegs +[rcx]
call CORINFO_HELP_ASSIGN_REF
- ; gcrRegs -[rdx r8]
+ ; gcrRegs -[rax rdx]
; byrRegs -[rcx]
- movsxd rdx, r12d
+ movsxd rdx, r13d
mov rcx, rbx
; gcrRegs +[rcx]
- mov r8, gword ptr [rsp+0x100]
+ mov r8, gword ptr [rsp+0xE0]
; gcrRegs +[r8]
; GC ptr vars -{V10}
call CORINFO_HELP_ARRADDR_ST
; gcrRegs -[rcx r8]
; gcr arg pop 0
- mov rax, qword ptr [rsp+0x28]
- ;; size=42 bbWeight=0.12 PerfScore 0.81
-G_M58112_IG08: ; bbWeight=0.12, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref
- lea ecx, [r14-0x01]
- cmp ebp, ecx
+ mov r10, qword ptr [rsp+0x20]
+ ;; size=42 bbWeight=0.13 PerfScore 0.82
+G_M58112_IG08: ; bbWeight=0.13, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref
+ lea eax, [r14-0x01]
+ cmp ebp, eax
jge G_M58112_IG22
- ;; size=12 bbWeight=0.12 PerfScore 0.22
-G_M58112_IG09: ; bbWeight=0.12, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref
- mov r8, gword ptr [rbx+8*rax+0x10]
- ; gcrRegs +[r8]
- cmp ebp, dword ptr [r8+0x08]
- jae G_M58112_IG48
+ ;; size=12 bbWeight=0.13 PerfScore 0.22
+G_M58112_IG09: ; bbWeight=0.13, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref
+ mov rax, gword ptr [rbx+8*r10+0x10]
+ ; gcrRegs +[rax]
+ cmp ebp, dword ptr [rax+0x08]
...
-198 (-29.25%) : 54237.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -11,61 +11,59 @@
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 8, 4.92) ref -> rcx class-hnd single-def <double[][]>
-; V01 arg1 [V01,T10] ( 6, 2 ) ref -> rdx class-hnd single-def <double[]>
-; V02 arg2 [V02,T08] ( 9, 2 ) ref -> rbx class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T09] ( 9, 2 ) ref -> rsi class-hnd single-def <double[][]>
-; V04 arg4 [V04,T19] ( 6, 0 ) int -> [rsp+0x140] single-def tier0-frame
-; V05 loc0 [V05,T13] ( 6, 1.95) ref -> r8 class-hnd <double[][]>
-; V06 loc1 [V06,T18] ( 6, 0 ) ref -> r9 class-hnd <double[]>
-; V07 loc2 [V07,T24] ( 2, 0 ) long -> r14
+; V01 arg1 [V01,T10] ( 4, 2 ) ref -> rdx class-hnd single-def <double[]>
+; V02 arg2 [V02,T08] ( 6, 2 ) ref -> rbx class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T09] ( 6, 2 ) ref -> rsi class-hnd single-def <double[][]>
+; V04 arg4 [V04,T21] ( 2, 0 ) int -> [rsp+0x130] single-def tier0-frame
+; V05 loc0 [V05,T13] ( 5, 1.95) ref -> r8 class-hnd <double[][]>
+; V06 loc1 [V06,T18] ( 3, 0 ) ref -> r9 class-hnd <double[]>
+; V07 loc2 [V07,T22] ( 2, 0 ) long -> r14
; V08 loc3 [V08,T01] ( 14,499.03) int -> rax
-; V09 loc4 [V09,T17] ( 11, 0 ) int -> r10
-; V10 loc5 [V10,T07] ( 35, 5.84) int -> rdi
+; V09 loc4 [V09,T17] ( 6, 0 ) int -> r10
+; V10 loc5 [V10,T07] ( 26, 5.84) int -> rdi
; V11 OutArgs [V11 ] ( 1, 1 ) struct (32) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T20] ( 4, 0 ) double -> mm6 "Strict ordering of exceptions for Array store"
+; V12 tmp1 [V12,T23] ( 2, 0 ) double -> mm0 "Strict ordering of exceptions for Array store"
; V13 tmp2 [V13,T00] ( 6,594.16) ref -> r11 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T16] ( 4,396.11) double -> mm0 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
; V16 tmp5 [V16,T02] ( 5,398.09) ref -> r13 "arr expr"
-; V17 tmp6 [V17,T23] ( 2, 0 ) ref -> rcx "argument with side effect"
+; V17 tmp6 [V17,T20] ( 2, 0 ) ref -> rcx "argument with side effect"
; V18 cse0 [V18,T05] ( 4,100.00) ref -> r15 hoist multi-def "CSE - aggressive"
; V19 cse1 [V19,T15] ( 2, 1.00) ref -> rbp hoist "CSE - moderate"
; V20 cse2 [V20,T04] ( 6,100.95) ref -> rbp multi-def "CSE - aggressive"
-; V21 cse3 [V21,T21] ( 3, 0 ) long -> r9 "CSE - conservative"
-; V22 cse4 [V22,T22] ( 3, 0 ) long -> r9 "CSE - conservative"
-; V23 cse5 [V23,T14] ( 4, 1.95) int -> r14 hoist multi-def "CSE - aggressive"
-; V24 cse6 [V24,T12] ( 6, 2.92) long -> r11 hoist multi-def "CSE - aggressive"
-; V25 cse7 [V25,T03] ( 3,294.11) long -> r14 "CSE - aggressive"
-; V26 cse8 [V26,T11] ( 3, 2.97) long -> r14 "CSE - aggressive"
+; V21 cse3 [V21,T19] ( 3, 0 ) long -> r9 "CSE - conservative"
+; V22 cse4 [V22,T14] ( 4, 1.95) int -> r14 hoist multi-def "CSE - aggressive"
+; V23 cse5 [V23,T12] ( 6, 2.92) long -> r11 hoist multi-def "CSE - aggressive"
+; V24 cse6 [V24,T03] ( 3,294.11) long -> r14 "CSE - aggressive"
+; V25 cse7 [V25,T11] ( 3, 2.97) long -> r14 "CSE - aggressive"
;
-; Lcl frame size = 48
+; Lcl frame size = 32
G_M9806_IG01: ; bbWeight=0.97, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- sub rsp, 104
- mov qword ptr [rsp+0x108], r15
- mov qword ptr [rsp+0x100], r14
- mov qword ptr [rsp+0xF8], r13
- mov qword ptr [rsp+0xF0], rdi
- mov qword ptr [rsp+0xE8], rsi
- mov qword ptr [rsp+0xE0], rbx
+ sub rsp, 88
+ mov qword ptr [rsp+0xF8], r15
+ mov qword ptr [rsp+0xF0], r14
+ mov qword ptr [rsp+0xE8], r13
+ mov qword ptr [rsp+0xE0], rdi
+ mov qword ptr [rsp+0xD8], rsi
+ mov qword ptr [rsp+0xD0], rbx
vzeroupper
- vmovaps xmmword ptr [rsp+0x20], xmm6
- mov rcx, gword ptr [rsp+0x120]
+ mov rcx, gword ptr [rsp+0x110]
; gcrRegs +[rcx]
- mov rdx, gword ptr [rsp+0x128]
+ mov rdx, gword ptr [rsp+0x118]
; gcrRegs +[rdx]
- mov rbx, gword ptr [rsp+0x130]
+ mov rbx, gword ptr [rsp+0x120]
; gcrRegs +[rbx]
- mov rsi, gword ptr [rsp+0x138]
+ mov rsi, gword ptr [rsp+0x128]
; gcrRegs +[rsi]
- mov r8, gword ptr [rsp+0xD0]
+ mov r8, gword ptr [rsp+0xC0]
; gcrRegs +[r8]
- mov r9, gword ptr [rsp+0xC8]
+ mov r9, gword ptr [rsp+0xB8]
; gcrRegs +[r9]
- mov eax, dword ptr [rsp+0xBC]
- mov r10d, dword ptr [rsp+0xB8]
- mov edi, dword ptr [rsp+0xB4]
- ;; size=131 bbWeight=0.97 PerfScore 26.53
+ mov eax, dword ptr [rsp+0xAC]
+ mov r10d, dword ptr [rsp+0xA8]
+ mov edi, dword ptr [rsp+0xA4]
+ ;; size=125 bbWeight=0.97 PerfScore 24.58
G_M9806_IG02: ; bbWeight=0.97, gcrefRegs=034E {rcx rdx rbx rsi r8 r9}, byrefRegs=0000 {}, byref, isz
cmp eax, 101
jge SHORT G_M9806_IG06
@@ -106,12 +104,12 @@ G_M9806_IG05: ; bbWeight=98.04, gcrefRegs=836E {rcx rdx rbx rbp rsi r8 r9
cmp eax, 101
jl SHORT G_M9806_IG05
;; size=36 bbWeight=98.04 PerfScore 1200.94
-G_M9806_IG06: ; bbWeight=0.97, gcrefRegs=034E {rcx rdx rbx rsi r8 r9}, byrefRegs=0000 {}, byref
+G_M9806_IG06: ; bbWeight=0.97, gcrefRegs=034E {rcx rdx rbx rsi r8 r9}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rbp r11 r13 r15]
inc edi
cmp edi, 101
- jge G_M9806_IG19
- ;; size=11 bbWeight=0.97 PerfScore 1.46
+ jge SHORT G_M9806_IG13
+ ;; size=7 bbWeight=0.97 PerfScore 1.46
G_M9806_IG07: ; bbWeight=0.97, gcrefRegs=034E {rcx rdx rbx rsi r8 r9}, byrefRegs=0000 {}, byref, isz
xor eax, eax
jmp SHORT G_M9806_IG02
@@ -156,39 +154,6 @@ G_M9806_IG11: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
;; size=5 bbWeight=0 PerfScore 0.00
G_M9806_IG12: ; bbWeight=0, gcrefRegs=004E {rcx rdx rbx rsi}, byrefRegs=0000 {}, byref, isz
; gcrRegs +[rcx rdx rbx rsi]
- mov r9d, r10d
- mov r8, gword ptr [rbx+8*r9+0x10]
- ; gcrRegs +[r8]
- mov r9, gword ptr [rsi+8*r9+0x10]
- ; gcrRegs +[r9]
- xor edi, edi
- mov dword ptr [rsp+0x140], ebp
- jmp SHORT G_M9806_IG07
- ;; size=24 bbWeight=0 PerfScore 0.00
-G_M9806_IG13: ; bbWeight=0, gcrefRegs=024E {rcx rdx rbx rsi r9}, byrefRegs=0000 {}, byref
- ; gcrRegs -[r8]
- xor edi, edi
- ;; size=2 bbWeight=0 PerfScore 0.00
-G_M9806_IG14: ; bbWeight=0, gcrefRegs=024E {rcx rdx rbx rsi r9}, byrefRegs=0000 {}, byref, isz
- cmp edi, dword ptr [rdx+0x08]
- jae SHORT G_M9806_IG11
- mov r8d, edi
- vmovsd xmm6, qword ptr [rdx+8*r8+0x10]
- cmp edi, dword ptr [r9+0x08]
- jae SHORT G_M9806_IG11
- mov r8d, edi
- vmovsd qword ptr [r9+8*r8+0x10], xmm6
- inc edi
- cmp edi, 101
- jl SHORT G_M9806_IG14
- inc r10d
- mov ebp, dword ptr [rsp+0x140]
- cmp r10d, ebp
- jl SHORT G_M9806_IG12
- jmp SHORT G_M9806_IG18
- ;; size=55 bbWeight=0 PerfScore 0.00
-G_M9806_IG15: ; bbWeight=0, gcrefRegs=004E {rcx rdx rbx rsi}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[r9]
cmp r10d, dword ptr [rbx+0x08]
jae SHORT G_M9806_IG11
mov r9d, r10d
@@ -199,68 +164,44 @@ G_M9806_IG15: ; bbWeight=0, gcrefRegs=004E {rcx rdx rbx rsi}, byrefRegs=0
mov r9, gword ptr [rsi+8*r9+0x10]
; gcrRegs +[r9]
xor edi, edi
- mov dword ptr [rsp+0x140], ebp
- jmp G_M9806_IG07
- ;; size=39 bbWeight=0 PerfScore 0.00
-G_M9806_IG16: ; bbWeight=0, gcrefRegs=024E {rcx rdx rbx rsi r9}, byrefRegs=0000 {}, byref
+ mov dword ptr [rsp+0x130], ebp
+ jmp SHORT G_M9806_IG07
+ ;; size=36 bbWeight=0 PerfScore 0.00
+G_M9806_IG13: ; bbWeight=0, gcrefRegs=024E {rcx rdx rbx rsi r9}, byrefRegs=0000 {}, byref
; gcrRegs -[r8]
xor edi, edi
;; size=2 bbWeight=0 PerfScore 0.00
-G_M9806_IG17: ; bbWeight=0, gcrefRegs=024E {rcx rdx rbx rsi r9}, byrefRegs=0000 {}, byref, isz
+G_M9806_IG14: ; bbWeight=0, gcrefRegs=024E {rcx rdx rbx rsi r9}, byrefRegs=0000 {}, byref, isz
cmp edi, dword ptr [rdx+0x08]
- jae G_M9806_IG11
+ jae SHORT G_M9806_IG11
mov r8d, edi
- vmovsd xmm6, qword ptr [rdx+8*r8+0x10]
+ vmovsd xmm0, qword ptr [rdx+8*r8+0x10]
cmp edi, dword ptr [r9+0x08]
- jae G_M9806_IG11
+ jae SHORT G_M9806_IG11
mov eax, edi
- vmovsd qword ptr [r9+8*rax+0x10], xmm6
+ vmovsd qword ptr [r9+8*rax+0x10], xmm0
inc edi
cmp edi, 101
- jl SHORT G_M9806_IG17
+ jl SHORT G_M9806_IG14
inc r10d
- mov ebp, dword ptr [rsp+0x140]
+ mov ebp, dword ptr [rsp+0x130]
cmp r10d, ebp
- jl SHORT G_M9806_IG15
- ;; size=60 bbWeight=0 PerfScore 0.00
-G_M9806_IG18: ; bbWeight=0, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref
- ; gcrRegs -[rcx rdx r9]
+ jl SHORT G_M9806_IG12
call <unknown method>
+ ; gcrRegs -[rcx rdx r9]
; gcr arg pop 0
movsxd r14, eax
xor edi, edi
- jmp G_M9806_IG21
- ;; size=15 bbWeight=0 PerfScore 0.00
-G_M9806_IG19: ; bbWeight=0, gcrefRegs=024E {rcx rdx rbx rsi r9}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[rcx rdx r9]
- test rbx, rbx
- je SHORT G_M9806_IG16
- test rsi, rsi
- je SHORT G_M9806_IG16
- mov ebp, dword ptr [rsp+0x140]
- mov r8d, r10d
- or r8d, ebp
- mov dword ptr [rsp+0x140], ebp
- jl SHORT G_M9806_IG16
- mov ebp, dword ptr [rsp+0x140]
- cmp dword ptr [rbx+0x08], ebp
- mov dword ptr [rsp+0x140], ebp
- jl SHORT G_M9806_IG16
- mov ebp, dword ptr [rsp+0x140]
- cmp dword ptr [rsi+0x08], ebp
- mov dword ptr [rsp+0x140], ebp
- jl G_M9806_IG16
- jmp G_M9806_IG13
- ;; size=79 bbWeight=0 PerfScore 0.00
-G_M9806_IG20: ; bbWeight=0, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref
- ; gcrRegs -[rcx rdx r9]
+ jmp SHORT G_M9806_IG16
+ ;; size=64 bbWeight=0 PerfScore 0.00
+G_M9806_IG15: ; bbWeight=0, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref, isz
cmp edi, dword ptr [rbx+0x08]
- jae G_M9806_IG11
+ jae SHORT G_M9806_IG11
mov ecx, edi
mov rcx, gword ptr [rbx+8*rcx+0x10]
; gcrRegs +[rcx]
cmp edi, dword ptr [rsi+0x08]
- jae G_M9806_IG11
+ jae SHORT G_M9806_IG11
mov r8d, edi
mov r8, gword ptr [rsi+8*r8+0x10]
; gcrRegs +[r8]
@@ -269,19 +210,18 @@ G_M9806_IG20: ; bbWeight=0, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {},
; gcrRegs -[rcx r8]
; gcr arg pop 0
inc edi
- ;; size=46 bbWeight=0 PerfScore 0.00
-G_M9806_IG21: ; bbWeight=0, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref, isz
+ ;; size=38 bbWeight=0 PerfScore 0.00
+G_M9806_IG16: ; bbWeight=0, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref, isz
cmp edi, ebp
- jl SHORT G_M9806_IG20
+ jl SHORT G_M9806_IG15
...
-64 (-7.48%) : 79452.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -10,16 +10,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 3 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T13] ( 15, 105.26) ref -> rcx class-hnd single-def <float[][]>
+; V00 arg0 [V00,T13] ( 12, 105.05) ref -> rcx class-hnd single-def <float[][]>
; V01 arg1 [V01,T14] ( 11, 105.04) ref -> rdx class-hnd single-def <int[][]>
; V02 arg2 [V02,T22] ( 3, 3 ) ref -> r8 class-hnd single-def <double[]>
; V03 arg3 [V03,T23] ( 4, 2.21) ref -> r9 class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T25] ( 3, 0.62) int -> [rsp+0x140] single-def tier0-frame
+; V04 arg4 [V04,T25] ( 2, 0.62) int -> [rsp+0x140] single-def tier0-frame
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T05] ( 25,1699.53) int -> rax
-; V08 loc3 [V08,T16] ( 6, 100.21) ref -> rbx class-hnd <float[]>
-; V09 loc4 [V09,T12] ( 13, 208.12) int -> r11
+; V07 loc2 [V07,T05] ( 20,1699.53) int -> rax
+; V08 loc3 [V08,T16] ( 5, 100.21) ref -> rbx class-hnd <float[]>
+; V09 loc4 [V09,T12] ( 12, 208.12) int -> r11
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T07] ( 21,1201.15) int -> r10
; V12 loc7 [V12,T28] ( 4, 199.58) float -> mm0
@@ -42,7 +42,7 @@
; V29 tmp14 [V29,T21] ( 6, 8.48) ref -> registers "arr expr"
; V30 cse0 [V30,T09] ( 6, 499.16) ref -> r14 hoist multi-def "CSE - aggressive"
; V31 cse1 [V31,T10] ( 16, 404.82) int -> r12 multi-def "CSE - aggressive"
-; V32 cse2 [V32,T15] ( 9, 101.83) int -> r8 hoist "CSE - moderate"
+; V32 cse2 [V32,T15] ( 7, 101.63) int -> r8 hoist "CSE - moderate"
; V33 cse3 [V33,T17] ( 4, 100.00) int -> rdi hoist multi-def "CSE - moderate"
; V34 cse4 [V34,T11] ( 5, 299.18) long -> r13 "CSE - aggressive"
; V35 cse5 [V35,T18] ( 4, 100.00) long -> rbp hoist multi-def "CSE - moderate"
@@ -79,19 +79,19 @@ G_M56974_IG02: ; bbWeight=1, gcrefRegs=030E {rcx rdx rbx r8 r9}, byrefReg
;; size=4 bbWeight=1 PerfScore 2.00
G_M56974_IG03: ; bbWeight=0.21, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref
cmp r8d, r10d
- jle G_M56974_IG15
+ jle G_M56974_IG12
;; size=9 bbWeight=0.21 PerfScore 0.26
G_M56974_IG04: ; bbWeight=0.21, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref
test rdx, rdx
- je G_M56974_IG25
+ je G_M56974_IG22
test rcx, rcx
- je G_M56974_IG25
+ je G_M56974_IG22
test r10d, r10d
- jl G_M56974_IG25
+ jl G_M56974_IG22
cmp dword ptr [rdx+0x08], r8d
- jl G_M56974_IG25
+ jl G_M56974_IG22
cmp dword ptr [rcx+0x08], r8d
- jl G_M56974_IG25
+ jl G_M56974_IG22
mov edi, dword ptr [rbx+0x08]
mov ebp, r11d
mov r14, gword ptr [r9+0x08]
@@ -99,21 +99,23 @@ G_M56974_IG04: ; bbWeight=0.21, gcrefRegs=020E {rcx rdx rbx r9}, byrefReg
;; size=57 bbWeight=0.21 PerfScore 3.33
G_M56974_IG05: ; bbWeight=98.79, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref, isz
cmp r11d, edi
- jae G_M56974_IG36
+ jae G_M56974_IG33
vmovss xmm0, dword ptr [rbx+4*rbp+0x10]
cmp dword ptr [r14+0x08], eax
jle SHORT G_M56974_IG07
;; size=21 bbWeight=98.79 PerfScore 913.84
-G_M56974_IG06: ; bbWeight=395.17, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref
+G_M56974_IG06: ; bbWeight=395.17, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref, isz
cmp eax, r10d
- jne G_M56974_IG18
- ;; size=9 bbWeight=395.17 PerfScore 493.97
+ jne SHORT G_M56974_IG15
+ ;; size=5 bbWeight=395.17 PerfScore 493.97
G_M56974_IG07: ; bbWeight=395.17, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref
vxorps xmm1, xmm1, xmm1
- jmp G_M56974_IG19
+ jmp G_M56974_IG16
;; size=9 bbWeight=395.17 PerfScore 922.07
G_M56974_IG08: ; bbWeight=0.21, gcrefRegs=0206 {rcx rdx r9}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rbx r14]
+ cmp eax, dword ptr [rcx+0x08]
+ jae G_M56974_IG33
mov r11d, eax
mov rbx, gword ptr [rcx+8*r11+0x10]
; gcrRegs +[rbx]
@@ -121,76 +123,50 @@ G_M56974_IG08: ; bbWeight=0.21, gcrefRegs=0206 {rcx rdx r9}, byrefRegs=00
mov esi, dword ptr [rsp+0x140]
test esi, esi
mov dword ptr [rsp+0x140], esi
- jg SHORT G_M56974_IG11
- ;; size=29 bbWeight=0.21 PerfScore 1.19
+ jg SHORT G_M56974_IG10
+ ;; size=38 bbWeight=0.21 PerfScore 2.04
G_M56974_IG09: ; bbWeight=0.21, gcrefRegs=0206 {rcx rdx r9}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rbx]
inc eax
cmp r8d, eax
- jle G_M56974_IG37
+ jle G_M56974_IG34
jmp SHORT G_M56974_IG08
- ;; size=13 bbWeight=0.21 PerfScore 0.72
-G_M56974_IG10: ; bbWeight=0.00, gcrefRegs=0206 {rcx rdx r9}, byrefRegs=0000 {}, byref, isz
- cmp eax, dword ptr [rcx+0x08]
- jae G_M56974_IG36
- mov r11d, eax
- mov rbx, gword ptr [rcx+8*r11+0x10]
+ ;; size=13 bbWeight=0.21 PerfScore 0.73
+G_M56974_IG10: ; bbWeight=0.21, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref, isz
; gcrRegs +[rbx]
- xor r11d, r11d
- mov esi, dword ptr [rsp+0x140]
- test esi, esi
- mov dword ptr [rsp+0x140], esi
- jle SHORT G_M56974_IG14
- ;; size=38 bbWeight=0.00 PerfScore 0.02
-G_M56974_IG11: ; bbWeight=0.21, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref, isz
cmp eax, dword ptr [rdx+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
mov r10d, eax
mov r10, gword ptr [rdx+8*r10+0x10]
; gcrRegs +[r10]
test r11d, r11d
- jl SHORT G_M56974_IG15
+ jl SHORT G_M56974_IG12
;; size=22 bbWeight=0.21 PerfScore 1.57
-G_M56974_IG12: ; bbWeight=6.69, gcrefRegs=060E {rcx rdx rbx r9 r10}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG11: ; bbWeight=6.69, gcrefRegs=060E {rcx rdx rbx r9 r10}, byrefRegs=0000 {}, byref, isz
cmp dword ptr [r10+0x08], r11d
- jle SHORT G_M56974_IG15
+ jg SHORT G_M56974_IG14
;; size=6 bbWeight=6.69 PerfScore 26.76
-G_M56974_IG13: ; bbWeight=0.21, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref
+G_M56974_IG12: ; bbWeight=0.41, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r10]
+ inc r11d
+ cmp r11d, dword ptr [rsp+0x140]
+ jl SHORT G_M56974_IG10
+ ;; size=13 bbWeight=0.41 PerfScore 1.33
+G_M56974_IG13: ; bbWeight=0.21, gcrefRegs=0206 {rcx rdx r9}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs -[rbx]
+ jmp SHORT G_M56974_IG09
+ ;; size=2 bbWeight=0.21 PerfScore 0.42
+G_M56974_IG14: ; bbWeight=0.21, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref
+ ; gcrRegs +[rbx]
lea r10d, [rax+0x01]
jmp G_M56974_IG03
;; size=9 bbWeight=0.21 PerfScore 0.52
-G_M56974_IG14: ; bbWeight=0.00, gcrefRegs=0206 {rcx rdx r9}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rbx]
- inc eax
- cmp r8d, eax
- jle G_M56974_IG37
- jmp SHORT G_M56974_IG10
- ;; size=13 bbWeight=0.00 PerfScore 0.01
-G_M56974_IG15: ; bbWeight=0.41, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[rbx]
- inc r11d
- cmp r11d, dword ptr [rsp+0x140]
- jl SHORT G_M56974_IG11
- ;; size=13 bbWeight=0.41 PerfScore 1.33
-G_M56974_IG16: ; bbWeight=0.21, gcrefRegs=0206 {rcx rdx r9}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rbx]
- test rcx, rcx
- je SHORT G_M56974_IG14
- test eax, eax
- jl SHORT G_M56974_IG14
- cmp dword ptr [rcx+0x08], r8d
- jl SHORT G_M56974_IG14
- ;; size=15 bbWeight=0.21 PerfScore 1.36
-G_M56974_IG17: ; bbWeight=0.64, gcrefRegs=0206 {rcx rdx r9}, byrefRegs=0000 {}, byref
- jmp G_M56974_IG09
- ;; size=5 bbWeight=0.64 PerfScore 1.27
-G_M56974_IG18: ; bbWeight=395.17, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref
- ; gcrRegs +[rbx r14]
+G_M56974_IG15: ; bbWeight=395.17, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref
+ ; gcrRegs +[r14]
mov r15, r14
; gcrRegs +[r15]
cmp eax, dword ptr [r15+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
mov r13d, eax
mov r13, gword ptr [r15+8*r13+0x10]
; gcrRegs +[r13]
@@ -198,12 +174,12 @@ G_M56974_IG18: ; bbWeight=395.17, gcrefRegs=420E {rcx rdx rbx r9 r14}, by
sub r12d, eax
dec r12d
cmp r12d, dword ptr [r13+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
mov r15d, r12d
; gcrRegs -[r15]
vcvtss2sd xmm1, xmm1, dword ptr [r13+4*r15+0x10]
;; size=50 bbWeight=395.17 PerfScore 7310.68
-G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG16: ; bbWeight=98.79, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r13]
vcvtss2sd xmm0, xmm0, xmm0
vaddsd xmm0, xmm0, xmm1
@@ -213,77 +189,77 @@ G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=420E {rcx rdx rbx r9 r14}, byr
lea r12d, [r11+0x01]
mov esi, r12d
test esi, esi
- jl SHORT G_M56974_IG24
+ jl SHORT G_M56974_IG21
;; size=27 bbWeight=98.79 PerfScore 1111.42
-G_M56974_IG20: ; bbWeight=3161.38, gcrefRegs=C20E {rcx rdx rbx r9 r14 r15}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG17: ; bbWeight=3161.38, gcrefRegs=C20E {rcx rdx rbx r9 r14 r15}, byrefRegs=0000 {}, byref, isz
cmp dword ptr [r15+0x08], esi
- jle SHORT G_M56974_IG24
+ jle SHORT G_M56974_IG21
;; size=6 bbWeight=3161.38 PerfScore 12645.51
-G_M56974_IG21: ; bbWeight=98.79, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG18: ; bbWeight=98.79, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r15]
mov rsi, gword ptr [rcx+8*r13+0x10]
; gcrRegs +[rsi]
cmp r12d, dword ptr [rsi+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
mov r15d, r12d
vcvtss2sd xmm1, xmm1, dword ptr [rsi+4*r15+0x10]
vucomisd xmm1, xmm0
- ja SHORT G_M56974_IG24
+ ja SHORT G_M56974_IG21
;; size=31 bbWeight=98.79 PerfScore 1605.39
-G_M56974_IG22: ; bbWeight=98.79, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref
+G_M56974_IG19: ; bbWeight=98.79, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref
; gcrRegs -[rsi]
inc r10d
cmp r8d, r10d
jg G_M56974_IG05
;; size=12 bbWeight=98.79 PerfScore 148.19
-G_M56974_IG23: ; bbWeight=0.21, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref
+G_M56974_IG20: ; bbWeight=0.21, gcrefRegs=020E {rcx rdx rbx r9}, byrefRegs=0000 {}, byref
; gcrRegs -[r14]
- jmp G_M56974_IG15
+ jmp G_M56974_IG12
;; size=5 bbWeight=0.21 PerfScore 0.42
-G_M56974_IG24: ; bbWeight=1.40, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG21: ; bbWeight=1.40, gcrefRegs=420E {rcx rdx rbx r9 r14}, byrefRegs=0000 {}, byref, isz
; gcrRegs +[r14]
mov r15, gword ptr [rcx+8*r13+0x10]
; gcrRegs +[r15]
cmp r12d, dword ptr [r15+0x08]
- jae G_M56974_IG36
+ jae G_M56974_IG33
mov esi, r12d
...
+347 (+31.12%) : 50597.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
@@ -9,21 +9,21 @@
; with Dynamic PGO: edge weights are invalid, and fgCalledCount is 91.22
; Final local variable assignments
;
-; V00 arg0 [V00,T11] ( 17, 7.87) ref -> rcx class-hnd single-def <int[][]>
-; V01 arg1 [V01,T08] ( 17,104.27) ref -> rdx class-hnd single-def <int[][]>
-; V02 arg2 [V02,T12] ( 12, 4.62) ref -> r8 class-hnd single-def <int[][]>
+; V00 arg0 [V00,T11] ( 23, 9.97) ref -> rcx class-hnd single-def <int[][]>
+; V01 arg1 [V01,T08] ( 24,105.67) ref -> rdx class-hnd single-def <int[][]>
+; V02 arg2 [V02,T13] ( 18, 6.03) ref -> r8 class-hnd single-def <int[][]>
;* V03 loc0 [V03 ] ( 0, 0 ) int -> zero-ref
-; V04 loc1 [V04,T13] ( 49, 4.97) int -> r9
-; V05 loc2 [V05,T06] ( 50,202.65) int -> r10
-; V06 loc3 [V06,T03] ( 52,400.64) int -> rax
+; V04 loc1 [V04,T12] ( 61, 9.18) int -> r9
+; V05 loc2 [V05,T06] ( 59,208.96) int -> r10
+; V06 loc3 [V06,T03] ( 63,406.25) int -> rax
; V07 OutArgs [V07 ] ( 1, 1 ) struct (32) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V08 tmp1 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd "Strict ordering of exceptions for Array store" <int[]>
;* V09 tmp2 [V09 ] ( 0, 0 ) int -> zero-ref "Strict ordering of exceptions for Array store"
-; V10 tmp3 [V10,T17] ( 3, 0 ) byref -> r11 "dup spill"
-; V11 tmp4 [V11,T18] ( 3, 0 ) byref -> r11 "dup spill"
-; V12 tmp5 [V12,T19] ( 3, 0 ) byref -> r11 "dup spill"
-; V13 tmp6 [V13,T20] ( 3, 0 ) byref -> r11 "dup spill"
-; V14 tmp7 [V14,T21] ( 3, 0 ) byref -> r11 "dup spill"
+; V10 tmp3 [V10,T15] ( 6, 4.21) byref -> rbx "dup spill"
+; V11 tmp4 [V11,T16] ( 6, 4.21) byref -> rbx "dup spill"
+; V12 tmp5 [V12,T25] ( 3, 0 ) byref -> r11 "dup spill"
+; V13 tmp6 [V13,T26] ( 3, 0 ) byref -> r11 "dup spill"
+; V14 tmp7 [V14,T27] ( 3, 0 ) byref -> r11 "dup spill"
; V15 tmp8 [V15,T00] ( 6,592.11) byref -> r14 "dup spill"
;* V16 tmp9 [V16 ] ( 0, 0 ) ref -> zero-ref "arr expr"
;* V17 tmp10 [V17 ] ( 0, 0 ) ref -> zero-ref "arr expr"
@@ -32,12 +32,12 @@
; V20 tmp13 [V20,T01] ( 6,592.11) ref -> registers "arr expr"
; V21 tmp14 [V21,T04] ( 5,396.71) ref -> r15 "arr expr"
; V22 tmp15 [V22,T02] ( 6,592.11) ref -> registers "arr expr"
-; V23 tmp16 [V23,T22] ( 3, 0 ) ref -> r11 "arr expr"
-; V24 tmp17 [V24,T23] ( 3, 0 ) ref -> rdi "arr expr"
-; V25 tmp18 [V25,T24] ( 3, 0 ) ref -> rbp "arr expr"
-; V26 tmp19 [V26,T25] ( 3, 0 ) ref -> r11 "arr expr"
-; V27 tmp20 [V27,T26] ( 3, 0 ) ref -> rdi "arr expr"
-; V28 tmp21 [V28,T27] ( 3, 0 ) ref -> rbp "arr expr"
+; V23 tmp16 [V23,T22] ( 5, 2.81) ref -> r11 "arr expr"
+; V24 tmp17 [V24,T17] ( 6, 4.21) ref -> rdi "arr expr"
+; V25 tmp18 [V25,T23] ( 5, 2.81) ref -> rbp "arr expr"
+; V26 tmp19 [V26,T18] ( 6, 4.21) ref -> r11 "arr expr"
+; V27 tmp20 [V27,T24] ( 5, 2.81) ref -> rdi "arr expr"
+; V28 tmp21 [V28,T19] ( 6, 4.21) ref -> rbp "arr expr"
; V29 tmp22 [V29,T28] ( 3, 0 ) ref -> r11 "arr expr"
; V30 tmp23 [V30,T29] ( 3, 0 ) ref -> rdi "arr expr"
; V31 tmp24 [V31,T30] ( 3, 0 ) ref -> rbp "arr expr"
@@ -49,11 +49,11 @@
; V37 tmp30 [V37,T36] ( 3, 0 ) ref -> rbp "arr expr"
; V38 cse0 [V38,T10] ( 4,100.00) ref -> rdi hoist multi-def "CSE - aggressive"
; V39 cse1 [V39,T09] ( 6,103.57) ref -> rbx multi-def "CSE - aggressive"
-; V40 cse2 [V40,T16] ( 10, 2.62) int -> rsi hoist multi-def "CSE - aggressive"
+; V40 cse2 [V40,T20] ( 13, 3.32) int -> rsi hoist multi-def "CSE - aggressive"
; V41 cse3 [V41,T14] ( 6, 4.91) long -> r11 hoist multi-def "CSE - aggressive"
; V42 cse4 [V42,T07] ( 6,198.68) long -> rbp hoist multi-def "CSE - aggressive"
; V43 cse5 [V43,T05] ( 3,293.09) long -> rsi "CSE - aggressive"
-; V44 cse6 [V44,T15] ( 3, 2.96) long -> rbx "CSE - aggressive"
+; V44 cse6 [V44,T21] ( 3, 2.96) long -> rbx "CSE - aggressive"
;
; Lcl frame size = 40
@@ -74,48 +74,126 @@ G_M19657_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov r10d, dword ptr [rsp+0xCC]
mov eax, dword ptr [rsp+0xC8]
;; size=91 bbWeight=1 PerfScore 17.25
-G_M19657_IG02: ; bbWeight=1, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
- jmp SHORT G_M19657_IG04
- ;; size=2 bbWeight=1 PerfScore 2.00
-G_M19657_IG03: ; bbWeight=1.32, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+G_M19657_IG02: ; bbWeight=1, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+ jmp G_M19657_IG08
+ ;; size=5 bbWeight=1 PerfScore 2.00
+G_M19657_IG03: ; bbWeight=0.02, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+ xor r10d, r10d
+ jmp G_M19657_IG07
+ ;; size=8 bbWeight=0.02 PerfScore 0.05
+G_M19657_IG04: ; bbWeight=0.02, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+ inc r9d
+ cmp r9d, 75
+ jge G_M19657_IG29
+ jmp SHORT G_M19657_IG03
+ ;; size=15 bbWeight=0.02 PerfScore 0.08
+G_M19657_IG05: ; bbWeight=0.70, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+ mov r11d, r9d
+ mov r11, gword ptr [r8+8*r11+0x10]
+ ; gcrRegs +[r11]
+ mov ebx, r10d
+ lea rbx, bword ptr [r11+4*rbx+0x10]
+ ; byrRegs +[rbx]
+ mov r11d, dword ptr [rbx]
+ ; gcrRegs -[r11]
+ cmp r9d, dword ptr [rcx+0x08]
+ jae G_M19657_IG28
+ mov edi, r9d
+ mov rdi, gword ptr [rcx+8*rdi+0x10]
+ ; gcrRegs +[rdi]
+ cmp eax, dword ptr [rdi+0x08]
+ jae G_M19657_IG28
+ mov ebp, eax
+ mov edi, dword ptr [rdi+4*rbp+0x10]
+ ; gcrRegs -[rdi]
+ mov ebp, eax
+ mov rbp, gword ptr [rdx+8*rbp+0x10]
+ ; gcrRegs +[rbp]
+ mov r14d, r10d
+ imul edi, dword ptr [rbp+4*r14+0x10]
+ add r11d, edi
+ mov dword ptr [rbx], r11d
+ inc r10d
+ cmp r10d, 75
+ jge G_M19657_IG33
+ jmp SHORT G_M19657_IG05
+ ;; size=89 bbWeight=0.70 PerfScore 21.22
+G_M19657_IG06: ; bbWeight=0.70, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs -[rbp]
+ ; byrRegs -[rbx]
+ cmp r9d, esi
+ jae G_M19657_IG28
+ mov r11d, r9d
+ mov r11, gword ptr [r8+8*r11+0x10]
+ ; gcrRegs +[r11]
+ cmp r10d, dword ptr [r11+0x08]
+ jae G_M19657_IG28
+ mov ebx, r10d
+ lea rbx, bword ptr [r11+4*rbx+0x10]
+ ; byrRegs +[rbx]
+ mov r11d, dword ptr [rbx]
+ ; gcrRegs -[r11]
+ mov edi, r9d
+ mov rdi, gword ptr [rcx+8*rdi+0x10]
+ ; gcrRegs +[rdi]
+ mov ebp, eax
+ mov edi, dword ptr [rdi+4*rbp+0x10]
+ ; gcrRegs -[rdi]
+ mov ebp, eax
+ mov rbp, gword ptr [rdx+8*rbp+0x10]
+ ; gcrRegs +[rbp]
+ cmp r10d, dword ptr [rbp+0x08]
+ jae G_M19657_IG28
+ mov r14d, r10d
+ imul edi, dword ptr [rbp+4*r14+0x10]
+ add r11d, edi
+ mov dword ptr [rbx], r11d
+ inc eax
+ cmp eax, 75
+ jge G_M19657_IG37
+ jmp SHORT G_M19657_IG06
+ ;; size=97 bbWeight=0.70 PerfScore 22.10
+G_M19657_IG07: ; bbWeight=1.32, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+ ; gcrRegs -[rbp]
+ ; byrRegs -[rbx]
xor eax, eax
;; size=2 bbWeight=1.32 PerfScore 0.33
-G_M19657_IG04: ; bbWeight=1.32, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+G_M19657_IG08: ; bbWeight=1.32, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
cmp eax, 75
- jge G_M19657_IG11
+ jge G_M19657_IG15
;; size=9 bbWeight=1.32 PerfScore 1.64
-G_M19657_IG05: ; bbWeight=1.30, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+G_M19657_IG09: ; bbWeight=1.30, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
test rcx, rcx
- je G_M19657_IG09
+ je G_M19657_IG13
test rdx, rdx
- je SHORT G_M19657_IG09
+ je SHORT G_M19657_IG13
cmp dword ptr [rcx+0x08], r9d
- jbe SHORT G_M19657_IG09
+ jbe SHORT G_M19657_IG13
mov r11d, r9d
mov rbx, gword ptr [rcx+8*r11+0x10]
; gcrRegs +[rbx]
test rbx, rbx
- je SHORT G_M19657_IG09
+ je SHORT G_M19657_IG13
test eax, eax
- jl SHORT G_M19657_IG09
+ jl SHORT G_M19657_IG13
cmp dword ptr [rbx+0x08], 75
- jl SHORT G_M19657_IG09
+ jl SHORT G_M19657_IG13
cmp dword ptr [rdx+0x08], 75
- jl SHORT G_M19657_IG09
+ jl SHORT G_M19657_IG13
;; size=49 bbWeight=1.30 PerfScore 24.99
-G_M19657_IG06: ; bbWeight=1.30, gcrefRegs=010E {rcx rdx rbx r8}, byrefRegs=0000 {}, byref
+G_M19657_IG10: ; bbWeight=1.30, gcrefRegs=010E {rcx rdx rbx r8}, byrefRegs=0000 {}, byref
mov esi, dword ptr [r8+0x08]
cmp r9d, esi
- jae G_M19657_IG20
+ jae G_M19657_IG28
mov rdi, gword ptr [r8+8*r11+0x10]
; gcrRegs +[rdi]
mov ebp, r10d
;; size=21 bbWeight=1.30 PerfScore 7.14
-G_M19657_IG07: ; bbWeight=97.70, gcrefRegs=018E {rcx rdx rbx rdi r8}, byrefRegs=0000 {}, byref, isz
+G_M19657_IG11: ; bbWeight=97.70, gcrefRegs=018E {rcx rdx rbx rdi r8}, byrefRegs=0000 {}, byref, isz
mov r11, rdi
; gcrRegs +[r11]
cmp r10d, dword ptr [r11+0x08]
- jae G_M19657_IG20
+ jae G_M19657_IG28
lea r14, bword ptr [r11+4*rbp+0x10]
; byrRegs +[r14]
mov r11d, dword ptr [r14]
@@ -128,350 +206,230 @@ G_M19657_IG07: ; bbWeight=97.70, gcrefRegs=018E {rcx rdx rbx rdi r8}, byr
mov rsi, gword ptr [rdx+8*rsi+0x10]
; gcrRegs +[rsi]
cmp r10d, dword ptr [rsi+0x08]
- jae G_M19657_IG20
+ jae G_M19657_IG28
imul r15d, dword ptr [rsi+4*rbp+0x10]
add r11d, r15d
mov dword ptr [r14], r11d
inc eax
cmp eax, 75
- jl SHORT G_M19657_IG07
+ jl SHORT G_M19657_IG11
;; size=65 bbWeight=97.70 PerfScore 2295.89
-G_M19657_IG08: ; bbWeight=1.30, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+G_M19657_IG12: ; bbWeight=1.30, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rbx rsi rdi]
; byrRegs -[r14]
- jmp SHORT G_M19657_IG11
+ jmp SHORT G_M19657_IG15
;; size=2 bbWeight=1.30 PerfScore 2.60
-G_M19657_IG09: ; bbWeight=0.01, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+G_M19657_IG13: ; bbWeight=0.01, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
mov esi, dword ptr [r8+0x08]
mov r11d, r9d
cmp r9d, esi
- jae G_M19657_IG20
+ jae G_M19657_IG28
mov rdi, gword ptr [r8+8*r11+0x10]
; gcrRegs +[rdi]
mov ebp, r10d
;; size=24 bbWeight=0.01 PerfScore 0.07
-G_M19657_IG10: ; bbWeight=0.99, gcrefRegs=0186 {rcx rdx rdi r8}, byrefRegs=0000 {}, byref, isz
+G_M19657_IG14: ; bbWeight=0.99, gcrefRegs=0186 {rcx rdx rdi r8}, byrefRegs=0000 {}, byref, isz
mov r14, rdi
; gcrRegs +[r14]
cmp r10d, dword ptr [r14+0x08]
- jae G_M19657_IG20
+ jae G_M19657_IG28
...
+347 (+31.12%) : 50609.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
@@ -9,21 +9,21 @@
; with Dynamic PGO: edge weights are invalid, and fgCalledCount is 180.83
; Final local variable assignments
;
-; V00 arg0 [V00,T11] ( 17, 7.89) ref -> rcx class-hnd single-def <int[][]>
-; V01 arg1 [V01,T08] ( 17,104.27) ref -> rdx class-hnd single-def <int[][]>
-; V02 arg2 [V02,T12] ( 12, 4.63) ref -> r8 class-hnd single-def <int[][]>
+; V00 arg0 [V00,T11] ( 23, 8.95) ref -> rcx class-hnd single-def <int[][]>
+; V01 arg1 [V01,T08] ( 24,104.98) ref -> rdx class-hnd single-def <int[][]>
+; V02 arg2 [V02,T12] ( 18, 5.34) ref -> r8 class-hnd single-def <int[][]>
;* V03 loc0 [V03 ] ( 0, 0 ) int -> zero-ref
-; V04 loc1 [V04,T13] ( 49, 4.98) int -> r9
-; V05 loc2 [V05,T06] ( 50,202.66) int -> r10
-; V06 loc3 [V06,T03] ( 52,400.63) int -> rax
+; V04 loc1 [V04,T13] ( 61, 7.10) int -> r9
+; V05 loc2 [V05,T06] ( 59,205.84) int -> r10
+; V06 loc3 [V06,T03] ( 63,403.47) int -> rax
; V07 OutArgs [V07 ] ( 1, 1 ) struct (32) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V08 tmp1 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd "Strict ordering of exceptions for Array store" <int[]>
;* V09 tmp2 [V09 ] ( 0, 0 ) int -> zero-ref "Strict ordering of exceptions for Array store"
-; V10 tmp3 [V10,T17] ( 3, 0 ) byref -> r11 "dup spill"
-; V11 tmp4 [V11,T18] ( 3, 0 ) byref -> r11 "dup spill"
-; V12 tmp5 [V12,T19] ( 3, 0 ) byref -> r11 "dup spill"
-; V13 tmp6 [V13,T20] ( 3, 0 ) byref -> r11 "dup spill"
-; V14 tmp7 [V14,T21] ( 3, 0 ) byref -> r11 "dup spill"
+; V10 tmp3 [V10,T17] ( 6, 2.12) byref -> rbx "dup spill"
+; V11 tmp4 [V11,T18] ( 6, 2.12) byref -> rbx "dup spill"
+; V12 tmp5 [V12,T25] ( 3, 0 ) byref -> r11 "dup spill"
+; V13 tmp6 [V13,T26] ( 3, 0 ) byref -> r11 "dup spill"
+; V14 tmp7 [V14,T27] ( 3, 0 ) byref -> r11 "dup spill"
; V15 tmp8 [V15,T00] ( 6,592.07) byref -> r14 "dup spill"
;* V16 tmp9 [V16 ] ( 0, 0 ) ref -> zero-ref "arr expr"
;* V17 tmp10 [V17 ] ( 0, 0 ) ref -> zero-ref "arr expr"
@@ -32,12 +32,12 @@
; V20 tmp13 [V20,T01] ( 6,592.07) ref -> registers "arr expr"
; V21 tmp14 [V21,T04] ( 5,396.69) ref -> r15 "arr expr"
; V22 tmp15 [V22,T02] ( 6,592.07) ref -> registers "arr expr"
-; V23 tmp16 [V23,T22] ( 3, 0 ) ref -> r11 "arr expr"
-; V24 tmp17 [V24,T23] ( 3, 0 ) ref -> rdi "arr expr"
-; V25 tmp18 [V25,T24] ( 3, 0 ) ref -> rbp "arr expr"
-; V26 tmp19 [V26,T25] ( 3, 0 ) ref -> r11 "arr expr"
-; V27 tmp20 [V27,T26] ( 3, 0 ) ref -> rdi "arr expr"
-; V28 tmp21 [V28,T27] ( 3, 0 ) ref -> rbp "arr expr"
+; V23 tmp16 [V23,T22] ( 5, 1.42) ref -> r11 "arr expr"
+; V24 tmp17 [V24,T19] ( 6, 2.12) ref -> rdi "arr expr"
+; V25 tmp18 [V25,T23] ( 5, 1.42) ref -> rbp "arr expr"
+; V26 tmp19 [V26,T20] ( 6, 2.12) ref -> r11 "arr expr"
+; V27 tmp20 [V27,T24] ( 5, 1.42) ref -> rdi "arr expr"
+; V28 tmp21 [V28,T21] ( 6, 2.12) ref -> rbp "arr expr"
; V29 tmp22 [V29,T28] ( 3, 0 ) ref -> r11 "arr expr"
; V30 tmp23 [V30,T29] ( 3, 0 ) ref -> rdi "arr expr"
; V31 tmp24 [V31,T30] ( 3, 0 ) ref -> rbp "arr expr"
@@ -49,11 +49,11 @@
; V37 tmp30 [V37,T36] ( 3, 0 ) ref -> rbp "arr expr"
; V38 cse0 [V38,T10] ( 4,100.00) ref -> rdi hoist multi-def "CSE - aggressive"
; V39 cse1 [V39,T09] ( 6,103.58) ref -> rbx multi-def "CSE - aggressive"
-; V40 cse2 [V40,T16] ( 10, 2.63) int -> rsi hoist multi-def "CSE - aggressive"
+; V40 cse2 [V40,T15] ( 13, 2.99) int -> rsi hoist multi-def "CSE - aggressive"
; V41 cse3 [V41,T14] ( 6, 4.93) long -> r11 hoist multi-def "CSE - aggressive"
; V42 cse4 [V42,T07] ( 6,198.67) long -> rbp hoist multi-def "CSE - aggressive"
; V43 cse5 [V43,T05] ( 3,293.07) long -> rsi "CSE - aggressive"
-; V44 cse6 [V44,T15] ( 3, 2.96) long -> rbx "CSE - aggressive"
+; V44 cse6 [V44,T16] ( 3, 2.96) long -> rbx "CSE - aggressive"
;
; Lcl frame size = 40
@@ -74,46 +74,124 @@ G_M19657_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov r10d, dword ptr [rsp+0xCC]
mov eax, dword ptr [rsp+0xC8]
;; size=91 bbWeight=1 PerfScore 17.25
-G_M19657_IG02: ; bbWeight=1, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
- jmp SHORT G_M19657_IG04
- ;; size=2 bbWeight=1 PerfScore 2.00
-G_M19657_IG03: ; bbWeight=1.32, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+G_M19657_IG02: ; bbWeight=1, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+ jmp G_M19657_IG08
+ ;; size=5 bbWeight=1 PerfScore 2.00
+G_M19657_IG03: ; bbWeight=0.02, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+ xor r10d, r10d
+ jmp G_M19657_IG07
+ ;; size=8 bbWeight=0.02 PerfScore 0.04
+G_M19657_IG04: ; bbWeight=0.02, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+ inc r9d
+ cmp r9d, 75
+ jge G_M19657_IG28
+ jmp SHORT G_M19657_IG03
+ ;; size=15 bbWeight=0.02 PerfScore 0.06
+G_M19657_IG05: ; bbWeight=0.35, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+ mov r11d, r9d
+ mov r11, gword ptr [r8+8*r11+0x10]
+ ; gcrRegs +[r11]
+ mov ebx, r10d
+ lea rbx, bword ptr [r11+4*rbx+0x10]
+ ; byrRegs +[rbx]
+ mov r11d, dword ptr [rbx]
+ ; gcrRegs -[r11]
+ cmp r9d, dword ptr [rcx+0x08]
+ jae G_M19657_IG27
+ mov edi, r9d
+ mov rdi, gword ptr [rcx+8*rdi+0x10]
+ ; gcrRegs +[rdi]
+ cmp eax, dword ptr [rdi+0x08]
+ jae G_M19657_IG27
+ mov ebp, eax
+ mov edi, dword ptr [rdi+4*rbp+0x10]
+ ; gcrRegs -[rdi]
+ mov ebp, eax
+ mov rbp, gword ptr [rdx+8*rbp+0x10]
+ ; gcrRegs +[rbp]
+ mov r14d, r10d
+ imul edi, dword ptr [rbp+4*r14+0x10]
+ add r11d, edi
+ mov dword ptr [rbx], r11d
+ inc r10d
+ cmp r10d, 75
+ jge G_M19657_IG32
+ jmp SHORT G_M19657_IG05
+ ;; size=89 bbWeight=0.35 PerfScore 10.71
+G_M19657_IG06: ; bbWeight=0.35, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs -[rbp]
+ ; byrRegs -[rbx]
+ cmp r9d, esi
+ jae G_M19657_IG27
+ mov r11d, r9d
+ mov r11, gword ptr [r8+8*r11+0x10]
+ ; gcrRegs +[r11]
+ cmp r10d, dword ptr [r11+0x08]
+ jae G_M19657_IG27
+ mov ebx, r10d
+ lea rbx, bword ptr [r11+4*rbx+0x10]
+ ; byrRegs +[rbx]
+ mov r11d, dword ptr [rbx]
+ ; gcrRegs -[r11]
+ mov edi, r9d
+ mov rdi, gword ptr [rcx+8*rdi+0x10]
+ ; gcrRegs +[rdi]
+ mov ebp, eax
+ mov edi, dword ptr [rdi+4*rbp+0x10]
+ ; gcrRegs -[rdi]
+ mov ebp, eax
+ mov rbp, gword ptr [rdx+8*rbp+0x10]
+ ; gcrRegs +[rbp]
+ cmp r10d, dword ptr [rbp+0x08]
+ jae G_M19657_IG27
+ mov r14d, r10d
+ imul edi, dword ptr [rbp+4*r14+0x10]
+ add r11d, edi
+ mov dword ptr [rbx], r11d
+ inc eax
+ cmp eax, 75
+ jge G_M19657_IG36
+ jmp SHORT G_M19657_IG06
+ ;; size=97 bbWeight=0.35 PerfScore 11.15
+G_M19657_IG07: ; bbWeight=1.32, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+ ; gcrRegs -[rbp]
+ ; byrRegs -[rbx]
xor eax, eax
;; size=2 bbWeight=1.32 PerfScore 0.33
-G_M19657_IG04: ; bbWeight=1.32, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+G_M19657_IG08: ; bbWeight=1.32, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
cmp eax, 75
- jge G_M19657_IG10
+ jge G_M19657_IG14
;; size=9 bbWeight=1.32 PerfScore 1.65
-G_M19657_IG05: ; bbWeight=1.30, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+G_M19657_IG09: ; bbWeight=1.30, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
test rcx, rcx
- je G_M19657_IG08
+ je G_M19657_IG12
test rdx, rdx
- je SHORT G_M19657_IG08
+ je SHORT G_M19657_IG12
cmp dword ptr [rcx+0x08], r9d
- jbe SHORT G_M19657_IG08
+ jbe SHORT G_M19657_IG12
mov r11d, r9d
mov rbx, gword ptr [rcx+8*r11+0x10]
; gcrRegs +[rbx]
test rbx, rbx
- je SHORT G_M19657_IG08
+ je SHORT G_M19657_IG12
test eax, eax
- jl SHORT G_M19657_IG08
+ jl SHORT G_M19657_IG12
cmp dword ptr [rbx+0x08], 75
- jl SHORT G_M19657_IG08
+ jl SHORT G_M19657_IG12
cmp dword ptr [rdx+0x08], 75
- jl SHORT G_M19657_IG08
+ jl SHORT G_M19657_IG12
mov esi, dword ptr [r8+0x08]
cmp r9d, esi
- jae G_M19657_IG19
+ jae G_M19657_IG27
mov rdi, gword ptr [r8+8*r11+0x10]
; gcrRegs +[rdi]
mov ebp, r10d
;; size=70 bbWeight=1.30 PerfScore 32.28
-G_M19657_IG06: ; bbWeight=97.69, gcrefRegs=018E {rcx rdx rbx rdi r8}, byrefRegs=0000 {}, byref, isz
+G_M19657_IG10: ; bbWeight=97.69, gcrefRegs=018E {rcx rdx rbx rdi r8}, byrefRegs=0000 {}, byref, isz
mov r11, rdi
; gcrRegs +[r11]
cmp r10d, dword ptr [r11+0x08]
- jae G_M19657_IG19
+ jae G_M19657_IG27
lea r14, bword ptr [r11+4*rbp+0x10]
; byrRegs +[r14]
mov r11d, dword ptr [r14]
@@ -126,350 +204,230 @@ G_M19657_IG06: ; bbWeight=97.69, gcrefRegs=018E {rcx rdx rbx rdi r8}, byr
mov rsi, gword ptr [rdx+8*rsi+0x10]
; gcrRegs +[rsi]
cmp r10d, dword ptr [rsi+0x08]
- jae G_M19657_IG19
+ jae G_M19657_IG27
imul r15d, dword ptr [rsi+4*rbp+0x10]
add r11d, r15d
mov dword ptr [r14], r11d
inc eax
cmp eax, 75
- jl SHORT G_M19657_IG06
+ jl SHORT G_M19657_IG10
;; size=65 bbWeight=97.69 PerfScore 2295.75
-G_M19657_IG07: ; bbWeight=1.30, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
+G_M19657_IG11: ; bbWeight=1.30, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rbx rsi rdi]
; byrRegs -[r14]
- jmp SHORT G_M19657_IG10
+ jmp SHORT G_M19657_IG14
;; size=2 bbWeight=1.30 PerfScore 2.61
-G_M19657_IG08: ; bbWeight=0.01, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
+G_M19657_IG12: ; bbWeight=0.01, gcrefRegs=0106 {rcx rdx r8}, byrefRegs=0000 {}, byref
mov esi, dword ptr [r8+0x08]
mov r11d, r9d
cmp r9d, esi
- jae G_M19657_IG19
+ jae G_M19657_IG27
mov rdi, gword ptr [r8+8*r11+0x10]
; gcrRegs +[rdi]
mov ebp, r10d
;; size=24 bbWeight=0.01 PerfScore 0.07
-G_M19657_IG09: ; bbWeight=0.99, gcrefRegs=0186 {rcx rdx rdi r8}, byrefRegs=0000 {}, byref, isz
+G_M19657_IG13: ; bbWeight=0.99, gcrefRegs=0186 {rcx rdx rdi r8}, byrefRegs=0000 {}, byref, isz
mov r14, rdi
; gcrRegs +[r14]
cmp r10d, dword ptr [r14+0x08]
- jae G_M19657_IG19
+ jae G_M19657_IG27
lea r14, bword ptr [r14+4*rbp+0x10]
; gcrRegs -[r14]
; byrRegs +[r14]
...
benchmarks.run_tiered.windows.x64.checked.mch
-438 (-32.09%) : 24990.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
@@ -9,91 +9,91 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T09] ( 24, 52.02) ref -> rbx class-hnd single-def <double[][]>
-; V01 arg1 [V01,T22] ( 7, 6.02) ref -> rsi class-hnd single-def <int[]>
+; V00 arg0 [V00,T09] ( 15, 52 ) ref -> rbx class-hnd single-def <double[][]>
+; V01 arg1 [V01,T22] ( 4, 6 ) ref -> rsi class-hnd single-def <int[]>
; V02 loc0 [V02,T12] ( 6, 36 ) int -> r14
-; V03 loc1 [V03,T08] ( 19, 55.92) int -> rbp
-; V04 loc2 [V04,T18] ( 7, 13 ) int -> r15
-; V05 loc3 [V05,T04] ( 40, 79.48) int -> rdi
-; V06 loc4 [V06,T16] ( 23, 26.04) int -> r12
-; V07 loc5 [V07,T31] ( 8, 26.00) double -> mm0
-; V08 loc6 [V08,T06] ( 22, 78.30) int -> rcx
-; V09 loc7 [V09,T30] ( 9, 40.00) double -> mm1
-; V10 loc8 [V10,T27] ( 4, 4 ) ref -> [rsp+0x110] class-hnd tier0-frame <double[]>
-; V11 loc9 [V11,T32] ( 5, 18 ) double -> mm6
-; V12 loc10 [V12,T07] ( 19, 70.30) int -> registers
-; V13 loc11 [V13,T13] ( 9, 32 ) int -> rdx
+; V03 loc1 [V03,T08] ( 13, 56 ) int -> rbp
+; V04 loc2 [V04,T21] ( 2, 10 ) int -> r15
+; V05 loc3 [V05,T04] ( 19, 80 ) int -> rdi
+; V06 loc4 [V06,T15] ( 12, 28 ) int -> r12
+; V07 loc5 [V07,T29] ( 5, 26 ) double -> mm0
+; V08 loc6 [V08,T06] ( 14, 78.16) int -> rcx
+; V09 loc7 [V09,T28] ( 6, 40 ) double -> mm1
+; V10 loc8 [V10,T27] ( 2, 4 ) ref -> [rsp+0xF0] class-hnd spill-single-def tier0-frame <double[]>
+; V11 loc9 [V11,T30] ( 3, 18 ) double -> mm0
+; V12 loc10 [V12,T07] ( 12, 70.16) int -> rcx
+; V13 loc11 [V13,T13] ( 7, 32 ) int -> rdx
; V14 loc12 [V14,T14] ( 9, 30.20) ref -> rax class-hnd <double[]>
-; V15 loc13 [V15,T15] ( 6, 26.16) ref -> r8 class-hnd <double[]>
-; V16 loc14 [V16,T33] ( 3, 18 ) double -> mm0
+; V15 loc13 [V15,T16] ( 6, 26.16) ref -> r8 class-hnd <double[]>
+; V16 loc14 [V16,T31] ( 3, 18 ) double -> mm0
; V17 loc15 [V17,T05] ( 14, 78.48) int -> rcx
; V18 OutArgs [V18 ] ( 1, 1 ) struct (32) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V19 tmp1 [V19,T00] ( 9, 96.00) byref -> r9 "dup spill"
-; V20 tmp2 [V20,T23] ( 4, 8 ) ref -> [rsp+0x28] class-hnd "Strict ordering of exceptions for Array store" <double[]>
-; V21 tmp3 [V21,T03] ( 6, 96 ) byref -> r9 "dup spill"
+; V19 tmp1 [V19,T00] ( 6, 96 ) byref -> r10 "dup spill"
+; V20 tmp2 [V20,T24] ( 2, 8 ) ref -> [rsp+0x20] class-hnd spill-single-def "Strict ordering of exceptions for Array store" <double[]>
+; V21 tmp3 [V21,T01] ( 6, 96 ) byref -> r9 "dup spill"
;* V22 tmp4 [V22 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
-; V23 tmp5 [V23,T19] ( 6, 12 ) ref -> registers "arr expr"
-; V24 tmp6 [V24,T01] ( 9, 96.00) ref -> r10 "arr expr"
-; V25 tmp7 [V25,T20] ( 6, 12 ) ref -> r9 "arr expr"
-; V26 tmp8 [V26,T21] ( 6, 12 ) ref -> r8 "arr expr"
-; V27 tmp9 [V27,T02] ( 9, 96.00) ref -> r10 "arr expr"
-; V28 cse0 [V28,T25] ( 3, 5.94) ref -> rcx "CSE - moderate"
-; V29 cse1 [V29,T28] ( 3, 0.06) ref -> rax "CSE - conservative"
-; V30 cse2 [V30,T29] ( 3, 0.06) ref -> rdx "CSE - conservative"
-; V31 cse3 [V31,T26] ( 3, 5.94) ref -> r8 "CSE - moderate"
-; V32 cse4 [V32,T17] ( 15, 14.64) int -> r13 multi-def "CSE - moderate"
-; V33 cse5 [V33,T24] ( 4, 7.92) int -> [rsp+0x3C] "CSE - moderate"
-; V34 cse6 [V34,T10] ( 12, 47.52) long -> [rsp+0x30] spill-single-def "CSE - aggressive"
-; V35 cse7 [V35,T11] ( 3, 47.52) long -> r10 "CSE - aggressive"
+; V23 tmp5 [V23,T18] ( 3, 12 ) ref -> rcx "arr expr"
+; V24 tmp6 [V24,T02] ( 6, 96 ) ref -> r10 "arr expr"
+; V25 tmp7 [V25,T19] ( 3, 12 ) ref -> r10 "arr expr"
+; V26 tmp8 [V26,T20] ( 3, 12 ) ref -> rcx "arr expr"
+; V27 tmp9 [V27,T03] ( 6, 96 ) ref -> r8 "arr expr"
+; V28 cse0 [V28,T25] ( 3, 6 ) ref -> r8 "CSE - moderate"
+; V29 cse1 [V29,T26] ( 3, 6 ) ref -> rcx "CSE - moderate"
+; V30 cse2 [V30,T17] ( 10, 16.32) int -> r13 multi-def "CSE - moderate"
+; V31 cse3 [V31,T23] ( 4, 8 ) int -> [rsp+0x34] "CSE - moderate"
+; V32 cse4 [V32,T10] ( 12, 48 ) long -> [rsp+0x28] spill-single-def "CSE - aggressive"
+; V33 cse5 [V33,T11] ( 3, 47.52) long -> r10 "CSE - aggressive"
;
-; Lcl frame size = 88
+; Lcl frame size = 56
G_M58112_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- sub rsp, 152
- mov qword ptr [rsp+0x178], r15
- mov qword ptr [rsp+0x170], r14
- mov qword ptr [rsp+0x168], r13
- mov qword ptr [rsp+0x160], r12
- mov qword ptr [rsp+0x158], rdi
- mov qword ptr [rsp+0x150], rsi
- mov qword ptr [rsp+0x148], rbx
+ sub rsp, 120
+ mov qword ptr [rsp+0x158], r15
+ mov qword ptr [rsp+0x150], r14
+ mov qword ptr [rsp+0x148], r13
+ mov qword ptr [rsp+0x140], r12
+ mov qword ptr [rsp+0x138], rdi
+ mov qword ptr [rsp+0x130], rsi
+ mov qword ptr [rsp+0x128], rbx
vzeroupper
- vmovaps xmmword ptr [rsp+0x40], xmm6
- mov rbx, gword ptr [rsp+0x190]
+ mov rbx, gword ptr [rsp+0x170]
; gcrRegs +[rbx]
- mov rsi, gword ptr [rsp+0x198]
+ mov rsi, gword ptr [rsp+0x178]
; gcrRegs +[rsi]
- mov r14d, dword ptr [rsp+0x144]
- mov ebp, dword ptr [rsp+0x140]
- mov r15d, dword ptr [rsp+0x13C]
- mov edi, dword ptr [rsp+0x138]
- mov edx, dword ptr [rsp+0x100]
- mov rax, gword ptr [rsp+0xF8]
+ mov r14d, dword ptr [rsp+0x124]
+ mov ebp, dword ptr [rsp+0x120]
+ mov r15d, dword ptr [rsp+0x11C]
+ mov edi, dword ptr [rsp+0x118]
+ mov edx, dword ptr [rsp+0xE0]
+ mov rax, gword ptr [rsp+0xD8]
; gcrRegs +[rax]
- mov r8, gword ptr [rsp+0xF0]
+ mov r8, gword ptr [rsp+0xD0]
; gcrRegs +[r8]
- vmovsd xmm0, qword ptr [rsp+0xE8]
- mov ecx, dword ptr [rsp+0xE4]
- ;; size=157 bbWeight=0.01 PerfScore 0.34
+ vmovsd xmm0, qword ptr [rsp+0xC8]
+ mov ecx, dword ptr [rsp+0xC4]
+ ;; size=148 bbWeight=0.01 PerfScore 0.32
G_M58112_IG02: ; bbWeight=0.01, gcrefRegs=0149 {rax rbx rsi r8}, byrefRegs=0000 {}, byref
- jmp G_M58112_IG35
+ jmp G_M58112_IG24
;; size=5 bbWeight=0.01 PerfScore 0.02
-G_M58112_IG03: ; bbWeight=1.98, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref, isz
+G_M58112_IG03: ; bbWeight=2, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rax r8]
mov r12d, edi
+ mov r13d, dword ptr [rbx+0x08]
+ cmp r12d, r13d
+ jae G_M58112_IG34
mov eax, r12d
- mov qword ptr [rsp+0x30], rax
+ mov qword ptr [rsp+0x28], rax
mov r8, gword ptr [rbx+8*rax+0x10]
; gcrRegs +[r8]
mov rcx, r8
; gcrRegs +[rcx]
cmp r12d, dword ptr [rcx+0x08]
- jae G_M58112_IG45
+ jae G_M58112_IG34
vmovsd xmm0, qword ptr [rcx+8*rax+0x10]
vandps xmm0, xmm0, xmmword ptr [reloc @RWD00]
- lea r11d, [r12+0x01]
- mov edx, r11d
- mov dword ptr [rsp+0x3C], edx
+ lea r10d, [r12+0x01]
+ mov edx, r10d
+ mov dword ptr [rsp+0x34], edx
mov ecx, edx
; gcrRegs -[rcx]
cmp ecx, ebp
@@ -103,44 +103,44 @@ G_M58112_IG03: ; bbWeight=1.98, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000
jl SHORT G_M58112_IG08
cmp r13d, ebp
jl SHORT G_M58112_IG08
- ;; size=78 bbWeight=1.98 PerfScore 39.10
-G_M58112_IG04: ; bbWeight=15.68, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+ ;; size=91 bbWeight=2 PerfScore 46.00
+G_M58112_IG04: ; bbWeight=15.84, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
mov r10d, ecx
mov r10, gword ptr [rbx+8*r10+0x10]
; gcrRegs +[r10]
cmp edi, dword ptr [r10+0x08]
- jae G_M58112_IG45
+ jae G_M58112_IG34
vmovsd xmm1, qword ptr [r10+8*rax+0x10]
vandps xmm1, xmm1, xmmword ptr [reloc @RWD00]
vucomisd xmm1, xmm0
jbe SHORT G_M58112_IG06
- ;; size=39 bbWeight=15.68 PerfScore 239.14
-G_M58112_IG05: ; bbWeight=7.84, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref
+ ;; size=39 bbWeight=15.84 PerfScore 241.56
+G_M58112_IG05: ; bbWeight=7.92, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref
; gcrRegs -[r10]
mov r12d, ecx
vmovaps xmm0, xmm1
- ;; size=7 bbWeight=7.84 PerfScore 3.92
-G_M58112_IG06: ; bbWeight=15.68, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+ ;; size=7 bbWeight=7.92 PerfScore 3.96
+G_M58112_IG06: ; bbWeight=15.84, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
inc ecx
cmp ecx, ebp
jl SHORT G_M58112_IG04
- ;; size=6 bbWeight=15.68 PerfScore 23.52
-G_M58112_IG07: ; bbWeight=1.98, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+ ;; size=6 bbWeight=15.84 PerfScore 23.76
+G_M58112_IG07: ; bbWeight=2, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
jmp SHORT G_M58112_IG11
- ;; size=2 bbWeight=1.98 PerfScore 3.96
+ ;; size=2 bbWeight=2 PerfScore 4.00
G_M58112_IG08: ; bbWeight=0.16, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
cmp ecx, r13d
- jae G_M58112_IG45
+ jae G_M58112_IG34
mov r10d, ecx
mov r10, gword ptr [rbx+8*r10+0x10]
; gcrRegs +[r10]
cmp edi, dword ptr [r10+0x08]
- jae G_M58112_IG45
+ jae G_M58112_IG34
vmovsd xmm1, qword ptr [r10+8*rax+0x10]
vandps xmm1, xmm1, xmmword ptr [reloc @RWD00]
vucomisd xmm1, xmm0
jbe SHORT G_M58112_IG10
- ;; size=48 bbWeight=0.16 PerfScore 2.61
+ ;; size=48 bbWeight=0.16 PerfScore 2.64
G_M58112_IG09: ; bbWeight=0.08, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref
; gcrRegs -[r10]
mov r12d, ecx
@@ -151,35 +151,37 @@ G_M58112_IG10: ; bbWeight=0.16, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=00
cmp ecx, ebp
jl SHORT G_M58112_IG08
;; size=6 bbWeight=0.16 PerfScore 0.24
-G_M58112_IG11: ; bbWeight=1.98, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+G_M58112_IG11: ; bbWeight=2, gcrefRegs=0148 {rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+ cmp edi, dword ptr [rsi+0x08]
+ jae G_M58112_IG34
mov dword ptr [rsi+4*rax+0x10], r12d
cmp r12d, r13d
- jae G_M58112_IG45
+ jae G_M58112_IG34
mov ecx, r12d
mov rcx, gword ptr [rbx+8*rcx+0x10]
; gcrRegs +[rcx]
- mov r9, rcx
- ; gcrRegs +[r9]
- cmp edi, dword ptr [r9+0x08]
- jae G_M58112_IG45
- vmovsd xmm0, qword ptr [r9+8*rax+0x10]
+ mov r10, rcx
+ ; gcrRegs +[r10]
+ cmp edi, dword ptr [r10+0x08]
+ jae G_M58112_IG34
+ vmovsd xmm0, qword ptr [r10+8*rax+0x10]
vxorps xmm1, xmm1, xmm1
vucomisd xmm0, xmm1
jp SHORT G_M58112_IG12
- je G_M58112_IG43
- ;; size=58 bbWeight=1.98 PerfScore 33.83
-G_M58112_IG12: ; bbWeight=1.98, gcrefRegs=014A {rcx rbx rsi r8}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[r9]
+ je G_M58112_IG32
+ ;; size=67 bbWeight=2 PerfScore 42.17
+G_M58112_IG12: ; bbWeight=2, gcrefRegs=014A {rcx rbx rsi r8}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs -[r10]
cmp r12d, edi
je SHORT G_M58112_IG13
- mov gword ptr [rsp+0x110], r8
+ mov gword ptr [rsp+0xF0], r8
...
-147 (-15.91%) : 34081.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
@@ -9,24 +9,24 @@
; 0 inlinees with PGO data; 2 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T13] ( 8, 14.12) ref -> rcx class-hnd single-def <double[][]>
-; V01 arg1 [V01,T06] ( 11, 30.32) ref -> rdx class-hnd single-def <double[]>
-; V02 arg2 [V02,T14] ( 12, 12.06) ref -> rsi class-hnd single-def <double[][][]>
-; V03 arg3 [V03,T15] ( 12, 12.06) ref -> rdi class-hnd single-def <double[][]>
-; V04 arg4 [V04,T12] ( 10, 18 ) int -> rbx single-def
-; V05 loc0 [V05,T10] ( 12, 20.08) ref -> r15 class-hnd <double[][]>
-; V06 loc1 [V06,T07] ( 13, 32.24) ref -> r14 class-hnd <double[]>
+; V00 arg0 [V00,T12] ( 8, 14.12) ref -> rcx class-hnd single-def <double[][]>
+; V01 arg1 [V01,T06] ( 8, 30.20) ref -> rdx class-hnd single-def <double[]>
+; V02 arg2 [V02,T14] ( 9, 12.04) ref -> rsi class-hnd single-def <double[][][]>
+; V03 arg3 [V03,T15] ( 9, 12.04) ref -> rdi class-hnd single-def <double[][]>
+; V04 arg4 [V04,T13] ( 6, 15 ) int -> rbx single-def
+; V05 loc0 [V05,T10] ( 11, 20.08) ref -> r15 class-hnd <double[][]>
+; V06 loc1 [V06,T07] ( 10, 32.16) ref -> r14 class-hnd <double[]>
; V07 loc2 [V07,T20] ( 2, 2 ) long -> r13
; V08 loc3 [V08,T02] ( 15, 94.32) int -> rax
-; V09 loc4 [V09,T08] ( 13, 29.04) int -> r8
-; V10 loc5 [V10,T00] ( 43,128.20) int -> rbp
+; V09 loc4 [V09,T08] ( 7, 32 ) int -> r8
+; V10 loc5 [V10,T00] ( 34,127.72) int -> rbp
; V11 OutArgs [V11 ] ( 1, 1 ) struct (32) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V12 tmp1 [V12,T22] ( 6, 64.00) double -> mm6 "Strict ordering of exceptions for Array store"
+; V12 tmp1 [V12,T22] ( 4, 64 ) double -> mm0 "Strict ordering of exceptions for Array store"
; V13 tmp2 [V13,T01] ( 6, 96 ) ref -> r10 class-hnd "Strict ordering of exceptions for Array store" <double[]>
; V14 tmp3 [V14,T23] ( 4, 64 ) double -> mm0 "Strict ordering of exceptions for Array store"
;* V15 tmp4 [V15 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
; V16 tmp5 [V16,T18] ( 6, 10 ) ref -> r12 class-hnd exact "Inline stloc first use temp" <<unknown class>>
-; V17 tmp6 [V17 ] ( 4, 8 ) int -> [rsp+0x28] do-not-enreg[X] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp"
+; V17 tmp6 [V17 ] ( 4, 8 ) int -> [rsp+0x20] do-not-enreg[X] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp"
;* V18 tmp7 [V18 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
; V19 tmp8 [V19,T03] ( 5, 64.32) ref -> r11 "arr expr"
; V20 cse0 [V20,T11] ( 4, 20.04) ref -> r13 hoist multi-def "CSE - aggressive"
@@ -34,173 +34,133 @@
; V22 cse2 [V22,T09] ( 6, 27.92) ref -> r9 multi-def "CSE - aggressive"
; V23 cse3 [V23,T19] ( 4, 8.08) int -> r11 hoist multi-def "CSE - aggressive"
; V24 cse4 [V24,T16] ( 6, 12.12) long -> r10 hoist multi-def "CSE - aggressive"
-; V25 cse5 [V25,T04] ( 3, 47.52) long -> r12 "CSE - aggressive"
-; V26 cse6 [V26,T05] ( 3, 47.04) long -> rax "CSE - aggressive"
+; V25 cse5 [V25,T04] ( 3, 47.52) long -> rax "CSE - aggressive"
+; V26 cse6 [V26,T05] ( 3, 47.52) long -> r12 "CSE - aggressive"
; V27 cse7 [V27,T17] ( 3, 11.88) long -> rcx "CSE - aggressive"
;
-; Lcl frame size = 72
+; Lcl frame size = 40
G_M9806_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- sub rsp, 136
- mov qword ptr [rsp+0x128], r15
- mov qword ptr [rsp+0x120], r14
- mov qword ptr [rsp+0x118], r13
- mov qword ptr [rsp+0x110], r12
- mov qword ptr [rsp+0x108], rdi
- mov qword ptr [rsp+0x100], rsi
- mov qword ptr [rsp+0xF8], rbx
+ sub rsp, 104
+ mov qword ptr [rsp+0x108], r15
+ mov qword ptr [rsp+0x100], r14
+ mov qword ptr [rsp+0xF8], r13
+ mov qword ptr [rsp+0xF0], r12
+ mov qword ptr [rsp+0xE8], rdi
+ mov qword ptr [rsp+0xE0], rsi
+ mov qword ptr [rsp+0xD8], rbx
vzeroupper
- vmovaps xmmword ptr [rsp+0x30], xmm6
xor eax, eax
- mov qword ptr [rsp+0x28], rax
- mov rcx, gword ptr [rsp+0x140]
+ mov qword ptr [rsp+0x20], rax
+ mov rcx, gword ptr [rsp+0x120]
; gcrRegs +[rcx]
- mov rdx, gword ptr [rsp+0x148]
+ mov rdx, gword ptr [rsp+0x128]
; gcrRegs +[rdx]
- mov rsi, gword ptr [rsp+0x150]
+ mov rsi, gword ptr [rsp+0x130]
; gcrRegs +[rsi]
- mov rdi, gword ptr [rsp+0x158]
+ mov rdi, gword ptr [rsp+0x138]
; gcrRegs +[rdi]
- mov ebx, dword ptr [rsp+0x160]
- mov r15, gword ptr [rsp+0xF0]
+ mov ebx, dword ptr [rsp+0x140]
+ mov r15, gword ptr [rsp+0xD0]
; gcrRegs +[r15]
- mov r14, gword ptr [rsp+0xE8]
+ mov r14, gword ptr [rsp+0xC8]
; gcrRegs +[r14]
- mov eax, dword ptr [rsp+0xDC]
- mov r8d, dword ptr [rsp+0xD8]
- mov ebp, dword ptr [rsp+0xD4]
- ;; size=156 bbWeight=0.01 PerfScore 0.32
+ mov eax, dword ptr [rsp+0xBC]
+ mov r8d, dword ptr [rsp+0xB8]
+ mov ebp, dword ptr [rsp+0xB4]
+ ;; size=147 bbWeight=0.01 PerfScore 0.29
G_M9806_IG02: ; bbWeight=0.01, gcrefRegs=C0C6 {rcx rdx rsi rdi r14 r15}, byrefRegs=0000 {}, byref
- jmp G_M9806_IG27
+ jmp G_M9806_IG22
;; size=5 bbWeight=0.01 PerfScore 0.02
-G_M9806_IG03: ; bbWeight=1.98, gcrefRegs=00C6 {rcx rdx rsi rdi}, byrefRegs=0000 {}, byref
+G_M9806_IG03: ; bbWeight=2, gcrefRegs=00C6 {rcx rdx rsi rdi}, byrefRegs=0000 {}, byref
; gcrRegs -[r14-r15]
+ cmp r8d, dword ptr [rsi+0x08]
+ jae G_M9806_IG30
mov eax, r8d
mov r15, gword ptr [rsi+8*rax+0x10]
; gcrRegs +[r15]
+ cmp r8d, dword ptr [rdi+0x08]
+ jae G_M9806_IG30
mov eax, r8d
mov r14, gword ptr [rdi+8*rax+0x10]
; gcrRegs +[r14]
xor ebp, ebp
- jmp G_M9806_IG26
- ;; size=23 bbWeight=1.98 PerfScore 13.36
-G_M9806_IG04: ; bbWeight=7.92, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref, isz
+ jmp G_M9806_IG21
+ ;; size=43 bbWeight=2 PerfScore 29.50
+G_M9806_IG04: ; bbWeight=8, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r15]
xor ebp, ebp
test rdx, rdx
je SHORT G_M9806_IG08
- ;; size=7 bbWeight=7.92 PerfScore 11.88
-G_M9806_IG05: ; bbWeight=3.96, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref, isz
+ ;; size=7 bbWeight=8 PerfScore 12.00
+G_M9806_IG05: ; bbWeight=4, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref, isz
test r14, r14
je SHORT G_M9806_IG08
cmp dword ptr [rdx+0x08], 101
jl SHORT G_M9806_IG08
cmp dword ptr [r14+0x08], 101
jl SHORT G_M9806_IG08
- ;; size=18 bbWeight=3.96 PerfScore 36.63
-G_M9806_IG06: ; bbWeight=15.68, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref, isz
+ ;; size=18 bbWeight=4 PerfScore 37.00
+G_M9806_IG06: ; bbWeight=15.84, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref, isz
mov eax, ebp
- vmovsd xmm6, qword ptr [rdx+8*rax+0x10]
- vmovsd qword ptr [r14+8*rax+0x10], xmm6
+ vmovsd xmm0, qword ptr [rdx+8*rax+0x10]
+ vmovsd qword ptr [r14+8*rax+0x10], xmm0
inc ebp
cmp ebp, 101
jl SHORT G_M9806_IG06
- ;; size=22 bbWeight=15.68 PerfScore 121.53
-G_M9806_IG07: ; bbWeight=3.96, gcrefRegs=00C6 {rcx rdx rsi rdi}, byrefRegs=0000 {}, byref, isz
+ ;; size=22 bbWeight=15.84 PerfScore 122.76
+G_M9806_IG07: ; bbWeight=4, gcrefRegs=00C6 {rcx rdx rsi rdi}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r14]
jmp SHORT G_M9806_IG10
- ;; size=2 bbWeight=3.96 PerfScore 7.92
+ ;; size=2 bbWeight=4 PerfScore 8.00
G_M9806_IG08: ; bbWeight=0.04, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref
; gcrRegs +[r14]
mov eax, dword ptr [rdx+0x08]
;; size=3 bbWeight=0.04 PerfScore 0.08
G_M9806_IG09: ; bbWeight=0.16, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref, isz
cmp ebp, dword ptr [rdx+0x08]
- jae G_M9806_IG35
+ jae G_M9806_IG30
mov eax, ebp
- vmovsd xmm6, qword ptr [rdx+8*rax+0x10]
+ vmovsd xmm0, qword ptr [rdx+8*rax+0x10]
cmp ebp, dword ptr [r14+0x08]
- jae G_M9806_IG35
+ jae G_M9806_IG30
mov eax, ebp
- vmovsd qword ptr [r14+8*rax+0x10], xmm6
+ vmovsd qword ptr [r14+8*rax+0x10], xmm0
inc ebp
cmp ebp, 101
jl SHORT G_M9806_IG09
- ;; size=43 bbWeight=0.16 PerfScore 2.53
-G_M9806_IG10: ; bbWeight=7.92, gcrefRegs=00C6 {rcx rdx rsi rdi}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[r14]
- inc r8d
- cmp r8d, ebx
- jl SHORT G_M9806_IG03
- ;; size=8 bbWeight=7.92 PerfScore 11.88
-G_M9806_IG11: ; bbWeight=1, gcrefRegs=00C0 {rsi rdi}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rcx rdx]
- jmp SHORT G_M9806_IG16
- ;; size=2 bbWeight=1 PerfScore 2.00
-G_M9806_IG12: ; bbWeight=0.02, gcrefRegs=00C6 {rcx rdx rsi rdi}, byrefRegs=0000 {}, byref
- ; gcrRegs +[rcx rdx]
- cmp r8d, dword ptr [rsi+0x08]
- jae G_M9806_IG35
- mov eax, r8d
- mov r15, gword ptr [rsi+8*rax+0x10]
- ; gcrRegs +[r15]
- cmp r8d, dword ptr [rdi+0x08]
- jae G_M9806_IG35
- mov eax, r8d
- mov r14, gword ptr [rdi+8*rax+0x10]
- ; gcrRegs +[r14]
- xor ebp, ebp
- jmp G_M9806_IG26
- ;; size=43 bbWeight=0.02 PerfScore 0.30
-G_M9806_IG13: ; bbWeight=0.08, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref
- ; gcrRegs -[r15]
- xor ebp, ebp
- mov eax, dword ptr [rdx+0x08]
- ;; size=5 bbWeight=0.08 PerfScore 0.18
-G_M9806_IG14: ; bbWeight=0.16, gcrefRegs=40C6 {rcx rdx rsi rdi r14}, byrefRegs=0000 {}, byref, isz
- cmp ebp, dword ptr [rdx+0x08]
- jae G_M9806_IG35
- mov eax, ebp
- vmovsd xmm6, qword ptr [rdx+8*rax+0x10]
- cmp ebp, dword ptr [r14+0x08]
- jae G_M9806_IG35
- mov eax, ebp
- vmovsd qword ptr [r14+8*rax+0x10], xmm6
- inc ebp
- cmp ebp, 101
- jl SHORT G_M9806_IG14
;; size=43 bbWeight=0.16 PerfScore 2.56
-G_M9806_IG15: ; bbWeight=0.08, gcrefRegs=00C6 {rcx rdx rsi rdi}, byrefRegs=0000 {}, byref, isz
+G_M9806_IG10: ; bbWeight=8, gcrefRegs=00C6 {rcx rdx rsi rdi}, byrefRegs=0000 {}, byref
; gcrRegs -[r14]
inc r8d
cmp r8d, ebx
- jl SHORT G_M9806_IG12
- ;; size=8 bbWeight=0.08 PerfScore 0.12
-G_M9806_IG16: ; bbWeight=1, gcrefRegs=00C0 {rsi rdi}, byrefRegs=0000 {}, byref, isz
+ jl G_M9806_IG03
+ ;; size=12 bbWeight=8 PerfScore 12.00
+G_M9806_IG11: ; bbWeight=1, gcrefRegs=00C0 {rsi rdi}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rcx rdx]
call <unknown method>
; gcr arg pop 0
movsxd r13, eax
xor ebp, ebp
test ebx, ebx
- jle G_M9806_IG24
+ jle G_M9806_IG19
test rsi, rsi
- je SHORT G_M9806_IG21
+ je SHORT G_M9806_IG16
test rdi, rdi
- je SHORT G_M9806_IG21
+ je SHORT G_M9806_IG16
cmp dword ptr [rsi+0x08], ebx
- jl SHORT G_M9806_IG21
+ jl SHORT G_M9806_IG16
cmp dword ptr [rdi+0x08], ebx
...
-50 (-6.39%) : 47335.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
@@ -9,16 +9,16 @@
; 0 inlinees with PGO data; 0 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T08] ( 15, 12.06) ref -> rbx class-hnd single-def <float[][]>
+; V00 arg0 [V00,T08] ( 12, 12.04) ref -> rbx class-hnd single-def <float[][]>
; V01 arg1 [V01,T09] ( 9, 12.04) ref -> rsi class-hnd single-def <int[][]>
; V02 arg2 [V02,T19] ( 3, 3 ) ref -> r14 class-hnd single-def <double[]>
; V03 arg3 [V03,T18] ( 4, 6 ) ref -> rbp class-hnd single-def <JetStream.SampleVarianceUpperTriangularMatrix>
-; V04 arg4 [V04,T15] ( 3, 10 ) int -> rdi single-def
+; V04 arg4 [V04,T15] ( 2, 10 ) int -> rdi single-def
;* V05 loc0 [V05 ] ( 0, 0 ) int -> zero-ref
;* V06 loc1 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc2 [V07,T03] ( 17, 37.52) int -> r13
-; V08 loc3 [V08,T13] ( 6, 10 ) ref -> [rsp+0xE0] class-hnd tier0-frame <float[]>
-; V09 loc4 [V09,T00] ( 13, 56 ) int -> r15
+; V07 loc2 [V07,T03] ( 12, 38.50) int -> r13
+; V08 loc3 [V08,T13] ( 5, 10 ) ref -> [rsp+0xE0] class-hnd tier0-frame <float[]>
+; V09 loc4 [V09,T00] ( 12, 56 ) int -> r15
;* V10 loc5 [V10 ] ( 0, 0 ) ubyte -> zero-ref
; V11 loc6 [V11,T05] ( 20, 26.58) int -> r12
;* V12 loc7 [V12 ] ( 0, 0 ) float -> zero-ref
@@ -37,7 +37,7 @@
; V25 tmp10 [V25,T12] ( 6, 12 ) ref -> rax "arr expr"
; V26 cse0 [V26,T20] ( 3, 0.10) ref -> rax "CSE - conservative"
; V27 cse1 [V27,T17] ( 3, 9.90) ref -> rax "CSE - moderate"
-; V28 cse2 [V28,T07] ( 9, 17 ) int -> [rsp+0x24] spill-single-def "CSE - aggressive"
+; V28 cse2 [V28,T07] ( 7, 16 ) int -> [rsp+0x24] spill-single-def "CSE - aggressive"
; V29 cse3 [V29,T06] ( 16, 20 ) int -> r9 multi-def "CSE - aggressive"
; TEMP_01 double -> [rsp+0x28]
;
@@ -69,34 +69,13 @@ G_M56974_IG01: ; bbWeight=0.01, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
mov r15d, dword ptr [rsp+0xDC]
mov r12d, dword ptr [rsp+0xD4]
;; size=143 bbWeight=0.01 PerfScore 0.28
-G_M56974_IG02: ; bbWeight=0.01, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref
- jmp G_M56974_IG14
- ;; size=5 bbWeight=0.01 PerfScore 0.02
-G_M56974_IG03: ; bbWeight=1.98, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG02: ; bbWeight=0.01, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+ jmp SHORT G_M56974_IG11
+ ;; size=2 bbWeight=0.01 PerfScore 0.02
+G_M56974_IG03: ; bbWeight=2, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rax]
- mov ecx, r13d
- mov r12, gword ptr [rbx+8*rcx+0x10]
- ; gcrRegs +[r12]
- xor r15d, r15d
- test edi, edi
- mov rax, r12
- ; gcrRegs +[rax]
- jg SHORT G_M56974_IG09
- ;; size=18 bbWeight=1.98 PerfScore 7.92
-G_M56974_IG04: ; bbWeight=7.92, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rax r12]
- inc r13d
- cmp r10d, r13d
- jg SHORT G_M56974_IG03
- ;; size=8 bbWeight=7.92 PerfScore 11.88
-G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs -[rbx rbp rsi r14]
- jmp SHORT G_M56974_IG08
- ;; size=2 bbWeight=1 PerfScore 2.00
-G_M56974_IG06: ; bbWeight=0.02, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[rbx rbp rsi r14]
cmp r13d, dword ptr [rbx+0x08]
- jae G_M56974_IG31
+ jae G_M56974_IG28
mov eax, r13d
mov rax, gword ptr [rbx+8*rax+0x10]
; gcrRegs +[rax]
@@ -105,15 +84,15 @@ G_M56974_IG06: ; bbWeight=0.02, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRe
xor r15d, r15d
test edi, edi
mov rax, r12
- jg SHORT G_M56974_IG09
- ;; size=31 bbWeight=0.02 PerfScore 0.17
-G_M56974_IG07: ; bbWeight=0.08, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+ jg SHORT G_M56974_IG06
+ ;; size=31 bbWeight=2 PerfScore 16.50
+G_M56974_IG04: ; bbWeight=8, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rax r12]
inc r13d
cmp r10d, r13d
- jg SHORT G_M56974_IG06
- ;; size=8 bbWeight=0.08 PerfScore 0.12
-G_M56974_IG08: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
+ jg SHORT G_M56974_IG03
+ ;; size=8 bbWeight=8 PerfScore 12.00
+G_M56974_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
; gcrRegs -[rbx rbp rsi r14]
vmovaps xmm6, xmmword ptr [rsp+0x30]
add rsp, 248
@@ -127,59 +106,53 @@ G_M56974_IG08: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
pop rbp
ret
;; size=26 bbWeight=1 PerfScore 9.25
-G_M56974_IG09: ; bbWeight=2, gcVars=0000000000000000 {}, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M56974_IG06: ; bbWeight=2, gcVars=0000000000000000 {}, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, gcvars, byref, isz
; gcrRegs +[rax rbx rbp rsi r14]
cmp r13d, dword ptr [rsi+0x08]
- jae G_M56974_IG31
+ jae G_M56974_IG28
mov ecx, r13d
mov rcx, gword ptr [rsi+8*rcx+0x10]
; gcrRegs +[rcx]
test r15d, r15d
- jl SHORT G_M56974_IG11
+ jl SHORT G_M56974_IG08
;; size=23 bbWeight=2 PerfScore 15.00
-G_M56974_IG10: ; bbWeight=16, gcrefRegs=406B {rax rcx rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG07: ; bbWeight=16, gcrefRegs=406B {rax rcx rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
cmp dword ptr [rcx+0x08], r15d
- jg SHORT G_M56974_IG13
+ jg SHORT G_M56974_IG10
;; size=6 bbWeight=16 PerfScore 64.00
-G_M56974_IG11: ; bbWeight=8, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG08: ; bbWeight=8, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rcx]
inc r15d
cmp r15d, edi
- jl SHORT G_M56974_IG09
+ jl SHORT G_M56974_IG06
;; size=8 bbWeight=8 PerfScore 12.00
-G_M56974_IG12: ; bbWeight=1, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG09: ; bbWeight=1, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rax]
- test rbx, rbx
- je SHORT G_M56974_IG07
- test r13d, r13d
- jl SHORT G_M56974_IG07
- cmp dword ptr [rbx+0x08], r10d
- jl SHORT G_M56974_IG07
- jmp G_M56974_IG04
- ;; size=21 bbWeight=1 PerfScore 8.50
-G_M56974_IG13: ; bbWeight=0.50, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref
+ jmp SHORT G_M56974_IG04
+ ;; size=2 bbWeight=1 PerfScore 2.00
+G_M56974_IG10: ; bbWeight=0.50, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref
; gcrRegs +[rax]
lea r12d, [r13+0x01]
;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M56974_IG14: ; bbWeight=1, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG11: ; bbWeight=1, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
mov r10d, dword ptr [r14+0x08]
mov dword ptr [rsp+0x24], r10d
cmp r10d, r12d
- jle SHORT G_M56974_IG11
+ jle SHORT G_M56974_IG08
test rsi, rsi
- je G_M56974_IG24
+ je G_M56974_IG21
test rbx, rbx
- je G_M56974_IG23
+ je G_M56974_IG20
test r12d, r12d
- jl G_M56974_IG22
+ jl G_M56974_IG19
cmp dword ptr [rsi+0x08], r10d
- jl G_M56974_IG21
+ jl G_M56974_IG18
cmp dword ptr [rbx+0x08], r10d
- jl G_M56974_IG24
+ jl G_M56974_IG21
;; size=61 bbWeight=1 PerfScore 16.00
-G_M56974_IG15: ; bbWeight=3.96, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG12: ; bbWeight=3.96, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
cmp r15d, dword ptr [rax+0x08]
- jae G_M56974_IG31
+ jae G_M56974_IG28
mov ecx, r15d
mov gword ptr [rsp+0xE0], rax
; GC ptr vars +{V08}
@@ -202,63 +175,63 @@ G_M56974_IG15: ; bbWeight=3.96, gcrefRegs=4069 {rax rbx rbp rsi r14}, byr
lea r9d, [r15+0x01]
mov r11d, r9d
test r11d, r11d
- jl SHORT G_M56974_IG18
+ jl SHORT G_M56974_IG15
;; size=79 bbWeight=3.96 PerfScore 116.82
-G_M56974_IG16: ; bbWeight=15.84, gcrefRegs=4469 {rax rbx rbp rsi r10 r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG13: ; bbWeight=15.84, gcrefRegs=4469 {rax rbx rbp rsi r10 r14}, byrefRegs=0000 {}, byref, isz
cmp dword ptr [r10+0x08], r11d
- jle SHORT G_M56974_IG18
+ jle SHORT G_M56974_IG15
;; size=6 bbWeight=15.84 PerfScore 63.36
-G_M56974_IG17: ; bbWeight=1.98, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG14: ; bbWeight=1.98, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[r10]
mov ecx, r12d
mov r8, gword ptr [rbx+8*rcx+0x10]
; gcrRegs +[r8]
cmp r9d, dword ptr [r8+0x08]
- jae G_M56974_IG31
+ jae G_M56974_IG28
mov ecx, r9d
vcvtss2sd xmm0, xmm0, dword ptr [r8+4*rcx+0x10]
vucomisd xmm0, xmm6
- jbe SHORT G_M56974_IG19
+ jbe SHORT G_M56974_IG16
;; size=34 bbWeight=1.98 PerfScore 32.67
-G_M56974_IG18: ; bbWeight=1.98, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref
+G_M56974_IG15: ; bbWeight=1.98, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref
; gcrRegs -[r8]
mov ecx, r12d
mov rdx, gword ptr [rbx+8*rcx+0x10]
; gcrRegs +[rdx]
cmp r9d, dword ptr [rdx+0x08]
- jae G_M56974_IG31
+ jae G_M56974_IG28
mov ecx, r9d
vcvtsd2ss xmm0, xmm0, xmm6
vmovss dword ptr [rdx+4*rcx+0x10], xmm0
cmp r9d, dword ptr [rax+0x08]
- jae G_M56974_IG31
+ jae G_M56974_IG28
mov ecx, r9d
mov dword ptr [rax+4*rcx+0x10], r13d
;; size=49 bbWeight=1.98 PerfScore 35.14
-G_M56974_IG19: ; bbWeight=3.96, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref
+G_M56974_IG16: ; bbWeight=3.96, gcrefRegs=4068 {rbx rbp rsi r14}, byrefRegs=0000 {}, byref
; gcrRegs -[rax rdx]
inc r12d
cmp dword ptr [rsp+0x24], r12d
mov rax, gword ptr [rsp+0xE0]
; gcrRegs +[rax]
- jg G_M56974_IG15
+ jg G_M56974_IG12
;; size=22 bbWeight=3.96 PerfScore 16.83
-G_M56974_IG20: ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, gcvars, byref
+G_M56974_IG17: ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, gcvars, byref
; GC ptr vars -{V08}
mov r10d, dword ptr [rsp+0x24]
- jmp G_M56974_IG11
+ jmp G_M56974_IG08
;; size=10 bbWeight=1 PerfScore 3.00
-G_M56974_IG21: ; bbWeight=0.50, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
- jmp SHORT G_M56974_IG24
+G_M56974_IG18: ; bbWeight=0.50, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+ jmp SHORT G_M56974_IG21
;; size=2 bbWeight=0.50 PerfScore 1.00
-G_M56974_IG22: ; bbWeight=0.50, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
- jmp SHORT G_M56974_IG24
+G_M56974_IG19: ; bbWeight=0.50, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+ jmp SHORT G_M56974_IG21
;; size=2 bbWeight=0.50 PerfScore 1.00
-G_M56974_IG23: ; bbWeight=0.50, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
+G_M56974_IG20: ; bbWeight=0.50, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
;; size=0 bbWeight=0.50 PerfScore 0.00
-G_M56974_IG24: ; bbWeight=0.04, gcrefRegs=4069 {rax rbx rbp rsi r14}, byrefRegs=0000 {}, byref, isz
...
coreclr_tests.run.windows.x64.checked.mch
+32 (+2.52%) : 470192.dasm - JitTestlcsmixedlcs_cs.LCS:TestEntryPoint():int (Tier1-OSR)
@@ -11,13 +11,13 @@
; Final local variable assignments
;
;* V00 loc0 [V00 ] ( 0, 0 ) ref -> zero-ref class-hnd exact <<unknown class>>
-; V01 loc1 [V01,T19] ( 25, 307.22) ref -> rsi class-hnd exact <int[]>
-; V02 loc2 [V02,T65] ( 3, 0 ) ref -> [rsp+0x260] class-hnd exact tier0-frame <ushort[][]>
+; V01 loc1 [V01,T19] ( 26, 307.23) ref -> rsi class-hnd exact <int[]>
+; V02 loc2 [V02,T66] ( 3, 0 ) ref -> [rsp+0x260] class-hnd exact tier0-frame <ushort[][]>
; V03 loc3 [V03,T51] ( 2, 2.38) ref -> rbp class-hnd <int[,,,][,,,]>
; V04 loc4 [V04,T20] ( 17, 293.98) ref -> rdi class-hnd <int[,][,][,][,]>
; V05 loc5 [V05,T02] ( 30, 670.98) ref -> rbx class-hnd exact <int[]>
;* V06 loc6 [V06 ] ( 0, 0 ) int -> zero-ref
-; V07 loc7 [V07,T64] ( 6, 0 ) int -> rdx
+; V07 loc7 [V07,T65] ( 10, 0.04) int -> rdx
; V08 OutArgs [V08 ] ( 1, 1 ) struct (48) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V09 tmp1 [V09 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "dup spill" <<unknown class>>
;* V10 tmp2 [V10 ] ( 0, 0 ) int -> zero-ref "Strict ordering of exceptions for Array store"
@@ -50,7 +50,7 @@
; V37 tmp29 [V37,T50] ( 3, 3.35) byref -> r8 "dup spill"
; V38 tmp30 [V38,T54] ( 3, 0.59) byref -> r8 "dup spill"
; V39 tmp31 [V39,T62] ( 3, 0.13) byref -> rcx "dup spill"
-; V40 tmp32 [V40,T66] ( 3, 0 ) byref -> rcx "dup spill"
+; V40 tmp32 [V40,T63] ( 6, 0.07) byref -> rcx "dup spill"
; V41 tmp33 [V41,T00] ( 6,1028.48) ref -> r8 class-hnd "impImportNewObjArray" <int[,][,]>
; V42 tmp34 [V42,T14] ( 2, 342.83) int -> rcx "impImportNewObjArray"
; V43 tmp35 [V43,T15] ( 2, 342.83) int -> rdx "impImportNewObjArray"
@@ -83,13 +83,13 @@
; V70 cse1 [V70,T53] ( 3, 1.04) byref -> [rsp+0x30] spill-single-def hoist "CSE - conservative"
; V71 cse2 [V71,T61] ( 3, 0.22) byref -> r10 "CSE - conservative"
; V72 cse3 [V72,T60] ( 3, 0.30) int -> rcx "CSE - conservative"
-; V73 cse4 [V73,T63] ( 3, 0.07) int -> rdx "CSE - conservative"
+; V73 cse4 [V73,T64] ( 3, 0.07) int -> rdx "CSE - conservative"
; V74 cse5 [V74,T22] ( 3, 257.12) int -> rcx "CSE - moderate"
; V75 cse6 [V75,T29] ( 3, 42.88) int -> rcx "CSE - moderate"
; V76 cse7 [V76,T48] ( 3, 7.15) int -> rcx "CSE - conservative"
; V77 cse8 [V77,T52] ( 3, 1.67) int -> rcx "CSE - conservative"
; V78 cse9 [V78,T31] ( 2, 15.29) int -> r15 hoist "CSE - aggressive"
-; V79 cse10 [V79,T25] ( 7, 191.47) int -> r13 hoist "CSE - moderate"
+; V79 cse10 [V79,T25] ( 8, 191.47) int -> r13 hoist "CSE - moderate"
; V80 cse11 [V80,T21] ( 9, 264.53) int -> registers multi-def "CSE - moderate"
; V81 cse12 [V81,T26] ( 6, 102.90) int -> registers hoist multi-def "CSE - moderate"
; V82 cse13 [V82,T27] ( 6, 102.90) int -> [rsp+0x3C] hoist multi-def "CSE - moderate"
@@ -121,22 +121,22 @@ G_M23463_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov rbx, gword ptr [rsp+0x248]
; gcrRegs +[rbx]
;; size=112 bbWeight=1 PerfScore 18.83
-G_M23463_IG02: ; bbWeight=1, gcVars=00000000000000020000000000000000 {V02}, gcrefRegs=00E8 {rbx rbp rsi rdi}, byrefRegs=0000 {}, gcvars, byref
- ; GC ptr vars +{V02 V65}
+G_M23463_IG02: ; bbWeight=1, gcVars=00000000000000040000000000000000 {V02}, gcrefRegs=00E8 {rbx rbp rsi rdi}, byrefRegs=0000 {}, gcvars, byref
+ ; GC ptr vars +{V02 V66}
mov r15d, dword ptr [rbx+0x08]
mov r13d, dword ptr [rsi+0x08]
mov r14, gword ptr [rsp+0x260]
; gcrRegs +[r14]
- jmp G_M23463_IG09
+ jmp G_M23463_IG10
;; size=21 bbWeight=1 PerfScore 7.00
G_M23463_IG03: ; bbWeight=0.02, gcVars=00000000000000000020000000000000 {V70}, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=1400 {r10 r12}, gcvars, byref, isz
; byrRegs +[r10 r12]
- ; GC ptr vars -{V02 V65} +{V53 V70}
+ ; GC ptr vars -{V02 V66} +{V53 V70}
xor ecx, ecx
mov dword ptr [r10], ecx
mov ecx, dword ptr [rbx+0x14]
cmp ecx, dword ptr [rsi+0x14]
- jl SHORT G_M23463_IG05
+ jl SHORT G_M23463_IG06
;; size=13 bbWeight=0.02 PerfScore 0.16
G_M23463_IG04: ; bbWeight=0.02, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=1400 {r10 r12}, byref, isz
lea rcx, bword ptr [rbx+0x10]
@@ -145,11 +145,26 @@ G_M23463_IG04: ; bbWeight=0.02, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byr
inc edx
mov dword ptr [rcx], edx
cmp edx, dword ptr [rsi+0x10]
- jge G_M23463_IG27
+ jge G_M23463_IG28
jmp SHORT G_M23463_IG03
;; size=21 bbWeight=0.02 PerfScore 0.21
-G_M23463_IG05: ; bbWeight=0.09, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=1000 {r12}, byref
- ; byrRegs -[rcx r10]
+G_M23463_IG05: ; bbWeight=0.01, gcVars=00000000000000000000000000000000 {}, gcrefRegs=40C0 {rsi rdi r14}, byrefRegs=0000 {}, gcvars, byref, isz
+ ; gcrRegs -[rbx rbp]
+ ; byrRegs -[rcx r10 r12]
+ ; GC ptr vars -{V53 V70}
+ mov ecx, edx
+ lea rcx, bword ptr [rsi+4*rcx+0x10]
+ ; byrRegs +[rcx]
+ dec dword ptr [rcx]
+ inc edx
+ cmp edx, 8
+ jge G_M23463_IG30
+ jmp SHORT G_M23463_IG05
+ ;; size=22 bbWeight=0.01 PerfScore 0.08
+G_M23463_IG06: ; bbWeight=0.09, gcVars=00000000000000000020000000000000 {V70}, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=1000 {r12}, gcvars, byref
+ ; gcrRegs +[rbx rbp]
+ ; byrRegs -[rcx] +[r12]
+ ; GC ptr vars +{V53 V70}
mov r8d, dword ptr [rbx+0x10]
mov ecx, dword ptr [rbx+0x14]
mov edx, dword ptr [rsi+0x18]
@@ -158,12 +173,12 @@ G_M23463_IG05: ; bbWeight=0.09, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byr
sub r8d, r9d
mov r9d, dword ptr [rdi+0x10]
cmp r8d, r9d
- jae G_M23463_IG26
+ jae G_M23463_IG27
mov r9d, dword ptr [rdi+0x14]
imul r8d, r9d
sub ecx, dword ptr [rdi+0x1C]
cmp ecx, r9d
- jae G_M23463_IG26
+ jae G_M23463_IG27
add r8d, ecx
lea rcx, bword ptr [rdi+8*r8+0x20]
; byrRegs +[rcx]
@@ -190,9 +205,9 @@ G_M23463_IG05: ; bbWeight=0.09, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byr
mov dword ptr [rdx], ecx
mov ecx, dword ptr [rbx+0x18]
cmp ecx, dword ptr [rsi+0x18]
- jl G_M23463_IG15
+ jl G_M23463_IG16
;; size=135 bbWeight=0.09 PerfScore 3.37
-G_M23463_IG06: ; bbWeight=0.10, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=1000 {r12}, byref
+G_M23463_IG07: ; bbWeight=0.10, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=1000 {r12}, byref
; byrRegs -[rdx]
lea r10, bword ptr [rbx+0x14]
; byrRegs +[r10]
@@ -202,43 +217,43 @@ G_M23463_IG06: ; bbWeight=0.10, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byr
inc ecx
mov dword ptr [r8], ecx
cmp ecx, dword ptr [rsi+0x14]
- jl G_M23463_IG05
+ jl G_M23463_IG06
;; size=24 bbWeight=0.10 PerfScore 0.79
-G_M23463_IG07: ; bbWeight=0.01, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=1400 {r10 r12}, byref
+G_M23463_IG08: ; bbWeight=0.01, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=1400 {r10 r12}, byref
; byrRegs -[r8]
jmp G_M23463_IG04
;; size=5 bbWeight=0.01 PerfScore 0.02
-G_M23463_IG08: ; bbWeight=14.29, gcVars=00000000000000000000000000000000 {}, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, gcvars, byref
+G_M23463_IG09: ; bbWeight=14.29, gcVars=00000000000000000000000000000000 {}, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[r10 r12]
; GC ptr vars -{V53 V70}
xor r8d, r8d
mov dword ptr [rbx+0x24], r8d
;; size=7 bbWeight=14.29 PerfScore 17.87
-G_M23463_IG09: ; bbWeight=14.29, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
+G_M23463_IG10: ; bbWeight=14.29, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
cmp r15d, 5
- jbe G_M23463_IG26
+ jbe G_M23463_IG27
mov r8d, dword ptr [rbx+0x24]
cmp r13d, 5
- jbe G_M23463_IG26
+ jbe G_M23463_IG27
cmp r8d, dword ptr [rsi+0x24]
- jge G_M23463_IG13
+ jge G_M23463_IG14
;; size=34 bbWeight=14.29 PerfScore 121.49
-G_M23463_IG10: ; bbWeight=12.25, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
+G_M23463_IG11: ; bbWeight=12.25, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
mov r12d, dword ptr [rdi+0x18]
mov eax, dword ptr [rdi+0x10]
;; size=7 bbWeight=12.25 PerfScore 49.00
-G_M23463_IG11: ; bbWeight=85.71, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
+G_M23463_IG12: ; bbWeight=85.71, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
mov r8d, dword ptr [rbx+0x10]
mov ecx, dword ptr [rbx+0x14]
sub r8d, r12d
mov dword ptr [rsp+0x3C], eax
cmp r8d, eax
- jae G_M23463_IG26
+ jae G_M23463_IG27
mov r10d, dword ptr [rdi+0x14]
imul r8d, r10d
sub ecx, dword ptr [rdi+0x1C]
cmp ecx, r10d
- jae G_M23463_IG26
+ jae G_M23463_IG27
add r8d, ecx
mov r8, gword ptr [rdi+8*r8+0x20]
; gcrRegs +[r8]
@@ -246,30 +261,30 @@ G_M23463_IG11: ; bbWeight=85.71, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, by
mov edx, dword ptr [rbx+0x1C]
sub ecx, dword ptr [r8+0x18]
cmp ecx, dword ptr [r8+0x10]
- jae G_M23463_IG26
+ jae G_M23463_IG27
mov r10d, dword ptr [r8+0x14]
imul ecx, r10d
sub edx, dword ptr [r8+0x1C]
cmp edx, r10d
- jae G_M23463_IG26
+ jae G_M23463_IG27
add ecx, edx
mov r8, gword ptr [r8+8*rcx+0x20]
mov ecx, dword ptr [rbx+0x20]
mov edx, dword ptr [rbx+0x24]
cmp r13d, 6
- jbe G_M23463_IG26
+ jbe G_M23463_IG27
mov r10d, dword ptr [rsi+0x28]
cmp r13d, 7
- jbe G_M23463_IG26
+ jbe G_M23463_IG27
mov r9d, dword ptr [rsi+0x2C]
sub ecx, dword ptr [r8+0x18]
cmp ecx, dword ptr [r8+0x10]
- jae G_M23463_IG26
+ jae G_M23463_IG27
mov r11d, dword ptr [r8+0x14]
imul ecx, r11d
sub edx, dword ptr [r8+0x1C]
cmp edx, r11d
- jae G_M23463_IG26
+ jae G_M23463_IG27
add ecx, edx
lea rcx, bword ptr [r8+8*rcx+0x20]
; byrRegs +[rcx]
@@ -292,7 +307,7 @@ G_M23463_IG11: ; bbWeight=85.71, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, by
; gcrRegs -[rax rdx]
; byrRegs -[rcx]
;; size=228 bbWeight=85.71 PerfScore 6235.15
-G_M23463_IG12: ; bbWeight=85.71, extend
+G_M23463_IG13: ; bbWeight=85.71, extend
lea r8, bword ptr [rbx+0x24]
; byrRegs +[r8]
mov ecx, dword ptr [r8]
@@ -300,9 +315,9 @@ G_M23463_IG12: ; bbWeight=85.71, extend
mov dword ptr [r8], ecx
cmp ecx, dword ptr [rsi+0x24]
mov eax, dword ptr [rsp+0x3C]
- jl G_M23463_IG11
+ jl G_M23463_IG12
;; size=25 bbWeight=85.71 PerfScore 749.93
-G_M23463_IG13: ; bbWeight=14.29, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
+G_M23463_IG14: ; bbWeight=14.29, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
; byrRegs -[r8]
lea r8, bword ptr [rbx+0x20]
; byrRegs +[r8]
@@ -310,15 +325,15 @@ G_M23463_IG13: ; bbWeight=14.29, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, by
inc ecx
mov dword ptr [r8], ecx
cmp ecx, dword ptr [rsi+0x20]
- jl G_M23463_IG08
+ jl G_M23463_IG09
;; size=21 bbWeight=14.29 PerfScore 110.77
-G_M23463_IG14: ; bbWeight=2.04, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
+G_M23463_IG15: ; bbWeight=2.04, gcrefRegs=40E8 {rbx rbp rsi rdi r14}, byrefRegs=0000 {}, byref
; byrRegs -[r8]
...
libraries.pmi.windows.x64.checked.mch
-14 (-17.72%) : 100147.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint
@@ -7,9 +7,9 @@
; No matching PGO data
; Final local variable assignments
;
-; V00 loc0 [V00,T02] ( 3, 10 ) ref -> rbx class-hnd exact single-def <uint[]>
-; V01 loc1 [V01,T00] ( 7, 49 ) int -> rsi
-; V02 loc2 [V02,T01] ( 2, 16 ) int -> rax
+; V00 loc0 [V00,T02] ( 3, 9.92) ref -> rbx class-hnd exact single-def <uint[]>
+; V01 loc1 [V01,T00] ( 6, 40.60) int -> rsi
+; V02 loc2 [V02,T01] ( 2, 15.84) int -> rax
; V03 OutArgs [V03 ] ( 1, 1 ) struct (32) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;
; Lcl frame size = 40
@@ -29,19 +29,17 @@ G_M39919_IG02: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
; gcrRegs +[rbx]
xor esi, esi
;; size=25 bbWeight=1 PerfScore 2.00
-G_M39919_IG03: ; bbWeight=8, gcrefRegs=0008 {rbx}, byrefRegs=0000 {}, byref, isz
+G_M39919_IG03: ; bbWeight=7.92, gcrefRegs=0008 {rbx}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rax]
mov ecx, esi
call [Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:CalcEntry(uint):uint]
; gcr arg pop 0
- cmp esi, 256
- jae SHORT G_M39919_IG06
mov ecx, esi
mov dword ptr [rbx+4*rcx+0x10], eax
inc esi
cmp esi, 255
jbe SHORT G_M39919_IG03
- ;; size=32 bbWeight=8 PerfScore 58.00
+ ;; size=24 bbWeight=7.92 PerfScore 47.52
G_M39919_IG04: ; bbWeight=1, gcrefRegs=0008 {rbx}, byrefRegs=0000 {}, byref
mov rax, rbx
; gcrRegs +[rax]
@@ -52,14 +50,8 @@ G_M39919_IG05: ; bbWeight=1, epilog, nogc, extend
pop rsi
ret
;; size=7 bbWeight=1 PerfScore 2.25
-G_M39919_IG06: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
- ; gcrRegs -[rax rbx]
- call CORINFO_HELP_RNGCHKFAIL
- ; gcr arg pop 0
- int3
- ;; size=6 bbWeight=0 PerfScore 0.00
-; Total bytes of code 79, prolog size 6, PerfScore 64.75, instruction count 24, allocated bytes for code 79 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
+; Total bytes of code 65, prolog size 6, PerfScore 54.27, instruction count 20, allocated bytes for code 65 (MethodHash=b75d6410) for method Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
; ============================================================
Unwind Info:
libraries_tests.run.windows.x64.Release.mch
-59 (-1.88%) : 284950.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
@@ -16,10 +16,10 @@
; V03 loc0 [V03,T51] ( 8, 300 ) ref -> rdi class-hnd exact <System.Collections.Generic.List`1[ushort]>
;* V04 loc1 [V04 ] ( 0, 0 ) ushort -> zero-ref
;* V05 loc2 [V05 ] ( 0, 0 ) ushort -> zero-ref
-; V06 loc3 [V06,T91] ( 6, 0.15) ref -> [rsp+0x260] class-hnd tier0-frame <int[]>
-; V07 loc4 [V07,T90] ( 10, 0.30) int -> r12
-; V08 loc5 [V08,T52] ( 5, 292.89) int -> rbp
-; V09 loc6 [V09,T86] ( 9, 16.71) int -> r13
+; V06 loc3 [V06,T92] ( 2, 0.08) ref -> [rsp+0x260] class-hnd tier0-frame <int[]>
+; V07 loc4 [V07,T90] ( 5, 0.19) int -> r12
+; V08 loc5 [V08,T52] ( 4, 292.89) int -> rbp
+; V09 loc6 [V09,T86] ( 8, 16.71) int -> r13
; V10 loc7 [V10,T54] ( 5, 200 ) ushort -> r14
; V11 loc8 [V11,T55] ( 4, 197.62) ushort -> r15
; V12 loc9 [V12,T10] ( 8, 590.47) int -> rsi
@@ -28,13 +28,13 @@
; V15 loc12 [V15,T65] ( 2, 195.24) int -> [rsp+0x23C] spill-single-def tier0-frame
; V16 loc13 [V16,T66] ( 2, 195.24) int -> [rsp+0x238] spill-single-def tier0-frame
; V17 loc14 [V17 ] ( 83, 6346.18) struct (40) [rsp+0x210] do-not-enreg[XS] addr-exposed ld-addr-op tier0-frame <System.Runtime.CompilerServices.DefaultInterpolatedStringHandler>
-; V18 loc15 [V18,T94] ( 3, 0 ) ref -> rbx class-hnd <int[]>
-; V19 loc16 [V19,T93] ( 5, 0 ) int -> rsi
-; V20 loc17 [V20,T92] ( 6, 0 ) ref -> rbp class-hnd exact <System.Globalization.Tests.CompareInfoCompareTests+<>c__DisplayClass11_0>
+; V18 loc15 [V18,T95] ( 3, 0 ) ref -> rbx class-hnd <int[]>
+; V19 loc16 [V19,T94] ( 5, 0 ) int -> rsi
+; V20 loc17 [V20,T93] ( 6, 0 ) ref -> rbp class-hnd exact <System.Globalization.Tests.CompareInfoCompareTests+<>c__DisplayClass11_0>
; V21 OutArgs [V21 ] ( 1, 1 ) struct (48) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V22 tmp1 [V22 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Collections.Generic.List`1[ushort]>
;* V23 tmp2 [V23 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Globalization.Tests.CompareInfoCompareTests+<>c__DisplayClass11_0>
-; V24 tmp3 [V24,T95] ( 3, 0 ) ref -> r14 class-hnd exact "NewObj constructor temp" <System.Func`1[System.Object]>
+; V24 tmp3 [V24,T96] ( 3, 0 ) ref -> r14 class-hnd exact "NewObj constructor temp" <System.Func`1[System.Object]>
;* V25 tmp4 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
;* V26 tmp5 [V26 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V27 tmp6 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
@@ -687,12 +687,13 @@
;* V674 tmp653 [V674 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
;* V675 tmp654 [V675 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
;* V676 tmp655 [V676 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
-; V677 tmp656 [V677,T97] ( 3, 0 ) struct ( 8) [rsp+0xA0] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
+; V677 tmp656 [V677,T98] ( 3, 0 ) struct ( 8) [rsp+0xA0] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
; V678 tmp657 [V678,T87] ( 3, 14.29) ref -> rcx "arr expr"
-; V679 tmp658 [V679,T96] ( 3, 0 ) ref -> rcx "arr expr"
-; V680 cse0 [V680,T88] ( 5, 7.18) int -> rcx "CSE - conservative"
-; V681 cse1 [V681,T00] ( 27,98399.10) ref -> rdx multi-def "CSE - aggressive"
-; V682 cse2 [V682,T21] ( 10, 488.09) ref -> [rsp+0x30] multi-def "CSE - moderate"
+; V679 tmp658 [V679,T97] ( 3, 0 ) ref -> rcx "arr expr"
+; V680 cse0 [V680,T91] ( 3, 0.11) int -> rdx "CSE - conservative"
+; V681 cse1 [V681,T88] ( 4, 7.18) int -> rcx "CSE - conservative"
+; V682 cse2 [V682,T00] ( 27,98399.10) ref -> rdx multi-def "CSE - aggressive"
+; V683 cse3 [V683,T21] ( 10, 488.09) ref -> [rsp+0x30] multi-def "CSE - moderate"
;
; Lcl frame size = 296
@@ -724,17 +725,17 @@ G_M28013_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov r15d, dword ptr [rsp+0x24C]
mov esi, dword ptr [rsp+0x248]
;; size=178 bbWeight=1 PerfScore 33.83
-G_M28013_IG02: ; bbWeight=1, gcVars=00000000080000000000000000000000 {V06}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG02: ; bbWeight=1, gcVars=00000000100000000000000000000000 {V06}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
; GC ptr vars +{V06}
jmp SHORT G_M28013_IG04
;; size=2 bbWeight=1 PerfScore 2.00
G_M28013_IG03: ; bbWeight=2.38, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp r13d, ecx
- jae G_M28013_IG69
+ jae G_M28013_IG64
mov rcx, gword ptr [rdi+0x08]
; gcrRegs +[rcx]
cmp r13d, dword ptr [rcx+0x08]
- jae G_M28013_IG45
+ jae G_M28013_IG40
mov edx, r13d
movzx r14, word ptr [rcx+2*rdx+0x10]
lea ecx, [r14+0x60]
@@ -748,11 +749,11 @@ G_M28013_IG04: ; bbWeight=2.38, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
;; size=9 bbWeight=2.38 PerfScore 9.53
G_M28013_IG05: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp esi, dword ptr [rdi+0x10]
- jae G_M28013_IG69
+ jae G_M28013_IG64
mov rcx, gword ptr [rdi+0x08]
; gcrRegs +[rcx]
cmp esi, dword ptr [rcx+0x08]
- jae G_M28013_IG45
+ jae G_M28013_IG40
mov edx, esi
movzx r8, word ptr [rcx+2*rdx+0x10]
mov dword ptr [rsp+0x244], r8d
@@ -827,7 +828,7 @@ G_M28013_IG06: ; bbWeight=97.62, isz, extend
; gcr arg pop 0
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov eax, ecx
@@ -841,7 +842,7 @@ G_M28013_IG06: ; bbWeight=97.62, isz, extend
test r8d, r8d
jge SHORT G_M28013_IG08
;; size=72 bbWeight=97.62 PerfScore 1293.44
-G_M28013_IG07: ; bbWeight=1561.89, gcVars=00000000080000000000000008000000 {V06 V33}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG07: ; bbWeight=1561.89, gcVars=00000000100000000000000008000000 {V06 V33}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rax rdx]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -853,7 +854,7 @@ G_M28013_IG07: ; bbWeight=1561.89, gcVars=0000000008000000000000000800000
;; size=19 bbWeight=1561.89 PerfScore 5466.62
G_M28013_IG08: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp dword ptr [rsp+0x124], 15
- jb G_M28013_IG46
+ jb G_M28013_IG41
mov rcx, 0xD1FFAB1E
; byrRegs +[rcx]
mov rdx, bword ptr [rsp+0x98]
@@ -868,14 +869,14 @@ G_M28013_IG08: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
mov dword ptr [rsp+0x220], ecx
mov dword ptr [rsp+0x120], r14d
cmp byte ptr [rsp+0x224], 0
- jne G_M28013_IG41
+ jne G_M28013_IG39
;; size=89 bbWeight=97.62 PerfScore 2196.41
-G_M28013_IG09: ; bbWeight=97.62, gcVars=00000000080000000000000000000000 {V06}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG09: ; bbWeight=97.62, gcVars=00000000100000000000000000000000 {V06}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
; byrRegs -[rdx]
; GC ptr vars -{V33}
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov r8d, ecx
@@ -889,7 +890,7 @@ G_M28013_IG09: ; bbWeight=97.62, gcVars=00000000080000000000000000000000
test r10d, r10d
jge SHORT G_M28013_IG11
;; size=67 bbWeight=97.62 PerfScore 1000.59
-G_M28013_IG10: ; bbWeight=6247.56, gcVars=00000000080000000000000020000000 {V06 V49}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG10: ; bbWeight=6247.56, gcVars=00000000100000000000000020000000 {V06 V49}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rdx r8]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -906,7 +907,7 @@ G_M28013_IG11: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
mov rax, 0xD1FFAB1E
; gcrRegs +[rax]
mov gword ptr [rsp+0x30], rax
- ; GC ptr vars +{V682}
+ ; GC ptr vars +{V683}
lea r9, bword ptr [rax+0x0C]
; byrRegs +[r9]
mov rdx, gword ptr [rsp+0x210]
@@ -932,7 +933,7 @@ G_M28013_IG11: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
; gcrRegs -[rax r9]
; gcr arg pop 0
test eax, eax
- je G_M28013_IG49
+ je G_M28013_IG44
mov ecx, dword ptr [rsp+0x220]
add ecx, dword ptr [rsp+0x118]
mov dword ptr [rsp+0x220], ecx
@@ -940,7 +941,7 @@ G_M28013_IG11: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
G_M28013_IG12: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref, isz
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov eax, ecx
@@ -954,7 +955,7 @@ G_M28013_IG12: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
test r8d, r8d
jge SHORT G_M28013_IG14
;; size=66 bbWeight=97.62 PerfScore 1000.59
-G_M28013_IG13: ; bbWeight=1561.89, gcVars=00000000080000000000000080200000 {V06 V134 V682}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG13: ; bbWeight=1561.89, gcVars=00000000100000000000000080200000 {V06 V134 V683}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rax rdx]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -966,7 +967,7 @@ G_M28013_IG13: ; bbWeight=1561.89, gcVars=0000000008000000000000008020000
;; size=19 bbWeight=1561.89 PerfScore 5466.62
G_M28013_IG14: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp dword ptr [rsp+0x110], 2
- jb G_M28013_IG50
+ jb G_M28013_IG45
mov rcx, 0xD1FFAB1E
; byrRegs +[rcx]
mov rax, bword ptr [rsp+0x88]
@@ -981,13 +982,13 @@ G_M28013_IG14: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
; byrRegs -[rax]
mov dword ptr [rsp+0x10C], eax
cmp byte ptr [rsp+0x224], 0
- jne G_M28013_IG40
+ jne G_M28013_IG38
;; size=81 bbWeight=97.62 PerfScore 1415.46
-G_M28013_IG15: ; bbWeight=97.62, gcVars=00000000080000000000000000200000 {V06 V682}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG15: ; bbWeight=97.62, gcVars=00000000100000000000000000200000 {V06 V683}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
; GC ptr vars -{V134}
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov eax, ecx
@@ -1001,7 +1002,7 @@ G_M28013_IG15: ; bbWeight=97.62, gcVars=00000000080000000000000000200000
test r10d, r10d
jge SHORT G_M28013_IG17
;; size=66 bbWeight=97.62 PerfScore 1000.59
-G_M28013_IG16: ; bbWeight=6247.56, gcVars=00000000080000000000000200200000 {V06 V150 V682}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG16: ; bbWeight=6247.56, gcVars=00000000100000000000000200200000 {V06 V150 V683}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rax rdx]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -1042,7 +1043,7 @@ G_M28013_IG17: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
; gcrRegs -[rax r9]
; gcr arg pop 0
test eax, eax
- je G_M28013_IG53
+ je G_M28013_IG48
mov ecx, dword ptr [rsp+0x220]
add ecx, dword ptr [rsp+0x100]
mov dword ptr [rsp+0x220], ecx
@@ -1050,7 +1051,7 @@ G_M28013_IG17: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
G_M28013_IG18: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref, isz
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov eax, ecx
@@ -1064,7 +1065,7 @@ G_M28013_IG18: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
test r8d, r8d
jge SHORT G_M28013_IG20
;; size=63 bbWeight=97.62 PerfScore 1000.59
-G_M28013_IG19: ; bbWeight=1561.89, gcVars=00000000080000000000000800200000 {V06 V235 V682}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG19: ; bbWeight=1561.89, gcVars=00000000100000000000000800200000 {V06 V235 V683}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rax rdx]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -1076,7 +1077,7 @@ G_M28013_IG19: ; bbWeight=1561.89, gcVars=0000000008000000000000080020000
;; size=19 bbWeight=1561.89 PerfScore 5466.62
G_M28013_IG20: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp dword ptr [rsp+0xF8], 13
- jb G_M28013_IG54
+ jb G_M28013_IG49
mov rcx, 0xD1FFAB1E
; byrRegs +[rcx]
mov rdx, bword ptr [rsp+0x78]
@@ -1091,14 +1092,14 @@ G_M28013_IG20: ; bbWeight=97.62, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
mov dword ptr [rsp+0x220], ecx
...
-59 (-1.88%) : 282564.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
@@ -16,10 +16,10 @@
; V03 loc0 [V03,T51] ( 8, 300.00) ref -> rdi class-hnd exact <System.Collections.Generic.List`1[ushort]>
;* V04 loc1 [V04 ] ( 0, 0 ) ushort -> zero-ref
;* V05 loc2 [V05 ] ( 0, 0 ) ushort -> zero-ref
-; V06 loc3 [V06,T91] ( 6, 0.15) ref -> [rsp+0x260] class-hnd tier0-frame <int[]>
-; V07 loc4 [V07,T90] ( 10, 0.30) int -> r12
-; V08 loc5 [V08,T52] ( 5, 292.87) int -> rbp
-; V09 loc6 [V09,T86] ( 9, 16.75) int -> r13
+; V06 loc3 [V06,T92] ( 2, 0.08) ref -> [rsp+0x260] class-hnd tier0-frame <int[]>
+; V07 loc4 [V07,T90] ( 5, 0.19) int -> r12
+; V08 loc5 [V08,T52] ( 4, 292.87) int -> rbp
+; V09 loc6 [V09,T86] ( 8, 16.75) int -> r13
; V10 loc7 [V10,T54] ( 5, 200.00) ushort -> r14
; V11 loc8 [V11,T55] ( 4, 197.61) ushort -> r15
; V12 loc9 [V12,T10] ( 8, 590.45) int -> rsi
@@ -28,13 +28,13 @@
; V15 loc12 [V15,T65] ( 2, 195.22) int -> [rsp+0x23C] spill-single-def tier0-frame
; V16 loc13 [V16,T66] ( 2, 195.22) int -> [rsp+0x238] spill-single-def tier0-frame
; V17 loc14 [V17 ] ( 83, 6345.80) struct (40) [rsp+0x210] do-not-enreg[XS] addr-exposed ld-addr-op tier0-frame <System.Runtime.CompilerServices.DefaultInterpolatedStringHandler>
-; V18 loc15 [V18,T94] ( 3, 0 ) ref -> rbx class-hnd <int[]>
-; V19 loc16 [V19,T93] ( 5, 0 ) int -> rsi
-; V20 loc17 [V20,T92] ( 6, 0 ) ref -> rbp class-hnd exact <System.Globalization.Tests.CompareInfoCompareTests+<>c__DisplayClass11_0>
+; V18 loc15 [V18,T95] ( 3, 0 ) ref -> rbx class-hnd <int[]>
+; V19 loc16 [V19,T94] ( 5, 0 ) int -> rsi
+; V20 loc17 [V20,T93] ( 6, 0 ) ref -> rbp class-hnd exact <System.Globalization.Tests.CompareInfoCompareTests+<>c__DisplayClass11_0>
; V21 OutArgs [V21 ] ( 1, 1 ) struct (48) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V22 tmp1 [V22 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Collections.Generic.List`1[ushort]>
;* V23 tmp2 [V23 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <System.Globalization.Tests.CompareInfoCompareTests+<>c__DisplayClass11_0>
-; V24 tmp3 [V24,T95] ( 3, 0 ) ref -> r14 class-hnd exact "NewObj constructor temp" <System.Func`1[System.Object]>
+; V24 tmp3 [V24,T96] ( 3, 0 ) ref -> r14 class-hnd exact "NewObj constructor temp" <System.Func`1[System.Object]>
;* V25 tmp4 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
;* V26 tmp5 [V26 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V27 tmp6 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline stloc first use temp" <<unknown class>>
@@ -687,12 +687,13 @@
;* V674 tmp653 [V674 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
;* V675 tmp654 [V675 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
;* V676 tmp655 [V676 ] ( 0, 0 ) long -> zero-ref "Cast away GC"
-; V677 tmp656 [V677,T97] ( 3, 0 ) struct ( 8) [rsp+0xA0] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
+; V677 tmp656 [V677,T98] ( 3, 0 ) struct ( 8) [rsp+0xA0] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
; V678 tmp657 [V678,T87] ( 3, 14.33) ref -> rcx "arr expr"
-; V679 tmp658 [V679,T96] ( 3, 0 ) ref -> rcx "arr expr"
-; V680 cse0 [V680,T88] ( 5, 7.20) int -> rcx "CSE - conservative"
-; V681 cse1 [V681,T00] ( 27,98393.23) ref -> rdx multi-def "CSE - aggressive"
-; V682 cse2 [V682,T21] ( 10, 488.06) ref -> [rsp+0x30] multi-def "CSE - moderate"
+; V679 tmp658 [V679,T97] ( 3, 0 ) ref -> rcx "arr expr"
+; V680 cse0 [V680,T91] ( 3, 0.11) int -> rdx "CSE - conservative"
+; V681 cse1 [V681,T88] ( 4, 7.20) int -> rcx "CSE - conservative"
+; V682 cse2 [V682,T00] ( 27,98393.23) ref -> rdx multi-def "CSE - aggressive"
+; V683 cse3 [V683,T21] ( 10, 488.06) ref -> [rsp+0x30] multi-def "CSE - moderate"
;
; Lcl frame size = 296
@@ -724,17 +725,17 @@ G_M28013_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov r15d, dword ptr [rsp+0x24C]
mov esi, dword ptr [rsp+0x248]
;; size=178 bbWeight=1 PerfScore 33.83
-G_M28013_IG02: ; bbWeight=1, gcVars=00000000080000000000000000000000 {V06}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG02: ; bbWeight=1, gcVars=00000000100000000000000000000000 {V06}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
; GC ptr vars +{V06}
jmp SHORT G_M28013_IG04
;; size=2 bbWeight=1 PerfScore 2.00
G_M28013_IG03: ; bbWeight=2.39, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp r13d, ecx
- jae G_M28013_IG69
+ jae G_M28013_IG64
mov rcx, gword ptr [rdi+0x08]
; gcrRegs +[rcx]
cmp r13d, dword ptr [rcx+0x08]
- jae G_M28013_IG45
+ jae G_M28013_IG40
mov edx, r13d
movzx r14, word ptr [rcx+2*rdx+0x10]
lea ecx, [r14+0x60]
@@ -748,11 +749,11 @@ G_M28013_IG04: ; bbWeight=2.39, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
;; size=9 bbWeight=2.39 PerfScore 9.55
G_M28013_IG05: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp esi, dword ptr [rdi+0x10]
- jae G_M28013_IG69
+ jae G_M28013_IG64
mov rcx, gword ptr [rdi+0x08]
; gcrRegs +[rcx]
cmp esi, dword ptr [rcx+0x08]
- jae G_M28013_IG45
+ jae G_M28013_IG40
mov edx, esi
movzx r8, word ptr [rcx+2*rdx+0x10]
mov dword ptr [rsp+0x244], r8d
@@ -827,7 +828,7 @@ G_M28013_IG06: ; bbWeight=97.61, isz, extend
; gcr arg pop 0
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov eax, ecx
@@ -841,7 +842,7 @@ G_M28013_IG06: ; bbWeight=97.61, isz, extend
test r8d, r8d
jge SHORT G_M28013_IG08
;; size=72 bbWeight=97.61 PerfScore 1293.36
-G_M28013_IG07: ; bbWeight=1561.80, gcVars=00000000080000000000000008000000 {V06 V33}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG07: ; bbWeight=1561.80, gcVars=00000000100000000000000008000000 {V06 V33}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rax rdx]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -853,7 +854,7 @@ G_M28013_IG07: ; bbWeight=1561.80, gcVars=0000000008000000000000000800000
;; size=19 bbWeight=1561.80 PerfScore 5466.29
G_M28013_IG08: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp dword ptr [rsp+0x124], 15
- jb G_M28013_IG46
+ jb G_M28013_IG41
mov rcx, 0xD1FFAB1E
; byrRegs +[rcx]
mov rdx, bword ptr [rsp+0x98]
@@ -868,14 +869,14 @@ G_M28013_IG08: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
mov dword ptr [rsp+0x220], ecx
mov dword ptr [rsp+0x120], r14d
cmp byte ptr [rsp+0x224], 0
- jne G_M28013_IG41
+ jne G_M28013_IG39
;; size=89 bbWeight=97.61 PerfScore 2196.28
-G_M28013_IG09: ; bbWeight=97.61, gcVars=00000000080000000000000000000000 {V06}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG09: ; bbWeight=97.61, gcVars=00000000100000000000000000000000 {V06}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
; byrRegs -[rdx]
; GC ptr vars -{V33}
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov r8d, ecx
@@ -889,7 +890,7 @@ G_M28013_IG09: ; bbWeight=97.61, gcVars=00000000080000000000000000000000
test r10d, r10d
jge SHORT G_M28013_IG11
;; size=67 bbWeight=97.61 PerfScore 1000.53
-G_M28013_IG10: ; bbWeight=6247.19, gcVars=00000000080000000000000020000000 {V06 V49}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG10: ; bbWeight=6247.19, gcVars=00000000100000000000000020000000 {V06 V49}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rdx r8]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -906,7 +907,7 @@ G_M28013_IG11: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
mov rax, 0xD1FFAB1E
; gcrRegs +[rax]
mov gword ptr [rsp+0x30], rax
- ; GC ptr vars +{V682}
+ ; GC ptr vars +{V683}
lea r9, bword ptr [rax+0x0C]
; byrRegs +[r9]
mov rdx, gword ptr [rsp+0x210]
@@ -932,7 +933,7 @@ G_M28013_IG11: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
; gcrRegs -[rax r9]
; gcr arg pop 0
test eax, eax
- je G_M28013_IG49
+ je G_M28013_IG44
mov ecx, dword ptr [rsp+0x220]
add ecx, dword ptr [rsp+0x118]
mov dword ptr [rsp+0x220], ecx
@@ -940,7 +941,7 @@ G_M28013_IG11: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
G_M28013_IG12: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref, isz
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov eax, ecx
@@ -954,7 +955,7 @@ G_M28013_IG12: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
test r8d, r8d
jge SHORT G_M28013_IG14
;; size=66 bbWeight=97.61 PerfScore 1000.53
-G_M28013_IG13: ; bbWeight=1561.80, gcVars=00000000080000000000000080200000 {V06 V134 V682}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG13: ; bbWeight=1561.80, gcVars=00000000100000000000000080200000 {V06 V134 V683}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rax rdx]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -966,7 +967,7 @@ G_M28013_IG13: ; bbWeight=1561.80, gcVars=0000000008000000000000008020000
;; size=19 bbWeight=1561.80 PerfScore 5466.29
G_M28013_IG14: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp dword ptr [rsp+0x110], 2
- jb G_M28013_IG50
+ jb G_M28013_IG45
mov rcx, 0xD1FFAB1E
; byrRegs +[rcx]
mov rax, bword ptr [rsp+0x88]
@@ -981,13 +982,13 @@ G_M28013_IG14: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
; byrRegs -[rax]
mov dword ptr [rsp+0x10C], eax
cmp byte ptr [rsp+0x224], 0
- jne G_M28013_IG40
+ jne G_M28013_IG38
;; size=81 bbWeight=97.61 PerfScore 1415.38
-G_M28013_IG15: ; bbWeight=97.61, gcVars=00000000080000000000000000200000 {V06 V682}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
+G_M28013_IG15: ; bbWeight=97.61, gcVars=00000000100000000000000000200000 {V06 V683}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref, isz
; GC ptr vars -{V134}
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov eax, ecx
@@ -1001,7 +1002,7 @@ G_M28013_IG15: ; bbWeight=97.61, gcVars=00000000080000000000000000200000
test r10d, r10d
jge SHORT G_M28013_IG17
;; size=66 bbWeight=97.61 PerfScore 1000.53
-G_M28013_IG16: ; bbWeight=6247.19, gcVars=00000000080000000000000200200000 {V06 V150 V682}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG16: ; bbWeight=6247.19, gcVars=00000000100000000000000200200000 {V06 V150 V683}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rax rdx]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -1042,7 +1043,7 @@ G_M28013_IG17: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
; gcrRegs -[rax r9]
; gcr arg pop 0
test eax, eax
- je G_M28013_IG53
+ je G_M28013_IG48
mov ecx, dword ptr [rsp+0x220]
add ecx, dword ptr [rsp+0x100]
mov dword ptr [rsp+0x220], ecx
@@ -1050,7 +1051,7 @@ G_M28013_IG17: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
G_M28013_IG18: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref, isz
mov ecx, dword ptr [rsp+0x220]
cmp ecx, dword ptr [rsp+0x230]
- ja G_M28013_IG63
+ ja G_M28013_IG58
mov rdx, bword ptr [rsp+0x228]
; byrRegs +[rdx]
mov eax, ecx
@@ -1064,7 +1065,7 @@ G_M28013_IG18: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
test r8d, r8d
jge SHORT G_M28013_IG20
;; size=63 bbWeight=97.61 PerfScore 1000.53
-G_M28013_IG19: ; bbWeight=1561.80, gcVars=00000000080000000000000800200000 {V06 V235 V682}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M28013_IG19: ; bbWeight=1561.80, gcVars=00000000100000000000000800200000 {V06 V235 V683}, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[rax rdx]
mov rdx, 0xD1FFAB1E
; gcrRegs +[rdx]
@@ -1076,7 +1077,7 @@ G_M28013_IG19: ; bbWeight=1561.80, gcVars=0000000008000000000000080020000
;; size=19 bbWeight=1561.80 PerfScore 5466.29
G_M28013_IG20: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref
cmp dword ptr [rsp+0xF8], 13
- jb G_M28013_IG54
+ jb G_M28013_IG49
mov rcx, 0xD1FFAB1E
; byrRegs +[rcx]
mov rdx, bword ptr [rsp+0x78]
@@ -1091,14 +1092,14 @@ G_M28013_IG20: ; bbWeight=97.61, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000
mov dword ptr [rsp+0x220], ecx
...
-70 (-1.70%) : 494165.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
@@ -11,11 +11,11 @@
;
; V00 this [V00,T04] ( 24, 10.48) ref -> rsi this class-hnd single-def <System.Text.StringBuilder>
; V01 arg1 [V01,T14] ( 16, 3.42) ref -> rdi class-hnd single-def <System.IFormatProvider>
-; V02 arg2 [V02,T02] ( 20, 15.42) ref -> rbx class-hnd single-def <System.String>
+; V02 arg2 [V02,T02] ( 18, 15.42) ref -> rbx class-hnd single-def <System.String>
; V03 arg3 [V03,T05] ( 4, 8 ) byref -> r9 ld-addr-op single-def
; V04 loc0 [V04,T43] ( 5, 2.11) ref -> r15 class-hnd single-def <System.ICustomFormatter>
-; V05 loc1 [V05,T00] ( 72, 35.60) int -> r13 ld-addr-op
-; V06 loc2 [V06,T01] ( 34, 18.77) ushort -> [rsp+0x134]
+; V05 loc1 [V05,T00] ( 62, 35.60) int -> r13 ld-addr-op
+; V06 loc2 [V06,T01] ( 30, 18.77) ushort -> [rsp+0x134]
; V07 loc3 [V07,T16] ( 12, 4.93) int -> [rsp+0x130]
; V08 loc4 [V08,T30] ( 5, 2.37) ubyte -> [rsp+0x12C]
;* V09 loc5 [V09 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.ReadOnlySpan`1[ushort]>
@@ -34,7 +34,7 @@
; V22 OutArgs [V22 ] ( 1, 1 ) struct (48) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
; V23 tmp1 [V23,T48] ( 4, 2.02) ref -> rdx
;* V24 tmp2 [V24 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.ReadOnlySpan`1[ushort]>
-; V25 tmp3 [V25,T87] ( 3, 0.34) ref -> r10
+; V25 tmp3 [V25,T87] ( 3, 0.34) ref -> r8
;* V26 tmp4 [V26 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Span`1[ushort]>
; V27 tmp5 [V27,T56] ( 2, 1.47) int -> r8 "impAppendStmt"
; V28 tmp6 [V28,T98] ( 3, 0.18) ref -> rdx "guarded devirt return temp"
@@ -46,7 +46,7 @@
;* V34 tmp12 [V34 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "guarded devirt this exact temp" <System.Int32>
; V35 tmp13 [V35,T54] ( 3, 1.57) ref -> rax "guarded devirt return temp"
;* V36 tmp14 [V36 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "guarded devirt this exact temp" <System.Int32>
-; V37 tmp15 [V37,T88] ( 3, 0.32) ref -> r10 "guarded devirt return temp"
+; V37 tmp15 [V37,T88] ( 3, 0.32) ref -> r8 "guarded devirt return temp"
;* V38 tmp16 [V38 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "guarded devirt this exact temp" <System.String>
;* V39 tmp17 [V39 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp" <System.ReadOnlySpan`1[ushort]>
;* V40 tmp18 [V40 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
@@ -263,7 +263,7 @@
; V251 cse3 [V251,T64] ( 3, 1.19) int -> r11 "CSE - conservative"
; V252 cse4 [V252,T67] ( 3, 1.11) ref -> rcx "CSE - conservative"
; V253 cse5 [V253,T90] ( 3, 0.26) long -> r9 "CSE - conservative"
-; V254 cse6 [V254,T03] ( 20, 13.60) int -> r12 "CSE - aggressive"
+; V254 cse6 [V254,T03] ( 18, 13.60) int -> r12 "CSE - aggressive"
; V255 cse7 [V255,T105] ( 2, 0.03) ref -> rdx "CSE - moderate"
; V256 rat0 [V256,T09] ( 5, 7.05) ref -> r15 class-hnd "replacement local" <System.ICustomFormatter>
; V257 rat1 [V257,T44] ( 6, 2.10) ref -> rcx class-hnd "replacement local" <System.ISpanFormattable>
@@ -330,7 +330,7 @@ G_M4730_IG06: ; bbWeight=1, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0
G_M4730_IG07: ; bbWeight=2.07, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref
mov r12d, dword ptr [rbx+0x08]
cmp r12d, r13d
- jbe G_M4730_IG81
+ jbe G_M4730_IG69
;; size=13 bbWeight=2.07 PerfScore 6.73
G_M4730_IG08: ; bbWeight=1.07, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref
mov ecx, r13d
@@ -383,11 +383,11 @@ G_M4730_IG08: ; bbWeight=1.07, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefReg
; gcr arg pop 0
mov dword ptr [rsp+0x118], eax
test eax, eax
- jl G_M4730_IG161
+ jl G_M4730_IG156
;; size=174 bbWeight=1.07 PerfScore 41.79
G_M4730_IG09: ; bbWeight=1.07, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref
cmp eax, dword ptr [rsp+0xCC]
- ja G_M4730_IG169
+ ja G_M4730_IG164
mov ecx, eax
not ecx
shr ecx, 31
@@ -444,11 +444,14 @@ G_M4730_IG14: ; bbWeight=0.03, gcVars=00000000000000000000000000000000 {}
G_M4730_IG15: ; bbWeight=0.00, gcVars=00000000000000002000000000000000 {V169}, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, gcvars, byref, isz
; gcrRegs -[rax]
; GC ptr vars +{V169}
+ lea edx, [rdx+4*rdx]
+ lea edx, [rax+2*rdx-0x30]
+ mov dword ptr [rsp+0x128], edx
inc r13d
cmp r12d, r13d
- jbe G_M4730_IG165
+ jbe G_M4730_IG160
jmp SHORT G_M4730_IG19
- ;; size=14 bbWeight=0.00 PerfScore 0.00
+ ;; size=28 bbWeight=0.00 PerfScore 0.03
G_M4730_IG16: ; bbWeight=0.09, gcVars=00000000000000000000000000000000 {}, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0020 {rbp}, gcvars, byref, isz
; gcrRegs -[r15]
; GC ptr vars -{V169}
@@ -471,15 +474,16 @@ G_M4730_IG18: ; bbWeight=0.09, gcrefRegs=00CC {rdx rbx rsi rdi}, byrefReg
; gcrRegs -[rax]
jmp G_M4730_IG04
;; size=5 bbWeight=0.09 PerfScore 0.18
-G_M4730_IG19: ; bbWeight=0.01, gcVars=00000000000000002000000000000000 {V169}, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, gcvars, byref, isz
+G_M4730_IG19: ; bbWeight=0.00, gcVars=00000000000000002000000000000000 {V169}, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, gcvars, byref
; gcrRegs -[rdx] +[r15]
; GC ptr vars +{V169}
mov ecx, r13d
movzx rax, word ptr [rbx+2*rcx+0x0C]
- cmp eax, 32
- je SHORT G_M4730_IG15
- jmp G_M4730_IG34
- ;; size=18 bbWeight=0.01 PerfScore 0.05
+ mov ecx, eax
+ mov eax, ecx
+ mov edx, dword ptr [rsp+0x128]
+ jmp G_M4730_IG32
+ ;; size=24 bbWeight=0.00 PerfScore 0.03
G_M4730_IG20: ; bbWeight=0.01, gcVars=00000000000000000000000000000000 {}, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0020 {rbp}, gcvars, byref, isz
; gcrRegs -[r15]
; GC ptr vars -{V169}
@@ -495,20 +499,15 @@ G_M4730_IG20: ; bbWeight=0.01, gcVars=00000000000000000000000000000000 {}
; gcrRegs +[rdx]
jmp SHORT G_M4730_IG18
;; size=31 bbWeight=0.01 PerfScore 0.04
-G_M4730_IG21: ; bbWeight=0.00, gcVars=00000000000000002000000000000000 {V169}, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, gcvars, byref, isz
+G_M4730_IG21: ; bbWeight=1.06, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref, isz
; gcrRegs -[rax rdx] +[r15]
- ; GC ptr vars +{V169}
- lea edx, [rdx+4*rdx]
- lea edx, [rax+2*rdx-0x30]
- mov dword ptr [rsp+0x128], edx
- inc r13d
- cmp r12d, r13d
- jbe G_M4730_IG165
+ cmp eax, 123
+ jne G_M4730_IG158
jmp SHORT G_M4730_IG27
- ;; size=28 bbWeight=0.00 PerfScore 0.03
+ ;; size=11 bbWeight=1.06 PerfScore 3.46
G_M4730_IG22: ; bbWeight=0.21, gcVars=00000000000000000000000000800000 {V179}, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0022 {rcx rbp}, gcvars, byref
; byrRegs +[rcx]
- ; GC ptr vars -{V169} +{V23 V179}
+ ; GC ptr vars +{V23 V179}
mov r9, bword ptr [rsp+0x48]
; byrRegs +[r9]
mov rdx, r9
@@ -518,13 +517,13 @@ G_M4730_IG22: ; bbWeight=0.21, gcVars=00000000000000000000000000800000 {V
; byrRegs -[rcx rdx r9]
; gcr arg pop 0
;; size=14 bbWeight=0.21 PerfScore 0.91
-G_M4730_IG23: ; bbWeight=0.43, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref, isz
+G_M4730_IG23: ; bbWeight=0.43, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref
mov eax, dword ptr [rsp+0x118]
mov r10d, eax
add r10d, dword ptr [rsp+0x114]
mov dword ptr [rsi+0x18], r10d
- jmp SHORT G_M4730_IG29
- ;; size=24 bbWeight=0.43 PerfScore 2.71
+ jmp G_M4730_IG29
+ ;; size=27 bbWeight=0.43 PerfScore 2.71
G_M4730_IG24: ; bbWeight=0.00, gcVars=00000000000000000000000000800000 {V179}, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0022 {rcx rbp}, gcvars, byref, isz
; byrRegs +[rcx]
; GC ptr vars +{V23 V179}
@@ -546,13 +545,39 @@ G_M4730_IG26: ; bbWeight=0.00, gcVars=00000000000000000000000000000000 {}
; GC ptr vars -{V23 V179}
jmp SHORT G_M4730_IG23
;; size=2 bbWeight=0.00 PerfScore 0.00
-G_M4730_IG27: ; bbWeight=0.00, gcVars=00000000000000002000000000000000 {V169}, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, gcvars, byref
+G_M4730_IG27: ; bbWeight=1.06, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref, isz
+ mov dword ptr [rsp+0x134], r8d
+ xor eax, eax
+ mov dword ptr [rsp+0x130], eax
+ xor edx, edx
+ mov dword ptr [rsp+0x12C], edx
+ xor r10, r10
+ ; byrRegs +[r10]
+ mov bword ptr [rsp+0x58], r10
; GC ptr vars +{V169}
- mov eax, r13d
- movzx rax, word ptr [rbx+2*rax+0x0C]
- mov edx, dword ptr [rsp+0x128]
- jmp G_M4730_IG31
- ;; size=20 bbWeight=0.00 PerfScore 0.02
+ xor r9d, r9d
+ mov dword ptr [rsp+0xD4], r9d
+ lea ecx, [r13-0x01]
+ cmp ecx, r12d
+ jae G_M4730_IG166
+ lea ecx, [r13-0x01]
+ cmp word ptr [rbx+2*rcx+0x0C], 123
+ sete cl
+ movzx rcx, cl
+ call [<unknown method>]
+ ; byrRegs -[r10]
+ ; gcr arg pop 0
+ xor ecx, ecx
+ cmp dword ptr [rsp+0x134], 123
+ setne cl
+ call [<unknown method>]
+ ; gcr arg pop 0
+ mov eax, dword ptr [rsp+0x134]
+ lea edx, [rax-0x30]
+ cmp edx, 10
+ jae G_M4730_IG159
+ jmp SHORT G_M4730_IG31
+ ;; size=120 bbWeight=1.06 PerfScore 28.21
G_M4730_IG28: ; bbWeight=0.60, gcVars=00000000000000000000000000800000 {V179}, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, gcvars, byref
; GC ptr vars -{V169} +{V23 V179}
mov rcx, rsi
@@ -570,113 +595,104 @@ G_M4730_IG28: ; bbWeight=0.60, gcVars=00000000000000000000000000800000 {V
G_M4730_IG29: ; bbWeight=1.07, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref
add r13d, eax
cmp r13d, r12d
- jae G_M4730_IG171
+ jae G_M4730_IG166
mov ecx, r13d
movzx rax, word ptr [rbx+2*rcx+0x0C]
inc r13d
cmp r12d, r13d
- jbe G_M4730_IG165
+ jbe G_M4730_IG160
mov ecx, r13d
movzx r8, word ptr [rbx+2*rcx+0x0C]
cmp eax, r8d
- je G_M4730_IG46
+ jne G_M4730_IG21
;; size=50 bbWeight=1.07 PerfScore 9.37
-G_M4730_IG30: ; bbWeight=1.06, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref, isz
- cmp eax, 123
- jne G_M4730_IG163
- mov dword ptr [rsp+0x134], r8d
- xor eax, eax
- mov dword ptr [rsp+0x130], eax
- xor edx, edx
- mov dword ptr [rsp+0x12C], edx
- xor r10, r10
- ; byrRegs +[r10]
- mov bword ptr [rsp+0x58], r10
+G_M4730_IG30: ; bbWeight=0.01, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, byref
+ mov rcx, rsi
+ ; gcrRegs +[rcx]
+ mov edx, r8d
+ call [System.Text.StringBuilder:Append(ushort):System.Text.StringBuilder:this]
+ ; gcrRegs -[rcx] +[rax]
+ ; gcr arg pop 0
+ inc r13d
+ jmp G_M4730_IG07
+ ;; size=20 bbWeight=0.01 PerfScore 0.04
+G_M4730_IG31: ; bbWeight=1.06, gcVars=00000000000000002000000000000000 {V169}, gcrefRegs=80C8 {rbx rsi rdi r15}, byrefRegs=0020 {rbp}, gcvars, byref, isz
+ ; gcrRegs -[rax]
; GC ptr vars +{V169}
- xor r9d, r9d
- mov dword ptr [rsp+0xD4], r9d
- lea ecx, [r13-0x01]
- cmp ecx, r12d
- jae G_M4730_IG171
- lea ecx, [r13-0x01]
- cmp word ptr [rbx+2*rcx+0x0C], 123
- sete cl
- movzx rcx, cl
- call [<unknown method>]
- ; byrRegs -[r10]
- ; gcr arg pop 0
- xor ecx, ecx
- cmp dword ptr [rsp+0x134], 123
- setne cl
...
librariestestsnotieredcompilation.run.windows.x64.Release.mch
+0 (0.00%) : 138545.dasm - System.IO.Tests.UmaReadWriteStructArray:UmaReadWriteStructArrayMultiples() (FullOpts)
@@ -8,54 +8,54 @@
; 16 inlinees with PGO data; 46 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
-; V00 loc0 [V00,T33] ( 3, 5.98) ref -> rbx class-hnd exact single-def <<unknown class>>
-; V01 loc1 [V01,T25] ( 4, 10.14) ref -> rsi class-hnd exact single-def <<unknown class>>
+; V00 loc0 [V00,T32] ( 3, 5.98) ref -> rbx class-hnd exact single-def <<unknown class>>
+; V01 loc1 [V01,T13] ( 7, 22.12) ref -> rsi class-hnd exact single-def <<unknown class>>
; V02 loc2 [V02,T08] ( 7, 24.76) int -> rcx
;* V03 loc3 [V03 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SF] ld-addr-op <System.IO.Tests.Uma_TestStructs+UmaTestStruct>
-; V04 loc4 [V04,T38] ( 7, 3 ) ref -> [rbp-0x50] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
-; V05 loc5 [V05,T39] ( 5, 2 ) ref -> [rbp-0x58] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
-; V06 loc6 [V06,T07] ( 8, 29.26) int -> rbx
+; V04 loc4 [V04,T37] ( 7, 3 ) ref -> [rbp-0x50] class-hnd exact EH-live spill-single-def <System.IO.Tests.TestSafeBuffer>
+; V05 loc5 [V05,T38] ( 5, 2 ) ref -> [rbp-0x58] class-hnd exact EH-live spill-single-def <System.IO.UnmanagedMemoryAccessor>
+; V06 loc6 [V06,T07] ( 8, 28.98) int -> rbx
; V07 OutArgs [V07 ] ( 1, 1 ) struct (40) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V08 tmp1 [V08,T31] ( 4, 8 ) ref -> rdi class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
-; V09 tmp2 [V09,T26] ( 5, 10.06) ref -> r14 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
-; V10 tmp3 [V10,T34] ( 2, 4.06) int -> rbx "Inlining Arg"
-; V11 tmp4 [V11,T32] ( 3, 6.09) ref -> r14 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V08 tmp1 [V08,T30] ( 4, 8 ) ref -> rdi class-hnd exact single-def "NewObj constructor temp" <System.IO.Tests.TestSafeBuffer>
+; V09 tmp2 [V09,T25] ( 5, 10.06) ref -> r14 class-hnd exact single-def "NewObj constructor temp" <System.IO.UnmanagedMemoryAccessor>
+; V10 tmp3 [V10,T33] ( 2, 4.06) int -> rbx "Inlining Arg"
+; V11 tmp4 [V11,T31] ( 3, 6.09) ref -> r14 class-hnd exact single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V12 tmp5 [V12 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V13 tmp6 [V13,T37] ( 3, 3.05) ref -> r13 class-hnd exact single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V14 tmp7 [V14,T27] ( 4, 8.12) ref -> [rbp-0x60] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V15 tmp8 [V15,T28] ( 4, 8.12) ref -> [rbp-0x68] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V16 tmp9 [V16,T13] ( 2, 16.25) int -> r13 "Inlining Arg"
-; V17 tmp10 [V17,T09] ( 3, 24.37) ref -> [rbp-0x70] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V13 tmp6 [V13,T36] ( 3, 3.05) ref -> r13 class-hnd exact single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V14 tmp7 [V14,T26] ( 4, 8.12) ref -> [rbp-0x60] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V15 tmp8 [V15,T27] ( 4, 8.12) ref -> [rbp-0x68] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V16 tmp9 [V16,T14] ( 2, 16.09) int -> r13 "Inlining Arg"
+; V17 tmp10 [V17,T10] ( 3, 24.13) ref -> [rbp-0x70] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V18 tmp11 [V18 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V19 tmp12 [V19,T18] ( 3, 12.19) ref -> [rbp-0x78] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V20 tmp13 [V20,T01] ( 4, 32.50) ref -> [rbp-0x80] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V21 tmp14 [V21,T02] ( 4, 32.50) ref -> [rbp-0x88] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V19 tmp12 [V19,T19] ( 3, 12.06) ref -> [rbp-0x78] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V20 tmp13 [V20,T01] ( 4, 32.17) ref -> [rbp-0x80] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V21 tmp14 [V21,T02] ( 4, 32.17) ref -> [rbp-0x88] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
;* V22 tmp15 [V22 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
-; V23 tmp16 [V23,T14] ( 2, 16.25) int -> r13 "Inlining Arg"
-; V24 tmp17 [V24,T10] ( 3, 24.37) ref -> [rbp-0x90] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
+; V23 tmp16 [V23,T15] ( 2, 16.09) int -> r13 "Inlining Arg"
+; V24 tmp17 [V24,T11] ( 3, 24.13) ref -> [rbp-0x90] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[int]>
;* V25 tmp18 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V26 tmp19 [V26,T19] ( 3, 12.19) ref -> [rbp-0x98] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
-; V27 tmp20 [V27,T03] ( 4, 32.50) ref -> [rbp-0xA0] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V28 tmp21 [V28,T04] ( 4, 32.50) ref -> [rbp-0xA8] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V26 tmp19 [V26,T20] ( 3, 12.06) ref -> [rbp-0x98] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[int]>
+; V27 tmp20 [V27,T03] ( 4, 32.17) ref -> [rbp-0xA0] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V28 tmp21 [V28,T04] ( 4, 32.17) ref -> [rbp-0xA8] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
;* V29 tmp22 [V29 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V30 tmp23 [V30 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V31 tmp24 [V31 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
;* V32 tmp25 [V32 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V33 tmp26 [V33,T15] ( 2, 16.25) ushort -> r13 "Inlining Arg"
-; V34 tmp27 [V34,T11] ( 3, 24.37) ref -> [rbp-0xB0] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
+; V33 tmp26 [V33,T16] ( 2, 16.09) ushort -> r13 "Inlining Arg"
+; V34 tmp27 [V34,T12] ( 3, 24.13) ref -> [rbp-0xB0] class-hnd exact spill-single-def "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1[ushort]>
;* V35 tmp28 [V35 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewObj constructor temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V36 tmp29 [V36,T20] ( 3, 12.19) ref -> [rbp-0xB8] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
-; V37 tmp30 [V37,T05] ( 4, 32.50) ref -> [rbp-0xC0] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
-; V38 tmp31 [V38,T06] ( 4, 32.50) ref -> [rbp-0xC8] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V36 tmp29 [V36,T21] ( 3, 12.06) ref -> [rbp-0xB8] class-hnd exact spill-single-def "Inline stloc first use temp" <Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]>
+; V37 tmp30 [V37,T05] ( 4, 32.17) ref -> [rbp-0xC0] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
+; V38 tmp31 [V38,T06] ( 4, 32.17) ref -> [rbp-0xC8] class-hnd exact spill-single-def "NewObj constructor temp" <<unknown class>>
;* V39 tmp32 [V39 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V40 tmp33 [V40 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.Nullable`1[ubyte]>
;* V41 tmp34 [V41 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inlining Arg" <System.Nullable`1[ubyte]>
-;* V42 tmp35 [V42,T35] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
-; V43 tmp36 [V43,T29] ( 3, 8.12) ubyte -> r13 "field V30.value (fldOffset=0x1)" P-INDEP
+;* V42 tmp35 [V42,T34] ( 0, 0 ) ubyte -> zero-ref "field V30.hasValue (fldOffset=0x0)" P-INDEP
+; V43 tmp36 [V43,T28] ( 3, 8.04) ubyte -> r13 "field V30.value (fldOffset=0x1)" P-INDEP
;* V44 tmp37 [V44 ] ( 0, 0 ) ubyte -> zero-ref "field V31.hasValue (fldOffset=0x0)" P-INDEP
;* V45 tmp38 [V45 ] ( 0, 0 ) ubyte -> zero-ref "field V31.value (fldOffset=0x1)" P-INDEP
-;* V46 tmp39 [V46,T36] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
-; V47 tmp40 [V47,T30] ( 2, 8.12) ubyte -> rcx "field V40.value (fldOffset=0x1)" P-INDEP
+;* V46 tmp39 [V46,T35] ( 0, 0 ) ubyte -> zero-ref "field V40.hasValue (fldOffset=0x0)" P-INDEP
+; V47 tmp40 [V47,T29] ( 3, 8.04) ubyte -> r14 "field V40.value (fldOffset=0x1)" P-INDEP
;* V48 tmp41 [V48 ] ( 0, 0 ) ubyte -> zero-ref "field V41.hasValue (fldOffset=0x0)" P-INDEP
;* V49 tmp42 [V49 ] ( 0, 0 ) ubyte -> zero-ref "field V41.value (fldOffset=0x1)" P-INDEP
;* V50 tmp43 [V50 ] ( 0, 0 ) int -> zero-ref "V03.[000..004)"
@@ -64,15 +64,14 @@
;* V53 tmp46 [V53 ] ( 0, 0 ) ushort -> zero-ref "V03.[012..014)"
;* V54 tmp47 [V54 ] ( 0, 0 ) ubyte -> zero-ref "V03.[014..015)"
; V55 tmp48 [V55,T00] ( 6, 47.52) byref -> rax "Spilling address for field-by-field copy"
-; V56 tmp49 [V56,T41] ( 6, 0 ) struct ( 8) [rbp-0x40] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
-; V57 PSPSym [V57,T40] ( 1, 1 ) long -> [rbp-0xD8] do-not-enreg[V] "PSPSym"
-; V58 cse0 [V58,T12] ( 5, 20.31) byref -> r14 "CSE - moderate"
-; V59 cse1 [V59,T21] ( 3, 12.19) long -> r14 "CSE - moderate"
-; V60 cse2 [V60,T16] ( 5, 14.22) long -> r12 "CSE - moderate"
-; V61 cse3 [V61,T17] ( 5, 14.22) long -> [rbp-0x48] spill-single-def "CSE - moderate"
-; V62 cse4 [V62,T23] ( 4, 10.16) long -> rdi "CSE - moderate"
-; V63 cse5 [V63,T24] ( 4, 10.16) long -> r15 "CSE - moderate"
-; V64 cse6 [V64,T22] ( 3, 11.88) int -> rdx "CSE - moderate"
+; V56 tmp49 [V56,T40] ( 6, 0 ) struct ( 8) [rbp-0x40] do-not-enreg[SF] "by-value struct argument" <System.Nullable`1[ubyte]>
+; V57 PSPSym [V57,T39] ( 1, 1 ) long -> [rbp-0xD8] do-not-enreg[V] "PSPSym"
+; V58 cse0 [V58,T09] ( 6, 24.13) long -> r14 "CSE - moderate"
+; V59 cse1 [V59,T17] ( 5, 14.10) long -> r12 "CSE - moderate"
+; V60 cse2 [V60,T18] ( 5, 14.10) long -> [rbp-0x48] spill-single-def "CSE - moderate"
+; V61 cse3 [V61,T23] ( 4, 10.07) long -> rdi "CSE - moderate"
+; V62 cse4 [V62,T24] ( 4, 10.07) long -> r15 "CSE - moderate"
+; V63 cse5 [V63,T22] ( 3, 11.88) int -> rdx "CSE - moderate"
;
; Lcl frame size = 200
@@ -138,7 +137,7 @@ G_M53770_IG04: ; bbWeight=1, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {},
mov gword ptr [rbp-0x50], rdi
; GC ptr vars +{V04}
;; size=36 bbWeight=1 PerfScore 6.00
-G_M53770_IG05: ; bbWeight=1, gcVars=0000004000000000 {V04}, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG05: ; bbWeight=1, gcVars=0000002000000000 {V04}, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, gcvars, byref
mov rcx, 0xD1FFAB1E ; System.IO.UnmanagedMemoryAccessor
call CORINFO_HELP_NEWSFAST
; gcrRegs +[rax]
@@ -158,7 +157,7 @@ G_M53770_IG05: ; bbWeight=1, gcVars=0000004000000000 {V04}, gcrefRegs=00C
mov gword ptr [rbp-0x58], r14
; GC ptr vars +{V05}
;; size=51 bbWeight=1 PerfScore 7.50
-G_M53770_IG06: ; bbWeight=1.02, gcVars=000000C000000000 {V04 V05}, gcrefRegs=4048 {rbx rsi r14}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG06: ; bbWeight=1.02, gcVars=0000006000000000 {V04 V05}, gcrefRegs=4048 {rbx rsi r14}, byrefRegs=0000 {}, gcvars, byref
mov dword ptr [rsp+0x20], 12
mov rcx, r14
; gcrRegs +[rcx]
@@ -263,7 +262,7 @@ G_M53770_IG07: ; bbWeight=1.02, extend
; gcr arg pop 0
xor ebx, ebx
;; size=35 bbWeight=1.02 PerfScore 6.85
-G_M53770_IG08: ; bbWeight=4.06, gcrefRegs=0040 {rsi}, byrefRegs=0000 {}, byref
+G_M53770_IG08: ; bbWeight=4.02, gcrefRegs=0040 {rsi}, byrefRegs=0000 {}, byref
mov r14d, ebx
shl r14, 4
mov r13d, dword ptr [rsi+r14+0x10]
@@ -344,15 +343,13 @@ G_M53770_IG08: ; bbWeight=4.06, gcrefRegs=0040 {rsi}, byrefRegs=0000 {},
call [<unknown method>]
; gcrRegs -[r8]
; gcr arg pop 0
- lea r14, bword ptr [rsi+r14+0x10]
- ; byrRegs +[r14]
- mov r13d, dword ptr [r14+0x08]
+ mov r13d, dword ptr [rsi+r14+0x18]
mov rcx, rdi
- ;; size=193 bbWeight=4.06 PerfScore 156.39
-G_M53770_IG09: ; bbWeight=4.06, extend
call CORINFO_HELP_NEWSFAST
; gcrRegs +[rax]
; gcr arg pop 0
+ ;; size=194 bbWeight=4.02 PerfScore 154.83
+G_M53770_IG09: ; bbWeight=4.02, extend
mov gword ptr [rbp-0x90], rax
; GC ptr vars +{V24}
mov rcx, r15
@@ -426,18 +423,18 @@ G_M53770_IG09: ; bbWeight=4.06, extend
call [<unknown method>]
; gcrRegs -[r8]
; gcr arg pop 0
- movzx r13, byte ptr [r14+0x04]
+ movzx r13, byte ptr [rsi+r14+0x14]
test r13d, r13d
jne G_M53770_IG13
- movzx r13, word ptr [r14+0x0C]
+ movzx r13, word ptr [rsi+r14+0x1C]
mov rcx, 0xD1FFAB1E ; Xunit.Sdk.AssertEqualityComparer`1[ushort]
- ;; size=220 bbWeight=4.06 PerfScore 154.36
-G_M53770_IG10: ; bbWeight=4.06, isz, extend
call CORINFO_HELP_NEWSFAST
; gcrRegs +[rax]
; gcr arg pop 0
mov gword ptr [rbp-0xB0], rax
; GC ptr vars +{V34}
+ ;; size=229 bbWeight=4.02 PerfScore 156.84
+G_M53770_IG10: ; bbWeight=4.02, isz, extend
mov rcx, 0xD1FFAB1E ; Xunit.Sdk.AssertEqualityComparer`1+<>c__DisplayClass5_0[ushort]
call CORINFO_HELP_NEWSFAST
; gcr arg pop 0
@@ -509,20 +506,19 @@ G_M53770_IG10: ; bbWeight=4.06, isz, extend
call [<unknown method>]
; gcrRegs -[r8]
; gcr arg pop 0
- movzx rcx, byte ptr [r14+0x0E]
- test ecx, ecx
+ movzx r14, byte ptr [rsi+r14+0x1E]
+ test r14d, r14d
je SHORT G_M53770_IG14
- ;; size=207 bbWeight=4.06 PerfScore 144.21
-G_M53770_IG11: ; bbWeight=4, gcrefRegs=0040 {rsi}, byrefRegs=0000 {}, byref
- ; byrRegs -[r14]
+ ;; size=197 bbWeight=4.02 PerfScore 134.72
+G_M53770_IG11: ; bbWeight=3.96, gcrefRegs=0040 {rsi}, byrefRegs=0000 {}, byref
inc ebx
cmp ebx, 12
jl G_M53770_IG08
- ;; size=11 bbWeight=4 PerfScore 6.00
-G_M53770_IG12: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
+ ;; size=11 bbWeight=3.96 PerfScore 5.94
+G_M53770_IG12: ; bbWeight=1.02, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[rsi]
jmp SHORT G_M53770_IG15
- ;; size=2 bbWeight=0.50 PerfScore 1.00
+ ;; size=2 bbWeight=1.02 PerfScore 2.03
G_M53770_IG13: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov byte ptr [rbp-0x40], 1
mov byte ptr [rbp-0x3F], r13b
@@ -540,7 +536,7 @@ G_M53770_IG13: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
;; size=28 bbWeight=0 PerfScore 0.00
G_M53770_IG14: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
mov byte ptr [rbp-0x40], 1
- mov byte ptr [rbp-0x3F], 0
+ mov byte ptr [rbp-0x3F], r14b
movzx rdx, word ptr [rbp-0x40]
xor rcx, rcx
; gcrRegs +[rcx]
@@ -592,8 +588,8 @@ G_M53770_IG17: ; bbWeight=1, epilog, nogc, extend
pop rbp
ret
;; size=20 bbWeight=1 PerfScore 5.25
-G_M53770_IG18: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
- ; GC ptr vars +{V04 V05 V38}
+G_M53770_IG18: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, funclet prolog, nogc
+ ; GC ptr vars +{V04 V05 V37 V38}
push rbp
push r15
push r14
@@ -607,11 +603,11 @@ G_M53770_IG18: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs
mov qword ptr [rsp+0x28], rbp
lea rbp, [rbp+0x100]
;; size=32 bbWeight=0 PerfScore 0.00
-G_M53770_IG19: ; bbWeight=0, gcVars=000000C000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG19: ; bbWeight=0, gcVars=0000006000000000 {V04 V05}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
mov rcx, gword ptr [rbp-0x58]
; gcrRegs +[rcx]
mov byte ptr [rcx+0x24], 0
- ; GC ptr vars -{V05 V38}
+ ; GC ptr vars -{V05 V37 V38}
call <unknown method>
; gcrRegs -[rcx]
; gcr arg pop 0
@@ -643,7 +639,7 @@ G_M53770_IG21: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mov qword ptr [rsp+0x28], rbp
lea rbp, [rbp+0x100]
;; size=32 bbWeight=0 PerfScore 0.00
-G_M53770_IG22: ; bbWeight=0, gcVars=0000004000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
+G_M53770_IG22: ; bbWeight=0, gcVars=0000002000000000 {V04}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
mov rcx, gword ptr [rbp-0x50]
; gcrRegs +[rcx]
mov edx, 1
...
Details
Improvements/regressions per collection
| Collection |
Contexts with diffs |
Improvements |
Regressions |
Same size |
Improvements (bytes) |
Regressions (bytes) |
| benchmarks.run.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_pgo.windows.x64.checked.mch |
7 |
5 |
2 |
0 |
-1,400 |
+694 |
| benchmarks.run_tiered.windows.x64.checked.mch |
3 |
3 |
0 |
0 |
-635 |
+0 |
| coreclr_tests.run.windows.x64.checked.mch |
6 |
4 |
2 |
0 |
-1,019 |
+379 |
| libraries.crossgen2.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries.pmi.windows.x64.checked.mch |
4 |
1 |
3 |
0 |
-14 |
+521 |
| libraries_tests.run.windows.x64.Release.mch |
3 |
3 |
0 |
0 |
-188 |
+0 |
| librariestestsnotieredcompilation.run.windows.x64.Release.mch |
1 |
0 |
0 |
1 |
-0 |
+0 |
| realworld.run.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| smoke_tests.nativeaot.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
|
24 |
16 |
7 |
1 |
-3,256 |
+1,594 |
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| benchmarks.run.windows.x64.checked.mch |
27,917 |
4 |
27,913 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_pgo.windows.x64.checked.mch |
102,654 |
50,161 |
52,493 |
0 (0.00%) |
0 (0.00%) |
| benchmarks.run_tiered.windows.x64.checked.mch |
54,333 |
36,871 |
17,462 |
0 (0.00%) |
0 (0.00%) |
| coreclr_tests.run.windows.x64.checked.mch |
573,728 |
341,128 |
232,600 |
1 (0.00%) |
2 (0.00%) |
| libraries.crossgen2.windows.x64.checked.mch |
2,104 |
0 |
2,104 |
0 (0.00%) |
0 (0.00%) |
| libraries.pmi.windows.x64.checked.mch |
309,147 |
6 |
309,141 |
0 (0.00%) |
1 (0.00%) |
| libraries_tests.run.windows.x64.Release.mch |
671,335 |
476,124 |
195,211 |
0 (0.00%) |
0 (0.00%) |
| librariestestsnotieredcompilation.run.windows.x64.Release.mch |
320,489 |
21,924 |
298,565 |
0 (0.00%) |
0 (0.00%) |
| realworld.run.windows.x64.checked.mch |
36,887 |
3 |
36,884 |
0 (0.00%) |
0 (0.00%) |
| smoke_tests.nativeaot.windows.x64.checked.mch |
67 |
0 |
67 |
0 (0.00%) |
0 (0.00%) |
|
2,098,661 |
926,221 |
1,172,440 |
1 (0.00%) |
3 (0.00%) |
jit-analyze output
benchmarks.run_pgo.windows.x64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 35808303 (overridden on cmd)
Total bytes of diff: 35807597 (overridden on cmd)
Total bytes of delta: -706 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file regressions (bytes):
347 : 50609.dasm (31.12 % of base)
347 : 50597.dasm (31.12 % of base)
Top file improvements (bytes):
-476 : 29507.dasm (-34.15 % of base)
-464 : 29513.dasm (-33.41 % of base)
-198 : 54206.dasm (-29.25 % of base)
-198 : 54237.dasm (-29.25 % of base)
-64 : 79452.dasm (-7.48 % of base)
7 total files with Code Size differences (5 improved, 2 regressed), 0 unchanged.
Top method regressions (bytes):
347 (31.12 % of base) : 50609.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
347 (31.12 % of base) : 50597.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
Top method improvements (bytes):
-476 (-34.15 % of base) : 29507.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-464 (-33.41 % of base) : 29513.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-198 (-29.25 % of base) : 54206.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-198 (-29.25 % of base) : 54237.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-64 (-7.48 % of base) : 79452.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method regressions (percentages):
347 (31.12 % of base) : 50609.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
347 (31.12 % of base) : 50597.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
Top method improvements (percentages):
-476 (-34.15 % of base) : 29507.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-464 (-33.41 % of base) : 29513.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-198 (-29.25 % of base) : 54206.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-198 (-29.25 % of base) : 54237.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-64 (-7.48 % of base) : 79452.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
7 total methods with Code Size differences (5 improved, 2 regressed).
benchmarks.run_tiered.windows.x64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 12549902 (overridden on cmd)
Total bytes of diff: 12549267 (overridden on cmd)
Total bytes of delta: -635 (-0.01 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-438 : 24990.dasm (-32.09 % of base)
-147 : 34081.dasm (-15.91 % of base)
-50 : 47335.dasm (-6.39 % of base)
3 total files with Code Size differences (3 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-438 (-32.09 % of base) : 24990.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-147 (-15.91 % of base) : 34081.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-50 (-6.39 % of base) : 47335.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
Top method improvements (percentages):
-438 (-32.09 % of base) : 24990.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-147 (-15.91 % of base) : 34081.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-50 (-6.39 % of base) : 47335.dasm - JetStream.Statistics:findOptimalSegmentationInternal(float[][],int[][],double[],JetStream.SampleVarianceUpperTriangularMatrix,int) (Tier1-OSR)
3 total methods with Code Size differences (3 improved, 0 regressed).
coreclr_tests.run.windows.x64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 392970471 (overridden on cmd)
Total bytes of diff: 392969831 (overridden on cmd)
Total bytes of delta: -640 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file regressions (bytes):
347 : 449379.dasm (31.12 % of base)
32 : 470192.dasm (2.52 % of base)
Top file improvements (bytes):
-475 : 449992.dasm (-34.12 % of base)
-198 : 439645.dasm (-29.25 % of base)
-198 : 439630.dasm (-29.25 % of base)
-148 : 487187.dasm (-36.82 % of base)
6 total files with Code Size differences (4 improved, 2 regressed), 0 unchanged.
Top method regressions (bytes):
347 (31.12 % of base) : 449379.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
32 (2.52 % of base) : 470192.dasm - JitTest_lcsmixed_lcs_cs.LCS:TestEntryPoint():int (Tier1-OSR)
Top method improvements (bytes):
-475 (-34.12 % of base) : 449992.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-198 (-29.25 % of base) : 439645.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-198 (-29.25 % of base) : 439630.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-148 (-36.82 % of base) : 487187.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
Top method regressions (percentages):
347 (31.12 % of base) : 449379.dasm - Benchstone.BenchI.MulMatrix:Inner(int[][],int[][],int[][]) (Tier1-OSR)
32 (2.52 % of base) : 470192.dasm - JitTest_lcsmixed_lcs_cs.LCS:TestEntryPoint():int (Tier1-OSR)
Top method improvements (percentages):
-148 (-36.82 % of base) : 487187.dasm - Runtime_88091:Problem(System.Collections.Generic.List`1[NamedSet][]) (Tier1-OSR)
-475 (-34.12 % of base) : 449992.dasm - SciMark2.LU:factor(double[][],int[]):int (Tier1-OSR)
-198 (-29.25 % of base) : 439645.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
-198 (-29.25 % of base) : 439630.dasm - LUDecomp:DoLUIteration(double[][],double[],double[][][],double[][],int):long (Tier1-OSR)
6 total methods with Code Size differences (4 improved, 2 regressed).
libraries.pmi.windows.x64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 61645769 (overridden on cmd)
Total bytes of diff: 61646276 (overridden on cmd)
Total bytes of delta: 507 (0.00 % of base)
diff is a regression.
relative diff is a regression.
Detail diffs
Top file regressions (bytes):
311 : 103554.dasm (55.64 % of base)
105 : 270118.dasm (31.07 % of base)
105 : 273804.dasm (31.07 % of base)
Top file improvements (bytes):
-14 : 100147.dasm (-17.72 % of base)
4 total files with Code Size differences (1 improved, 3 regressed), 0 unchanged.
Top method regressions (bytes):
311 (55.64 % of base) : 103554.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
105 (31.07 % of base) : 270118.dasm - Interop+Kernel32:GetLeadByteRanges(int,ubyte[]):int (FullOpts)
105 (31.07 % of base) : 273804.dasm - Interop+Kernel32:GetLeadByteRanges(int,ubyte[]):int (FullOpts)
Top method improvements (bytes):
-14 (-17.72 % of base) : 100147.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
Top method regressions (percentages):
311 (55.64 % of base) : 103554.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol:ReplaceRestExtensionType(Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol,Microsoft.CodeAnalysis.PooledObjects.ArrayBuilder`1[Microsoft.CodeAnalysis.VisualBasic.Symbols.TypeWithModifiers],Microsoft.CodeAnalysis.VisualBasic.Symbols.TupleTypeSymbol):Microsoft.CodeAnalysis.VisualBasic.Symbols.NamedTypeSymbol (FullOpts)
105 (31.07 % of base) : 270118.dasm - Interop+Kernel32:GetLeadByteRanges(int,ubyte[]):int (FullOpts)
105 (31.07 % of base) : 273804.dasm - Interop+Kernel32:GetLeadByteRanges(int,ubyte[]):int (FullOpts)
Top method improvements (percentages):
-14 (-17.72 % of base) : 100147.dasm - Microsoft.CodeAnalysis.VisualBasic.Symbols.CRC32:InitCrc32Table():uint[] (FullOpts)
4 total methods with Code Size differences (1 improved, 3 regressed).
libraries_tests.run.windows.x64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 279151239 (overridden on cmd)
Total bytes of diff: 279151051 (overridden on cmd)
Total bytes of delta: -188 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-70 : 494165.dasm (-1.70 % of base)
-59 : 284950.dasm (-1.88 % of base)
-59 : 282564.dasm (-1.88 % of base)
3 total files with Code Size differences (3 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-70 (-1.70 % of base) : 494165.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
-59 (-1.88 % of base) : 284950.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-59 (-1.88 % of base) : 282564.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
Top method improvements (percentages):
-59 (-1.88 % of base) : 284950.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-59 (-1.88 % of base) : 282564.dasm - System.Globalization.Tests.CompareInfoCompareTests:TestHiraganaAndKatakana(int[],int[]):this (Tier1-OSR)
-70 (-1.70 % of base) : 494165.dasm - System.Text.StringBuilder:AppendFormatHelper(System.IFormatProvider,System.String,System.ReadOnlySpan`1[System.Object]):System.Text.StringBuilder:this (Tier1)
3 total methods with Code Size differences (3 improved, 0 regressed).
librariestestsnotieredcompilation.run.windows.x64.Release.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 137561629 (overridden on cmd)
Total bytes of diff: 137561629 (overridden on cmd)
Total bytes of delta: 0 (0.00 % of base)
Detail diffs
0 total files with Code Size differences (0 improved, 0 regressed), 1 unchanged.
0 total methods with Code Size differences (0 improved, 0 regressed).