Assembly Diffs
linux arm64
Diffs are based on 1,613,384 contexts (368,644 MinOpts, 1,244,740 FullOpts).
MISSED contexts: 316 (0.02%)
Overall (-16 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| libraries.crossgen2.linux.arm64.checked.mch |
63,764,680 |
-16 |
FullOpts (-16 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| libraries.crossgen2.linux.arm64.checked.mch |
63,763,044 |
-16 |
Example diffs
libraries.crossgen2.linux.arm64.checked.mch
-16 (-2.86%) : 143574.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
@@ -4,23 +4,21 @@
; ReadyToRun compilation
; optimized code
; fp based frame
-; fully interruptible
+; partially interruptible
; No matching PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T01] ( 11, 17 ) ref -> x19 this class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V01 arg1 [V01,T05] ( 10, 9.50) ref -> x21 class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V02 arg2 [V02,T04] ( 11, 10 ) ref -> x20 class-hnd single-def <System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V03 loc0 [V03,T02] ( 7, 17.50) ref -> x19 class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V00 this [V00,T04] ( 9, 5.50) ref -> x21 this class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V01 arg1 [V01,T02] ( 10, 9.50) ref -> x20 class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V02 arg2 [V02,T01] ( 11, 10 ) ref -> x19 class-hnd single-def <System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V03 loc0 [V03,T00] ( 6, 17 ) ref -> x21 class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
;* V04 loc1 [V04 ] ( 0, 0 ) int -> zero-ref
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V06 tmp1 [V06,T08] ( 3, 3 ) ref -> x23 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V07 tmp2 [V07,T03] ( 2, 16 ) ref -> x19 single-def "arg temp"
-; V08 tmp3 [V08 ] ( 6, 6 ) struct (24) [fp+0x10] do-not-enreg[XS] must-init addr-exposed "by-value struct argument" <System.Text.RegularExpressions.Symbolic.BitVector>
-; V09 cse0 [V09,T06] ( 2, 9 ) long -> x22 hoist "CSE - aggressive"
-; V10 cse1 [V10,T07] ( 9, 7.75) long -> x22 hoist multi-def "CSE - aggressive"
-; V11 rat0 [V11,T00] ( 3, 24 ) int -> x23 "ReplaceWithLclVar is creating a new local variable"
+; V06 tmp1 [V06,T05] ( 3, 3 ) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V07 tmp2 [V07 ] ( 6, 6 ) struct (24) [fp+0x10] do-not-enreg[XS] must-init addr-exposed "by-value struct argument" <System.Text.RegularExpressions.Symbolic.BitVector>
+; V08 cse0 [V08,T06] ( 4, 2 ) int -> x22 "CSE - moderate"
+; V09 cse1 [V09,T03] ( 9, 7.75) long -> x23 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 24
@@ -30,105 +28,75 @@ G_M65422_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
stp x21, x22, [sp, #0x38]
str x23, [sp, #0x48]
mov fp, sp
- str xzr, [fp, #0x10] // [V08 tmp3]
- mov x19, x0
- ; gcrRegs +[x19]
- mov x21, x1
+ str xzr, [fp, #0x10] // [V07 tmp2]
+ mov x21, x0
; gcrRegs +[x21]
- mov x20, x2
+ mov x20, x1
; gcrRegs +[x20]
+ mov x19, x2
+ ; gcrRegs +[x19]
;; size=36 bbWeight=1 PerfScore 7.00
-G_M65422_IG02: ; bbWeight=1, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- adrp x22, [HIGH RELOC #0xD1FFAB1E]
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- ;; size=8 bbWeight=1 PerfScore 1.00
-G_M65422_IG03: ; bbWeight=8, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- mov x11, x22
+G_M65422_IG02: ; bbWeight=1, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
+ adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
+ add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x0, [x11]
blr x0
- ; gcr arg pop 0
- cbz w0, G_M65422_IG06
- ;; size=16 bbWeight=8 PerfScore 44.00
-G_M65422_IG04: ; bbWeight=4, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- ldr w23, [x19, #0x20]
- cmp w23, #17
- bhi G_M65422_IG19
- mov w1, w23
- adr x0, [@RWD00]
- ldr w0, [x0, x1, LSL #2]
- adr x11, [G_M65422_IG02]
- add x0, x0, x11
- br x0
- ;; size=36 bbWeight=4 PerfScore 42.00
-G_M65422_IG05: ; bbWeight=4, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- ldr x19, [x19, #0x08]
- b G_M65422_IG03
- ;; size=8 bbWeight=4 PerfScore 16.00
-G_M65422_IG06: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
+ cbnz w0, G_M65422_IG04
+ ;; size=20 bbWeight=1 PerfScore 6.00
+G_M65422_IG03: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x0, [x11]
blr x0
; gcrRegs +[x0]
- ; gcr arg pop 0
- mov x23, x0
- ; gcrRegs +[x23]
- mov x1, x19
+ mov x22, x0
+ ; gcrRegs +[x22]
+ mov x1, x21
; gcrRegs +[x1]
- mov x0, x23
+ mov x0, x22
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x2, [x11]
blr x2
- ; gcrRegs -[x0-x1 x19]
- ; gcr arg pop 0
+ ; gcrRegs -[x0-x1 x21]
adrp x0, [HIGH RELOC #0xD1FFAB1E] // <unknown method>
add x0, x0, [LOW RELOC #0xD1FFAB1E]
ldr x0, [x0]
- mov x3, x20
+ mov x3, x19
; gcrRegs +[x3]
- mov x1, x23
+ mov x1, x22
; gcrRegs +[x1]
- mov x2, x21
+ mov x2, x20
; gcrRegs +[x2]
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x4, [x11]
blr x4
- ; gcrRegs -[x1-x3 x20-x21 x23]
- ; gcr arg pop 0
- b G_M65422_IG19
+ ; gcrRegs -[x1-x3 x19-x20 x22]
+ b G_M65422_IG17
;; size=88 bbWeight=0.50 PerfScore 11.50
-G_M65422_IG07: ; bbWeight=0.50, gcrefRegs=300000 {x20 x21}, byrefRegs=0000 {}, byref, nogc
- ; gcrRegs +[x20-x21]
- ldp x0, x1, [x21, #0xC0]
+G_M65422_IG04: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs +[x19-x21]
+ ldr w22, [x21, #0x20]
+ cmp w22, #17
+ bhi G_M65422_IG17
+ mov w1, w22
+ adr x0, [@RWD00]
+ ldr w0, [x0, x1, LSL #2]
+ adr x11, [G_M65422_IG02]
+ add x0, x0, x11
+ br x0
+ ;; size=36 bbWeight=0.50 PerfScore 5.25
+G_M65422_IG05: ; bbWeight=0.50, gcrefRegs=180000 {x19 x20}, byrefRegs=0000 {}, byref, nogc
+ ; gcrRegs -[x21]
+ ldp x0, x1, [x20, #0xC0]
stp x0, x1, [fp, #0x10]
- ldr x0, [x21, #0xD0]
+ ldr x0, [x20, #0xD0]
str x0, [fp, #0x20]
;; size=16 bbWeight=0.50 PerfScore 4.50
-G_M65422_IG08: ; bbWeight=0.50, extend
- add x1, fp, #16 // [V08 tmp3]
- mov x0, x20
- ; gcrRegs +[x0]
- adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
- add x11, x11, [LOW RELOC #0xD1FFAB1E]
- ldr wzr, [x0]
- ldr x2, [x11]
- blr x2
- ; gcrRegs -[x0 x20-x21]
- ; gcr arg pop 0
- b G_M65422_IG19
- ;; size=32 bbWeight=0.50 PerfScore 5.00
-G_M65422_IG09: ; bbWeight=0.50, gcrefRegs=180000 {x19 x20}, byrefRegs=0000 {}, byref, nogc
- ; gcrRegs +[x19-x20]
- ldp x0, x1, [x19, #0x30]
- stp x0, x1, [fp, #0x10]
- ldr x0, [x19, #0x40]
- str x0, [fp, #0x20]
- ;; size=16 bbWeight=0.50 PerfScore 4.50
-G_M65422_IG10: ; bbWeight=0.50, extend
- add x1, fp, #16 // [V08 tmp3]
- mov x0, x20
+G_M65422_IG06: ; bbWeight=0.50, extend
+ add x1, fp, #16 // [V07 tmp2]
+ mov x0, x19
; gcrRegs +[x0]
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
@@ -136,148 +104,159 @@ G_M65422_IG10: ; bbWeight=0.50, extend
ldr x2, [x11]
blr x2
; gcrRegs -[x0 x19-x20]
- ; gcr arg pop 0
- b G_M65422_IG19
+ b G_M65422_IG17
;; size=32 bbWeight=0.50 PerfScore 5.00
-G_M65422_IG11: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- ; gcrRegs +[x19-x21]
- ldr x0, [x19, #0x08]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
- mov x1, x21
- ; gcrRegs +[x1]
- adrp x22, [HIGH RELOC #0xD1FFAB1E] // function address
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- mov x11, x22
- ldr wzr, [x0]
- ldr x3, [x11]
- blr x3
- ; gcrRegs -[x0-x2 x19-x21]
- ; gcr arg pop 0
- b G_M65422_IG19
- ;; size=40 bbWeight=0.50 PerfScore 6.75
-G_M65422_IG12: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- ; gcrRegs +[x19-x21]
- ldr x0, [x19, #0x08]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
- mov x1, x21
- ; gcrRegs +[x1]
- adrp x22, [HIGH RELOC #0xD1FFAB1E] // function address
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- mov x11, x22
- ldr wzr, [x0]
- ldr x3, [x11]
- blr x3
- ; gcrRegs -[x0-x2]
- ; gcr arg pop 0
- ldr x0, [x19, #0x10]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
- mov x1, x21
- ; gcrRegs +[x1]
- mov x11, x22
- ldr wzr, [x0]
- ldr x3, [x11]
- blr x3
- ; gcrRegs -[x0-x2 x19-x21]
- ; gcr arg pop 0
- b G_M65422_IG19
- ;; size=68 bbWeight=0.50 PerfScore 12.50
-G_M65422_IG13: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[x19-x21]
- ldr w0, [x19, #0x20]
- cmp w0, #2
- bne G_M65422_IG16
- ;; size=12 bbWeight=0.50 PerfScore 2.25
-G_M65422_IG14: ; bbWeight=0.25, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- adrp x22, [HIGH RELOC #0xD1FFAB1E]
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- ;; size=8 bbWeight=0.25 PerfScore 0.25
-G_M65422_IG15: ; bbWeight=4, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- ldr x0, [x19, #0x08]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
...
Details
Improvements/regressions per collection
| Collection |
Contexts with diffs |
Improvements |
Regressions |
Same size |
Improvements (bytes) |
Regressions (bytes) |
| benchmarks.run.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_pgo.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_tiered.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| coreclr_tests.run.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries.crossgen2.linux.arm64.checked.mch |
1 |
1 |
0 |
0 |
-16 |
+0 |
| libraries.pmi.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries_tests.run.linux.arm64.Release.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| librariestestsnotieredcompilation.run.linux.arm64.Release.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| realworld.run.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| smoke_tests.nativeaot.linux.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
|
1 |
1 |
0 |
0 |
-16 |
+0 |
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| benchmarks.run.linux.arm64.checked.mch |
28,883 |
1,210 |
27,673 |
9 (0.03%) |
9 (0.03%) |
| benchmarks.run_pgo.linux.arm64.checked.mch |
125,988 |
51,761 |
74,227 |
11 (0.01%) |
11 (0.01%) |
| benchmarks.run_tiered.linux.arm64.checked.mch |
58,017 |
43,144 |
14,873 |
9 (0.02%) |
9 (0.02%) |
| coreclr_tests.run.linux.arm64.checked.mch |
393,785 |
185,167 |
208,618 |
88 (0.02%) |
88 (0.02%) |
| libraries.crossgen2.linux.arm64.checked.mch |
264,907 |
15 |
264,892 |
1 (0.00%) |
1 (0.00%) |
| libraries.pmi.linux.arm64.checked.mch |
295,827 |
6 |
295,821 |
45 (0.02%) |
45 (0.02%) |
| libraries_tests.run.linux.arm64.Release.mch |
88,394 |
65,551 |
22,843 |
3 (0.00%) |
3 (0.00%) |
| librariestestsnotieredcompilation.run.linux.arm64.Release.mch |
305,113 |
21,620 |
283,493 |
148 (0.05%) |
148 (0.05%) |
| realworld.run.linux.arm64.checked.mch |
33,416 |
163 |
33,253 |
2 (0.01%) |
2 (0.01%) |
| smoke_tests.nativeaot.linux.arm64.checked.mch |
19,054 |
7 |
19,047 |
0 (0.00%) |
0 (0.00%) |
|
1,613,384 |
368,644 |
1,244,740 |
316 (0.02%) |
316 (0.02%) |
jit-analyze output
libraries.crossgen2.linux.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os linux -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 63764680 (overridden on cmd)
Total bytes of diff: 63764664 (overridden on cmd)
Total bytes of delta: -16 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-16 : 143574.dasm (-2.86 % of base)
1 total files with Code Size differences (1 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-16 (-2.86 % of base) : 143574.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
Top method improvements (percentages):
-16 (-2.86 % of base) : 143574.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
1 total methods with Code Size differences (1 improved, 0 regressed).
linux x64
Diffs are based on 1,623,585 contexts (360,162 MinOpts, 1,263,423 FullOpts).
MISSED contexts: 265 (0.02%)
No diffs found.
Details
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| benchmarks.run.linux.x64.checked.mch |
31,427 |
2,008 |
29,419 |
9 (0.03%) |
9 (0.03%) |
| benchmarks.run_pgo.linux.x64.checked.mch |
130,227 |
50,713 |
79,514 |
13 (0.01%) |
13 (0.01%) |
| benchmarks.run_tiered.linux.x64.checked.mch |
60,445 |
46,324 |
14,121 |
9 (0.01%) |
9 (0.01%) |
| coreclr_tests.run.linux.x64.checked.mch |
391,360 |
185,267 |
206,093 |
41 (0.01%) |
41 (0.01%) |
| libraries.crossgen2.linux.x64.checked.mch |
264,739 |
15 |
264,724 |
0 (0.00%) |
0 (0.00%) |
| libraries.pmi.linux.x64.checked.mch |
297,026 |
6 |
297,020 |
45 (0.02%) |
45 (0.02%) |
| libraries_tests.run.linux.x64.Release.mch |
81,980 |
53,841 |
28,139 |
2 (0.00%) |
2 (0.00%) |
| librariestestsnotieredcompilation.run.linux.x64.Release.mch |
305,682 |
21,933 |
283,749 |
144 (0.05%) |
144 (0.05%) |
| realworld.run.linux.x64.checked.mch |
33,246 |
45 |
33,201 |
2 (0.01%) |
2 (0.01%) |
| smoke_tests.nativeaot.linux.x64.checked.mch |
27,453 |
10 |
27,443 |
0 (0.00%) |
0 (0.00%) |
|
1,623,585 |
360,162 |
1,263,423 |
265 (0.02%) |
265 (0.02%) |
osx arm64
Diffs are based on 1,736,294 contexts (561,303 MinOpts, 1,174,991 FullOpts).
MISSED contexts: 227 (0.01%)
Overall (-16 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| libraries.crossgen2.osx.arm64.checked.mch |
63,645,568 |
-16 |
FullOpts (-16 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| libraries.crossgen2.osx.arm64.checked.mch |
63,643,940 |
-16 |
Example diffs
libraries.crossgen2.osx.arm64.checked.mch
-16 (-2.86%) : 85711.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
@@ -4,23 +4,21 @@
; ReadyToRun compilation
; optimized code
; fp based frame
-; fully interruptible
+; partially interruptible
; No matching PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T01] ( 11, 17 ) ref -> x19 this class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V01 arg1 [V01,T05] ( 10, 9.50) ref -> x21 class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V02 arg2 [V02,T04] ( 11, 10 ) ref -> x20 class-hnd single-def <System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V03 loc0 [V03,T02] ( 7, 17.50) ref -> x19 class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V00 this [V00,T04] ( 9, 5.50) ref -> x21 this class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V01 arg1 [V01,T02] ( 10, 9.50) ref -> x20 class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V02 arg2 [V02,T01] ( 11, 10 ) ref -> x19 class-hnd single-def <System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V03 loc0 [V03,T00] ( 6, 17 ) ref -> x21 class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
;* V04 loc1 [V04 ] ( 0, 0 ) int -> zero-ref
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V06 tmp1 [V06,T08] ( 3, 3 ) ref -> x23 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V07 tmp2 [V07,T03] ( 2, 16 ) ref -> x19 single-def "arg temp"
-; V08 tmp3 [V08 ] ( 6, 6 ) struct (24) [fp+0x10] do-not-enreg[XS] must-init addr-exposed "by-value struct argument" <System.Text.RegularExpressions.Symbolic.BitVector>
-; V09 cse0 [V09,T06] ( 2, 9 ) long -> x22 hoist "CSE - aggressive"
-; V10 cse1 [V10,T07] ( 9, 7.75) long -> x22 hoist multi-def "CSE - aggressive"
-; V11 rat0 [V11,T00] ( 3, 24 ) int -> x23 "ReplaceWithLclVar is creating a new local variable"
+; V06 tmp1 [V06,T05] ( 3, 3 ) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V07 tmp2 [V07 ] ( 6, 6 ) struct (24) [fp+0x10] do-not-enreg[XS] must-init addr-exposed "by-value struct argument" <System.Text.RegularExpressions.Symbolic.BitVector>
+; V08 cse0 [V08,T06] ( 4, 2 ) int -> x22 "CSE - moderate"
+; V09 cse1 [V09,T03] ( 9, 7.75) long -> x23 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 24
@@ -30,105 +28,75 @@ G_M65422_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
stp x21, x22, [sp, #0x38]
str x23, [sp, #0x48]
mov fp, sp
- str xzr, [fp, #0x10] // [V08 tmp3]
- mov x19, x0
- ; gcrRegs +[x19]
- mov x21, x1
+ str xzr, [fp, #0x10] // [V07 tmp2]
+ mov x21, x0
; gcrRegs +[x21]
- mov x20, x2
+ mov x20, x1
; gcrRegs +[x20]
+ mov x19, x2
+ ; gcrRegs +[x19]
;; size=36 bbWeight=1 PerfScore 7.00
-G_M65422_IG02: ; bbWeight=1, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- adrp x22, [HIGH RELOC #0xD1FFAB1E]
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- ;; size=8 bbWeight=1 PerfScore 1.00
-G_M65422_IG03: ; bbWeight=8, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- mov x11, x22
+G_M65422_IG02: ; bbWeight=1, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
+ adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
+ add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x0, [x11]
blr x0
- ; gcr arg pop 0
- cbz w0, G_M65422_IG06
- ;; size=16 bbWeight=8 PerfScore 44.00
-G_M65422_IG04: ; bbWeight=4, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- ldr w23, [x19, #0x20]
- cmp w23, #17
- bhi G_M65422_IG19
- mov w1, w23
- adr x0, [@RWD00]
- ldr w0, [x0, x1, LSL #2]
- adr x11, [G_M65422_IG02]
- add x0, x0, x11
- br x0
- ;; size=36 bbWeight=4 PerfScore 42.00
-G_M65422_IG05: ; bbWeight=4, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- ldr x19, [x19, #0x08]
- b G_M65422_IG03
- ;; size=8 bbWeight=4 PerfScore 16.00
-G_M65422_IG06: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
+ cbnz w0, G_M65422_IG04
+ ;; size=20 bbWeight=1 PerfScore 6.00
+G_M65422_IG03: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x0, [x11]
blr x0
; gcrRegs +[x0]
- ; gcr arg pop 0
- mov x23, x0
- ; gcrRegs +[x23]
- mov x1, x19
+ mov x22, x0
+ ; gcrRegs +[x22]
+ mov x1, x21
; gcrRegs +[x1]
- mov x0, x23
+ mov x0, x22
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x2, [x11]
blr x2
- ; gcrRegs -[x0-x1 x19]
- ; gcr arg pop 0
+ ; gcrRegs -[x0-x1 x21]
adrp x0, [HIGH RELOC #0xD1FFAB1E] // <unknown method>
add x0, x0, [LOW RELOC #0xD1FFAB1E]
ldr x0, [x0]
- mov x3, x20
+ mov x3, x19
; gcrRegs +[x3]
- mov x1, x23
+ mov x1, x22
; gcrRegs +[x1]
- mov x2, x21
+ mov x2, x20
; gcrRegs +[x2]
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x4, [x11]
blr x4
- ; gcrRegs -[x1-x3 x20-x21 x23]
- ; gcr arg pop 0
- b G_M65422_IG19
+ ; gcrRegs -[x1-x3 x19-x20 x22]
+ b G_M65422_IG17
;; size=88 bbWeight=0.50 PerfScore 11.50
-G_M65422_IG07: ; bbWeight=0.50, gcrefRegs=300000 {x20 x21}, byrefRegs=0000 {}, byref, nogc
- ; gcrRegs +[x20-x21]
- ldp x0, x1, [x21, #0xC0]
+G_M65422_IG04: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs +[x19-x21]
+ ldr w22, [x21, #0x20]
+ cmp w22, #17
+ bhi G_M65422_IG17
+ mov w1, w22
+ adr x0, [@RWD00]
+ ldr w0, [x0, x1, LSL #2]
+ adr x11, [G_M65422_IG02]
+ add x0, x0, x11
+ br x0
+ ;; size=36 bbWeight=0.50 PerfScore 5.25
+G_M65422_IG05: ; bbWeight=0.50, gcrefRegs=180000 {x19 x20}, byrefRegs=0000 {}, byref, nogc
+ ; gcrRegs -[x21]
+ ldp x0, x1, [x20, #0xC0]
stp x0, x1, [fp, #0x10]
- ldr x0, [x21, #0xD0]
+ ldr x0, [x20, #0xD0]
str x0, [fp, #0x20]
;; size=16 bbWeight=0.50 PerfScore 4.50
-G_M65422_IG08: ; bbWeight=0.50, extend
- add x1, fp, #16 // [V08 tmp3]
- mov x0, x20
- ; gcrRegs +[x0]
- adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
- add x11, x11, [LOW RELOC #0xD1FFAB1E]
- ldr wzr, [x0]
- ldr x2, [x11]
- blr x2
- ; gcrRegs -[x0 x20-x21]
- ; gcr arg pop 0
- b G_M65422_IG19
- ;; size=32 bbWeight=0.50 PerfScore 5.00
-G_M65422_IG09: ; bbWeight=0.50, gcrefRegs=180000 {x19 x20}, byrefRegs=0000 {}, byref, nogc
- ; gcrRegs +[x19-x20]
- ldp x0, x1, [x19, #0x30]
- stp x0, x1, [fp, #0x10]
- ldr x0, [x19, #0x40]
- str x0, [fp, #0x20]
- ;; size=16 bbWeight=0.50 PerfScore 4.50
-G_M65422_IG10: ; bbWeight=0.50, extend
- add x1, fp, #16 // [V08 tmp3]
- mov x0, x20
+G_M65422_IG06: ; bbWeight=0.50, extend
+ add x1, fp, #16 // [V07 tmp2]
+ mov x0, x19
; gcrRegs +[x0]
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
@@ -136,148 +104,159 @@ G_M65422_IG10: ; bbWeight=0.50, extend
ldr x2, [x11]
blr x2
; gcrRegs -[x0 x19-x20]
- ; gcr arg pop 0
- b G_M65422_IG19
+ b G_M65422_IG17
;; size=32 bbWeight=0.50 PerfScore 5.00
-G_M65422_IG11: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- ; gcrRegs +[x19-x21]
- ldr x0, [x19, #0x08]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
- mov x1, x21
- ; gcrRegs +[x1]
- adrp x22, [HIGH RELOC #0xD1FFAB1E] // function address
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- mov x11, x22
- ldr wzr, [x0]
- ldr x3, [x11]
- blr x3
- ; gcrRegs -[x0-x2 x19-x21]
- ; gcr arg pop 0
- b G_M65422_IG19
- ;; size=40 bbWeight=0.50 PerfScore 6.75
-G_M65422_IG12: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- ; gcrRegs +[x19-x21]
- ldr x0, [x19, #0x08]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
- mov x1, x21
- ; gcrRegs +[x1]
- adrp x22, [HIGH RELOC #0xD1FFAB1E] // function address
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- mov x11, x22
- ldr wzr, [x0]
- ldr x3, [x11]
- blr x3
- ; gcrRegs -[x0-x2]
- ; gcr arg pop 0
- ldr x0, [x19, #0x10]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
- mov x1, x21
- ; gcrRegs +[x1]
- mov x11, x22
- ldr wzr, [x0]
- ldr x3, [x11]
- blr x3
- ; gcrRegs -[x0-x2 x19-x21]
- ; gcr arg pop 0
- b G_M65422_IG19
- ;; size=68 bbWeight=0.50 PerfScore 12.50
-G_M65422_IG13: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[x19-x21]
- ldr w0, [x19, #0x20]
- cmp w0, #2
- bne G_M65422_IG16
- ;; size=12 bbWeight=0.50 PerfScore 2.25
-G_M65422_IG14: ; bbWeight=0.25, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- adrp x22, [HIGH RELOC #0xD1FFAB1E]
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- ;; size=8 bbWeight=0.25 PerfScore 0.25
-G_M65422_IG15: ; bbWeight=4, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- ldr x0, [x19, #0x08]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
...
Details
Improvements/regressions per collection
| Collection |
Contexts with diffs |
Improvements |
Regressions |
Same size |
Improvements (bytes) |
Regressions (bytes) |
| benchmarks.run.osx.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_pgo.osx.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_tiered.osx.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| coreclr_tests.run.osx.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries.crossgen2.osx.arm64.checked.mch |
1 |
1 |
0 |
0 |
-16 |
+0 |
| libraries.pmi.osx.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries_tests.run.osx.arm64.Release.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| librariestestsnotieredcompilation.run.osx.arm64.Release.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| realworld.run.osx.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
|
1 |
1 |
0 |
0 |
-16 |
+0 |
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| benchmarks.run.osx.arm64.checked.mch |
24,880 |
6 |
24,874 |
9 (0.04%) |
9 (0.04%) |
| benchmarks.run_pgo.osx.arm64.checked.mch |
66,735 |
47,211 |
19,524 |
9 (0.01%) |
9 (0.01%) |
| benchmarks.run_tiered.osx.arm64.checked.mch |
48,316 |
37,393 |
10,923 |
10 (0.02%) |
10 (0.02%) |
| coreclr_tests.run.osx.arm64.checked.mch |
506,847 |
301,369 |
205,478 |
53 (0.01%) |
53 (0.01%) |
| libraries.crossgen2.osx.arm64.checked.mch |
264,502 |
15 |
264,487 |
1 (0.00%) |
1 (0.00%) |
| libraries.pmi.osx.arm64.checked.mch |
316,440 |
18 |
316,422 |
20 (0.01%) |
20 (0.01%) |
| libraries_tests.run.osx.arm64.Release.mch |
173,564 |
153,670 |
19,894 |
0 (0.00%) |
0 (0.00%) |
| librariestestsnotieredcompilation.run.osx.arm64.Release.mch |
303,406 |
21,618 |
281,788 |
123 (0.04%) |
123 (0.04%) |
| realworld.run.osx.arm64.checked.mch |
31,604 |
3 |
31,601 |
2 (0.01%) |
2 (0.01%) |
|
1,736,294 |
561,303 |
1,174,991 |
227 (0.01%) |
227 (0.01%) |
jit-analyze output
libraries.crossgen2.osx.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os osx -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 63645568 (overridden on cmd)
Total bytes of diff: 63645552 (overridden on cmd)
Total bytes of delta: -16 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-16 : 85711.dasm (-2.86 % of base)
1 total files with Code Size differences (1 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-16 (-2.86 % of base) : 85711.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
Top method improvements (percentages):
-16 (-2.86 % of base) : 85711.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
1 total methods with Code Size differences (1 improved, 0 regressed).
windows arm64
Diffs are based on 1,480,514 contexts (263,527 MinOpts, 1,216,987 FullOpts).
MISSED contexts: 247 (0.02%)
Overall (-16 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| libraries.crossgen2.windows.arm64.checked.mch |
66,990,496 |
-16 |
FullOpts (-16 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| libraries.crossgen2.windows.arm64.checked.mch |
66,988,860 |
-16 |
Example diffs
libraries.crossgen2.windows.arm64.checked.mch
-16 (-2.86%) : 210862.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
@@ -4,23 +4,21 @@
; ReadyToRun compilation
; optimized code
; fp based frame
-; fully interruptible
+; partially interruptible
; No matching PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T01] ( 11, 17 ) ref -> x19 this class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V01 arg1 [V01,T05] ( 10, 9.50) ref -> x21 class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V02 arg2 [V02,T04] ( 11, 10 ) ref -> x20 class-hnd single-def <System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V03 loc0 [V03,T02] ( 7, 17.50) ref -> x19 class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V00 this [V00,T04] ( 9, 5.50) ref -> x21 this class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V01 arg1 [V01,T02] ( 10, 9.50) ref -> x20 class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V02 arg2 [V02,T01] ( 11, 10 ) ref -> x19 class-hnd single-def <System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V03 loc0 [V03,T00] ( 6, 17 ) ref -> x21 class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
;* V04 loc1 [V04 ] ( 0, 0 ) int -> zero-ref
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V06 tmp1 [V06,T08] ( 3, 3 ) ref -> x23 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V07 tmp2 [V07,T03] ( 2, 16 ) ref -> x19 single-def "arg temp"
-; V08 tmp3 [V08 ] ( 6, 6 ) struct (24) [fp+0x10] do-not-enreg[XS] must-init addr-exposed "by-value struct argument" <System.Text.RegularExpressions.Symbolic.BitVector>
-; V09 cse0 [V09,T06] ( 2, 9 ) long -> x22 hoist "CSE - aggressive"
-; V10 cse1 [V10,T07] ( 9, 7.75) long -> x22 hoist multi-def "CSE - aggressive"
-; V11 rat0 [V11,T00] ( 3, 24 ) int -> x23 "ReplaceWithLclVar is creating a new local variable"
+; V06 tmp1 [V06,T05] ( 3, 3 ) ref -> x22 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V07 tmp2 [V07 ] ( 6, 6 ) struct (24) [fp+0x10] do-not-enreg[XS] must-init addr-exposed "by-value struct argument" <System.Text.RegularExpressions.Symbolic.BitVector>
+; V08 cse0 [V08,T06] ( 4, 2 ) int -> x22 "CSE - moderate"
+; V09 cse1 [V09,T03] ( 9, 7.75) long -> x23 hoist multi-def "CSE - aggressive"
;
; Lcl frame size = 24
@@ -30,105 +28,75 @@ G_M65422_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
stp x21, x22, [sp, #0x38]
str x23, [sp, #0x48]
mov fp, sp
- str xzr, [fp, #0x10] // [V08 tmp3]
- mov x19, x0
- ; gcrRegs +[x19]
- mov x21, x1
+ str xzr, [fp, #0x10] // [V07 tmp2]
+ mov x21, x0
; gcrRegs +[x21]
- mov x20, x2
+ mov x20, x1
; gcrRegs +[x20]
+ mov x19, x2
+ ; gcrRegs +[x19]
;; size=36 bbWeight=1 PerfScore 7.00
-G_M65422_IG02: ; bbWeight=1, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- adrp x22, [HIGH RELOC #0xD1FFAB1E]
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- ;; size=8 bbWeight=1 PerfScore 1.00
-G_M65422_IG03: ; bbWeight=8, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- mov x11, x22
+G_M65422_IG02: ; bbWeight=1, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
+ adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
+ add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x0, [x11]
blr x0
- ; gcr arg pop 0
- cbz w0, G_M65422_IG06
- ;; size=16 bbWeight=8 PerfScore 44.00
-G_M65422_IG04: ; bbWeight=4, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- ldr w23, [x19, #0x20]
- cmp w23, #17
- bhi G_M65422_IG19
- mov w1, w23
- adr x0, [@RWD00]
- ldr w0, [x0, x1, LSL #2]
- adr x11, [G_M65422_IG02]
- add x0, x0, x11
- br x0
- ;; size=36 bbWeight=4 PerfScore 42.00
-G_M65422_IG05: ; bbWeight=4, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- ldr x19, [x19, #0x08]
- b G_M65422_IG03
- ;; size=8 bbWeight=4 PerfScore 16.00
-G_M65422_IG06: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
+ cbnz w0, G_M65422_IG04
+ ;; size=20 bbWeight=1 PerfScore 6.00
+G_M65422_IG03: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x0, [x11]
blr x0
; gcrRegs +[x0]
- ; gcr arg pop 0
- mov x23, x0
- ; gcrRegs +[x23]
- mov x1, x19
+ mov x22, x0
+ ; gcrRegs +[x22]
+ mov x1, x21
; gcrRegs +[x1]
- mov x0, x23
+ mov x0, x22
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x2, [x11]
blr x2
- ; gcrRegs -[x0-x1 x19]
- ; gcr arg pop 0
+ ; gcrRegs -[x0-x1 x21]
adrp x0, [HIGH RELOC #0xD1FFAB1E] // <unknown method>
add x0, x0, [LOW RELOC #0xD1FFAB1E]
ldr x0, [x0]
- mov x3, x20
+ mov x3, x19
; gcrRegs +[x3]
- mov x1, x23
+ mov x1, x22
; gcrRegs +[x1]
- mov x2, x21
+ mov x2, x20
; gcrRegs +[x2]
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
ldr x4, [x11]
blr x4
- ; gcrRegs -[x1-x3 x20-x21 x23]
- ; gcr arg pop 0
- b G_M65422_IG19
+ ; gcrRegs -[x1-x3 x19-x20 x22]
+ b G_M65422_IG17
;; size=88 bbWeight=0.50 PerfScore 11.50
-G_M65422_IG07: ; bbWeight=0.50, gcrefRegs=300000 {x20 x21}, byrefRegs=0000 {}, byref, nogc
- ; gcrRegs +[x20-x21]
- ldp x0, x1, [x21, #0xC0]
+G_M65422_IG04: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs +[x19-x21]
+ ldr w22, [x21, #0x20]
+ cmp w22, #17
+ bhi G_M65422_IG17
+ mov w1, w22
+ adr x0, [@RWD00]
+ ldr w0, [x0, x1, LSL #2]
+ adr x11, [G_M65422_IG02]
+ add x0, x0, x11
+ br x0
+ ;; size=36 bbWeight=0.50 PerfScore 5.25
+G_M65422_IG05: ; bbWeight=0.50, gcrefRegs=180000 {x19 x20}, byrefRegs=0000 {}, byref, nogc
+ ; gcrRegs -[x21]
+ ldp x0, x1, [x20, #0xC0]
stp x0, x1, [fp, #0x10]
- ldr x0, [x21, #0xD0]
+ ldr x0, [x20, #0xD0]
str x0, [fp, #0x20]
;; size=16 bbWeight=0.50 PerfScore 4.50
-G_M65422_IG08: ; bbWeight=0.50, extend
- add x1, fp, #16 // [V08 tmp3]
- mov x0, x20
- ; gcrRegs +[x0]
- adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
- add x11, x11, [LOW RELOC #0xD1FFAB1E]
- ldr wzr, [x0]
- ldr x2, [x11]
- blr x2
- ; gcrRegs -[x0 x20-x21]
- ; gcr arg pop 0
- b G_M65422_IG19
- ;; size=32 bbWeight=0.50 PerfScore 5.00
-G_M65422_IG09: ; bbWeight=0.50, gcrefRegs=180000 {x19 x20}, byrefRegs=0000 {}, byref, nogc
- ; gcrRegs +[x19-x20]
- ldp x0, x1, [x19, #0x30]
- stp x0, x1, [fp, #0x10]
- ldr x0, [x19, #0x40]
- str x0, [fp, #0x20]
- ;; size=16 bbWeight=0.50 PerfScore 4.50
-G_M65422_IG10: ; bbWeight=0.50, extend
- add x1, fp, #16 // [V08 tmp3]
- mov x0, x20
+G_M65422_IG06: ; bbWeight=0.50, extend
+ add x1, fp, #16 // [V07 tmp2]
+ mov x0, x19
; gcrRegs +[x0]
adrp x11, [HIGH RELOC #0xD1FFAB1E] // function address
add x11, x11, [LOW RELOC #0xD1FFAB1E]
@@ -136,148 +104,159 @@ G_M65422_IG10: ; bbWeight=0.50, extend
ldr x2, [x11]
blr x2
; gcrRegs -[x0 x19-x20]
- ; gcr arg pop 0
- b G_M65422_IG19
+ b G_M65422_IG17
;; size=32 bbWeight=0.50 PerfScore 5.00
-G_M65422_IG11: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- ; gcrRegs +[x19-x21]
- ldr x0, [x19, #0x08]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
- mov x1, x21
- ; gcrRegs +[x1]
- adrp x22, [HIGH RELOC #0xD1FFAB1E] // function address
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- mov x11, x22
- ldr wzr, [x0]
- ldr x3, [x11]
- blr x3
- ; gcrRegs -[x0-x2 x19-x21]
- ; gcr arg pop 0
- b G_M65422_IG19
- ;; size=40 bbWeight=0.50 PerfScore 6.75
-G_M65422_IG12: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- ; gcrRegs +[x19-x21]
- ldr x0, [x19, #0x08]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
- mov x1, x21
- ; gcrRegs +[x1]
- adrp x22, [HIGH RELOC #0xD1FFAB1E] // function address
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- mov x11, x22
- ldr wzr, [x0]
- ldr x3, [x11]
- blr x3
- ; gcrRegs -[x0-x2]
- ; gcr arg pop 0
- ldr x0, [x19, #0x10]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
- mov x1, x21
- ; gcrRegs +[x1]
- mov x11, x22
- ldr wzr, [x0]
- ldr x3, [x11]
- blr x3
- ; gcrRegs -[x0-x2 x19-x21]
- ; gcr arg pop 0
- b G_M65422_IG19
- ;; size=68 bbWeight=0.50 PerfScore 12.50
-G_M65422_IG13: ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[x19-x21]
- ldr w0, [x19, #0x20]
- cmp w0, #2
- bne G_M65422_IG16
- ;; size=12 bbWeight=0.50 PerfScore 2.25
-G_M65422_IG14: ; bbWeight=0.25, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
- adrp x22, [HIGH RELOC #0xD1FFAB1E]
- add x22, x22, [LOW RELOC #0xD1FFAB1E]
- ;; size=8 bbWeight=0.25 PerfScore 0.25
-G_M65422_IG15: ; bbWeight=4, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref, isz
- ldr x0, [x19, #0x08]
- ; gcrRegs +[x0]
- mov x2, x20
- ; gcrRegs +[x2]
...
Details
Improvements/regressions per collection
| Collection |
Contexts with diffs |
Improvements |
Regressions |
Same size |
Improvements (bytes) |
Regressions (bytes) |
| benchmarks.run.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_pgo.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_tiered.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| coreclr_tests.run.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries.crossgen2.windows.arm64.checked.mch |
1 |
1 |
0 |
0 |
-16 |
+0 |
| libraries.pmi.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries_tests.run.windows.arm64.Release.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| librariestestsnotieredcompilation.run.windows.arm64.Release.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| realworld.run.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| smoke_tests.nativeaot.windows.arm64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
|
1 |
1 |
0 |
0 |
-16 |
+0 |
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| benchmarks.run.windows.arm64.checked.mch |
24,467 |
4 |
24,463 |
9 (0.04%) |
9 (0.04%) |
| benchmarks.run_pgo.windows.arm64.checked.mch |
74,758 |
40,165 |
34,593 |
11 (0.01%) |
11 (0.01%) |
| benchmarks.run_tiered.windows.arm64.checked.mch |
48,618 |
36,755 |
11,863 |
9 (0.02%) |
9 (0.02%) |
| coreclr_tests.run.windows.arm64.checked.mch |
367,040 |
161,422 |
205,618 |
57 (0.02%) |
57 (0.02%) |
| libraries.crossgen2.windows.arm64.checked.mch |
274,538 |
15 |
274,523 |
1 (0.00%) |
1 (0.00%) |
| libraries.pmi.windows.arm64.checked.mch |
305,636 |
6 |
305,630 |
31 (0.01%) |
31 (0.01%) |
| libraries_tests.run.windows.arm64.Release.mch |
10,746 |
3,531 |
7,215 |
0 (0.00%) |
0 (0.00%) |
| librariestestsnotieredcompilation.run.windows.arm64.Release.mch |
317,229 |
21,618 |
295,611 |
127 (0.04%) |
127 (0.04%) |
| realworld.run.windows.arm64.checked.mch |
33,292 |
3 |
33,289 |
2 (0.01%) |
2 (0.01%) |
| smoke_tests.nativeaot.windows.arm64.checked.mch |
24,190 |
8 |
24,182 |
0 (0.00%) |
0 (0.00%) |
|
1,480,514 |
263,527 |
1,216,987 |
247 (0.02%) |
247 (0.02%) |
jit-analyze output
libraries.crossgen2.windows.arm64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch arm64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 66990496 (overridden on cmd)
Total bytes of diff: 66990480 (overridden on cmd)
Total bytes of delta: -16 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-16 : 210862.dasm (-2.86 % of base)
1 total files with Code Size differences (1 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-16 (-2.86 % of base) : 210862.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
Top method improvements (percentages):
-16 (-2.86 % of base) : 210862.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
1 total methods with Code Size differences (1 improved, 0 regressed).
windows x64
Diffs are based on 2,002,515 contexts (587,594 MinOpts, 1,414,921 FullOpts).
MISSED contexts: 373 (0.02%)
Overall (-7 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| libraries.crossgen2.windows.x64.checked.mch |
44,929,099 |
-7 |
FullOpts (-7 bytes)
| Collection |
Base size (bytes) |
Diff size (bytes) |
| libraries.crossgen2.windows.x64.checked.mch |
44,927,912 |
-7 |
Example diffs
libraries.crossgen2.windows.x64.checked.mch
-7 (-1.79%) : 178215.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
@@ -4,21 +4,20 @@
; ReadyToRun compilation
; optimized code
; rsp based frame
-; fully interruptible
+; partially interruptible
; No matching PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T01] ( 11, 17 ) ref -> rbx this class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V01 arg1 [V01,T05] ( 10, 9.50) ref -> rdi class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V02 arg2 [V02,T04] ( 11, 10 ) ref -> rsi class-hnd single-def <System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]>
-; V03 loc0 [V03,T02] ( 7, 17.50) ref -> rbx class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V00 this [V00,T03] ( 9, 5.50) ref -> rdi this class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V01 arg1 [V01,T02] ( 10, 9.50) ref -> rsi class-hnd single-def <System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V02 arg2 [V02,T01] ( 11, 10 ) ref -> rbx class-hnd single-def <System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]>
+; V03 loc0 [V03,T00] ( 6, 17 ) ref -> rdi class-hnd <System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]>
;* V04 loc1 [V04 ] ( 0, 0 ) int -> zero-ref
; V05 OutArgs [V05 ] ( 1, 1 ) struct (32) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V06 tmp1 [V06,T06] ( 3, 3 ) ref -> rbp class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V07 tmp2 [V07,T03] ( 2, 16 ) ref -> rbx single-def "arg temp"
-; V08 tmp3 [V08 ] ( 6, 6 ) struct (24) [rsp+0x20] do-not-enreg[XS] must-init addr-exposed "by-value struct argument" <System.Text.RegularExpressions.Symbolic.BitVector>
-; V09 rat0 [V09,T00] ( 3, 24 ) int -> rbp "ReplaceWithLclVar is creating a new local variable"
+; V06 tmp1 [V06,T04] ( 3, 3 ) ref -> rbp class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V07 tmp2 [V07 ] ( 6, 6 ) struct (24) [rsp+0x20] do-not-enreg[XS] must-init addr-exposed "by-value struct argument" <System.Text.RegularExpressions.Symbolic.BitVector>
+; V08 cse0 [V08,T05] ( 4, 2 ) int -> rbp "CSE - moderate"
;
; Lcl frame size = 56
@@ -32,35 +31,20 @@ G_M65422_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
movaps xmmword ptr [rsp+0x20], xmm4
xor eax, eax
mov qword ptr [rsp+0x30], rax
- mov rbx, rcx
- ; gcrRegs +[rbx]
- mov rdi, rdx
+ mov rdi, rcx
; gcrRegs +[rdi]
- mov rsi, r8
+ mov rsi, rdx
; gcrRegs +[rsi]
+ mov rbx, r8
+ ; gcrRegs +[rbx]
;; size=32 bbWeight=1 PerfScore 8.58
-G_M65422_IG02: ; bbWeight=8, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref, isz
+G_M65422_IG02: ; bbWeight=1, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref, isz
call [<unknown method>]
; gcr arg pop 0
test eax, eax
- je SHORT G_M65422_IG05
- ;; size=10 bbWeight=8 PerfScore 34.00
-G_M65422_IG03: ; bbWeight=4, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref
- mov ebp, dword ptr [rbx+0x20]
- cmp ebp, 17
- ja G_M65422_IG17
- mov edx, ebp
- lea rcx, [reloc @RWD00]
- mov ecx, dword ptr [rcx+4*rdx]
- lea r11, G_M65422_IG02
- add rcx, r11
- jmp rcx
- ;; size=36 bbWeight=4 PerfScore 37.00
-G_M65422_IG04: ; bbWeight=4, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref, isz
- mov rbx, gword ptr [rbx+0x08]
- jmp SHORT G_M65422_IG02
- ;; size=6 bbWeight=4 PerfScore 16.00
-G_M65422_IG05: ; bbWeight=0.50, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref
+ jne SHORT G_M65422_IG04
+ ;; size=10 bbWeight=1 PerfScore 4.25
+G_M65422_IG03: ; bbWeight=0.50, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref
call [CORINFO_HELP_READYTORUN_NEW]
; gcrRegs +[rax]
; gcr arg pop 0
@@ -68,150 +52,162 @@ G_M65422_IG05: ; bbWeight=0.50, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0
; gcrRegs +[rbp]
mov rcx, rbp
; gcrRegs +[rcx]
- mov rdx, rbx
+ mov rdx, rdi
; gcrRegs +[rdx]
call [CORINFO_HELP_READYTORUN_DELEGATE_CTOR]
- ; gcrRegs -[rax rcx rdx rbx]
+ ; gcrRegs -[rax rcx rdx rdi]
; gcr arg pop 0
mov rcx, qword ptr [(reloc)] ; <unknown method>
mov rdx, rbp
; gcrRegs +[rdx]
- mov r8, rdi
+ mov r8, rsi
; gcrRegs +[r8]
- mov r9, rsi
+ mov r9, rbx
; gcrRegs +[r9]
call [<unknown method>]
- ; gcrRegs -[rdx rbp rsi rdi r8-r9]
+ ; gcrRegs -[rdx rbx rbp rsi r8-r9]
; gcr arg pop 0
- jmp G_M65422_IG17
+ jmp G_M65422_IG16
;; size=48 bbWeight=0.50 PerfScore 7.25
-G_M65422_IG06: ; bbWeight=0.50, gcrefRegs=00C0 {rsi rdi}, byrefRegs=0000 {}, byref, nogc
- ; gcrRegs +[rsi rdi]
- movups xmm0, xmmword ptr [rdi+0xC0]
+G_M65422_IG04: ; bbWeight=0.50, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref
+ ; gcrRegs +[rbx rsi rdi]
+ mov ebp, dword ptr [rdi+0x20]
+ cmp ebp, 17
+ ja G_M65422_IG16
+ mov edx, ebp
+ lea rcx, [reloc @RWD00]
+ mov ecx, dword ptr [rcx+4*rdx]
+ lea r11, G_M65422_IG02
+ add rcx, r11
+ jmp rcx
+ ;; size=36 bbWeight=0.50 PerfScore 4.62
+G_M65422_IG05: ; bbWeight=0.50, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref, nogc
+ ; gcrRegs -[rdi]
+ movups xmm0, xmmword ptr [rsi+0xC0]
movups xmmword ptr [rsp+0x20], xmm0
- mov rdx, qword ptr [rdi+0xD0]
+ mov rdx, qword ptr [rsi+0xD0]
mov qword ptr [rsp+0x30], rdx
;; size=24 bbWeight=0.50 PerfScore 4.00
-G_M65422_IG07: ; bbWeight=0.50, extend
+G_M65422_IG06: ; bbWeight=0.50, extend
lea rdx, [rsp+0x20]
- mov rcx, rsi
- ; gcrRegs +[rcx]
- lea r11, [(reloc)] ; function address
- cmp dword ptr [rcx], ecx
- call [r11]<unknown method>
- ; gcrRegs -[rcx rsi rdi]
- ; gcr arg pop 0
- jmp G_M65422_IG17
- ;; size=25 bbWeight=0.50 PerfScore 4.62
-G_M65422_IG08: ; bbWeight=0.50, gcrefRegs=0048 {rbx rsi}, byrefRegs=0000 {}, byref, nogc
- ; gcrRegs +[rbx rsi]
- movups xmm0, xmmword ptr [rbx+0x30]
- movups xmmword ptr [rsp+0x20], xmm0
- mov rdx, qword ptr [rbx+0x40]
- mov qword ptr [rsp+0x30], rdx
- ;; size=18 bbWeight=0.50 PerfScore 4.00
-G_M65422_IG09: ; bbWeight=0.50, extend
- lea rdx, [rsp+0x20]
- mov rcx, rsi
+ mov rcx, rbx
; gcrRegs +[rcx]
lea r11, [(reloc)] ; function address
cmp dword ptr [rcx], ecx
call [r11]<unknown method>
; gcrRegs -[rcx rbx rsi]
; gcr arg pop 0
- jmp G_M65422_IG17
+ jmp G_M65422_IG16
;; size=25 bbWeight=0.50 PerfScore 4.62
-G_M65422_IG10: ; bbWeight=0.50, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref
- ; gcrRegs +[rbx rsi rdi]
- mov rcx, gword ptr [rbx+0x08]
- ; gcrRegs +[rcx]
- mov rdx, rdi
- ; gcrRegs +[rdx]
- mov r8, rsi
- ; gcrRegs +[r8]
- cmp dword ptr [rcx], ecx
- call [System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this]
- ; gcrRegs -[rcx rdx rbx rsi rdi r8]
- ; gcr arg pop 0
- jmp G_M65422_IG17
- ;; size=23 bbWeight=0.50 PerfScore 5.25
-G_M65422_IG11: ; bbWeight=0.50, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[rbx rsi rdi]
- mov rcx, gword ptr [rbx+0x08]
- ; gcrRegs +[rcx]
- mov rdx, rdi
- ; gcrRegs +[rdx]
- mov r8, rsi
- ; gcrRegs +[r8]
- cmp dword ptr [rcx], ecx
- call [System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this]
- ; gcrRegs -[rcx rdx r8]
- ; gcr arg pop 0
- mov rcx, gword ptr [rbx+0x10]
- ; gcrRegs +[rcx]
- mov rdx, rdi
- ; gcrRegs +[rdx]
- mov r8, rsi
- ; gcrRegs +[r8]
- cmp dword ptr [rcx], ecx
- call [System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this]
- ; gcrRegs -[rcx rdx rbx rsi rdi r8]
- ; gcr arg pop 0
- jmp SHORT G_M65422_IG17
- ;; size=38 bbWeight=0.50 PerfScore 9.50
-G_M65422_IG12: ; bbWeight=0.50, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref, isz
- ; gcrRegs +[rbx rsi rdi]
- cmp dword ptr [rbx+0x20], 2
- jne SHORT G_M65422_IG14
- ;; size=6 bbWeight=0.50 PerfScore 2.00
-G_M65422_IG13: ; bbWeight=4, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref, isz
- mov rcx, gword ptr [rbx+0x08]
- ; gcrRegs +[rcx]
- mov rdx, rdi
- ; gcrRegs +[rdx]
- mov r8, rsi
- ; gcrRegs +[r8]
- cmp dword ptr [rcx], ecx
- call [System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this]
- ; gcrRegs -[rcx rdx r8]
- ; gcr arg pop 0
- mov rbx, gword ptr [rbx+0x10]
- cmp dword ptr [rbx+0x20], 2
- je SHORT G_M65422_IG13
- ;; size=28 bbWeight=4 PerfScore 58.00
-G_M65422_IG14: ; bbWeight=0.50, gcrefRegs=00C8 {rbx rsi rdi}, byrefRegs=0000 {}, byref, isz
- mov rcx, rbx
- ; gcrRegs +[rcx]
- mov rdx, rdi
- ; gcrRegs +[rdx]
- mov r8, rsi
- ; gcrRegs +[r8]
- call [System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this]
- ; gcrRegs -[rcx rdx rbx rsi rdi r8]
- ; gcr arg pop 0
- jmp SHORT G_M65422_IG17
- ;; size=17 bbWeight=0.50 PerfScore 2.88
-G_M65422_IG15: ; bbWeight=0.50, gcrefRegs=00C0 {rsi rdi}, byrefRegs=0000 {}, byref, nogc
- ; gcrRegs +[rsi rdi]
- movups xmm0, xmmword ptr [rdi+0xA8]
+G_M65422_IG07: ; bbWeight=0.50, gcrefRegs=0088 {rbx rdi}, byrefRegs=0000 {}, byref, nogc
+ ; gcrRegs +[rbx rdi]
+ movups xmm0, xmmword ptr [rdi+0x30]
movups xmmword ptr [rsp+0x20], xmm0
- mov rdx, qword ptr [rdi+0xB8]
+ mov rdx, qword ptr [rdi+0x40]
mov qword ptr [rsp+0x30], rdx
- ;; size=24 bbWeight=0.50 PerfScore 4.00
-G_M65422_IG16: ; bbWeight=0.50, extend
+ ;; size=18 bbWeight=0.50 PerfScore 4.00
+G_M65422_IG08: ; bbWeight=0.50, extend
lea rdx, [rsp+0x20]
- mov rcx, rsi
+ mov rcx, rbx
; gcrRegs +[rcx]
lea r11, [(reloc)] ; function address
cmp dword ptr [rcx], ecx
call [r11]<unknown method>
- ; gcrRegs -[rcx rsi rdi]
+ ; gcrRegs -[rcx rbx rdi]
+ ; gcr arg pop 0
...
Details
Improvements/regressions per collection
| Collection |
Contexts with diffs |
Improvements |
Regressions |
Same size |
Improvements (bytes) |
Regressions (bytes) |
| aspnet.run.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_pgo.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| benchmarks.run_tiered.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| coreclr_tests.run.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries.crossgen2.windows.x64.checked.mch |
1 |
1 |
0 |
0 |
-7 |
+0 |
| libraries.pmi.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| libraries_tests.run.windows.x64.Release.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| librariestestsnotieredcompilation.run.windows.x64.Release.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| realworld.run.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
| smoke_tests.nativeaot.windows.x64.checked.mch |
0 |
0 |
0 |
0 |
-0 |
+0 |
|
1 |
1 |
0 |
0 |
-7 |
+0 |
Context information
| Collection |
Diffed contexts |
MinOpts |
FullOpts |
Missed, base |
Missed, diff |
| aspnet.run.windows.x64.checked.mch |
129,234 |
61,702 |
67,532 |
56 (0.04%) |
56 (0.04%) |
| benchmarks.run.windows.x64.checked.mch |
36,932 |
6 |
36,926 |
9 (0.02%) |
9 (0.02%) |
| benchmarks.run_pgo.windows.x64.checked.mch |
107,966 |
68,114 |
39,852 |
11 (0.01%) |
11 (0.01%) |
| benchmarks.run_tiered.windows.x64.checked.mch |
82,933 |
62,052 |
20,881 |
10 (0.01%) |
10 (0.01%) |
| coreclr_tests.run.windows.x64.checked.mch |
492,253 |
273,478 |
218,775 |
48 (0.01%) |
48 (0.01%) |
| libraries.crossgen2.windows.x64.checked.mch |
274,111 |
15 |
274,096 |
0 (0.00%) |
0 (0.00%) |
| libraries.pmi.windows.x64.checked.mch |
343,908 |
6 |
343,902 |
69 (0.02%) |
69 (0.02%) |
| libraries_tests.run.windows.x64.Release.mch |
120,244 |
100,260 |
19,984 |
2 (0.00%) |
2 (0.00%) |
| librariestestsnotieredcompilation.run.windows.x64.Release.mch |
343,746 |
21,947 |
321,799 |
166 (0.05%) |
166 (0.05%) |
| realworld.run.windows.x64.checked.mch |
38,754 |
3 |
38,751 |
2 (0.01%) |
2 (0.01%) |
| smoke_tests.nativeaot.windows.x64.checked.mch |
32,434 |
11 |
32,423 |
0 (0.00%) |
0 (0.00%) |
|
2,002,515 |
587,594 |
1,414,921 |
373 (0.02%) |
373 (0.02%) |
jit-analyze output
libraries.crossgen2.windows.x64.checked.mch
To reproduce these diffs on Windows x64:
superpmi.py asmdiffs -target_os windows -target_arch x64 -arch x64
Summary of Code Size diffs:
(Lower is better)
Total bytes of base: 44929099 (overridden on cmd)
Total bytes of diff: 44929092 (overridden on cmd)
Total bytes of delta: -7 (-0.00 % of base)
diff is an improvement.
relative diff is an improvement.
Detail diffs
Top file improvements (bytes):
-7 : 178215.dasm (-1.79 % of base)
1 total files with Code Size differences (1 improved, 0 regressed), 0 unchanged.
Top method improvements (bytes):
-7 (-1.79 % of base) : 178215.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
Top method improvements (percentages):
-7 (-1.79 % of base) : 178215.dasm - System.Text.RegularExpressions.Symbolic.SymbolicRegexNode`1[System.Text.RegularExpressions.Symbolic.BitVector]:CollectSets(System.Text.RegularExpressions.Symbolic.SymbolicRegexBuilder`1[System.Text.RegularExpressions.Symbolic.BitVector],System.Collections.Generic.HashSet`1[System.Text.RegularExpressions.Symbolic.BitVector]):this (FullOpts)
1 total methods with Code Size differences (1 improved, 0 regressed).